2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
31 #include <linux/kvm_host.h>
34 * set irq level. If an edge is detected, then the IRR is set to 1
36 static inline void pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
40 if (s->elcr & mask) /* level triggered */
48 else /* edge triggered */
50 if ((s->last_irr & mask) == 0)
58 * return the highest priority found in mask (highest = smallest
59 * number). Return 8 if no irq
61 static inline int get_priority(struct kvm_kpic_state *s, int mask)
67 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
73 * return the pic wanted interrupt. return -1 if none
75 static int pic_get_irq(struct kvm_kpic_state *s)
77 int mask, cur_priority, priority;
79 mask = s->irr & ~s->imr;
80 priority = get_priority(s, mask);
84 * compute current priority. If special fully nested mode on the
85 * master, the IRQ coming from the slave is not taken into account
86 * for the priority computation.
89 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
91 cur_priority = get_priority(s, mask);
92 if (priority < cur_priority)
94 * higher priority found: an irq should be generated
96 return (priority + s->priority_add) & 7;
102 * raise irq to CPU if necessary. must be called every time the active
105 static void pic_update_irq(struct kvm_pic *s)
109 irq2 = pic_get_irq(&s->pics[1]);
112 * if irq request by slave pic, signal master PIC
114 pic_set_irq1(&s->pics[0], 2, 1);
115 pic_set_irq1(&s->pics[0], 2, 0);
117 irq = pic_get_irq(&s->pics[0]);
119 s->irq_request(s->irq_request_opaque, 1);
121 s->irq_request(s->irq_request_opaque, 0);
124 void kvm_pic_update_irq(struct kvm_pic *s)
129 void kvm_pic_set_irq(void *opaque, int irq, int level)
131 struct kvm_pic *s = opaque;
133 pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
138 * acknowledge interrupt 'irq'
140 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
143 if (s->rotate_on_auto_eoi)
144 s->priority_add = (irq + 1) & 7;
146 s->isr |= (1 << irq);
148 * We don't clear a level sensitive interrupt here
150 if (!(s->elcr & (1 << irq)))
151 s->irr &= ~(1 << irq);
154 int kvm_pic_read_irq(struct kvm_pic *s)
156 int irq, irq2, intno;
158 irq = pic_get_irq(&s->pics[0]);
160 pic_intack(&s->pics[0], irq);
162 irq2 = pic_get_irq(&s->pics[1]);
164 pic_intack(&s->pics[1], irq2);
167 * spurious IRQ on slave controller
170 intno = s->pics[1].irq_base + irq2;
173 intno = s->pics[0].irq_base + irq;
176 * spurious IRQ on host controller
179 intno = s->pics[0].irq_base + irq;
186 void kvm_pic_reset(struct kvm_kpic_state *s)
194 s->read_reg_select = 0;
199 s->rotate_on_auto_eoi = 0;
200 s->special_fully_nested_mode = 0;
204 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
206 struct kvm_kpic_state *s = opaque;
207 int priority, cmd, irq;
212 kvm_pic_reset(s); /* init */
214 * deassert a pending interrupt
216 s->pics_state->irq_request(s->pics_state->
217 irq_request_opaque, 0);
221 printk(KERN_ERR "single mode not supported");
224 "level sensitive irq not supported");
225 } else if (val & 0x08) {
229 s->read_reg_select = val & 1;
231 s->special_mask = (val >> 5) & 1;
237 s->rotate_on_auto_eoi = cmd >> 2;
239 case 1: /* end of interrupt */
241 priority = get_priority(s, s->isr);
243 irq = (priority + s->priority_add) & 7;
244 s->isr &= ~(1 << irq);
246 s->priority_add = (irq + 1) & 7;
247 pic_update_irq(s->pics_state);
252 s->isr &= ~(1 << irq);
253 pic_update_irq(s->pics_state);
256 s->priority_add = (val + 1) & 7;
257 pic_update_irq(s->pics_state);
261 s->isr &= ~(1 << irq);
262 s->priority_add = (irq + 1) & 7;
263 pic_update_irq(s->pics_state);
266 break; /* no operation */
270 switch (s->init_state) {
271 case 0: /* normal mode */
273 pic_update_irq(s->pics_state);
276 s->irq_base = val & 0xf8;
286 s->special_fully_nested_mode = (val >> 4) & 1;
287 s->auto_eoi = (val >> 1) & 1;
293 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
297 ret = pic_get_irq(s);
300 s->pics_state->pics[0].isr &= ~(1 << 2);
301 s->pics_state->pics[0].irr &= ~(1 << 2);
303 s->irr &= ~(1 << ret);
304 s->isr &= ~(1 << ret);
305 if (addr1 >> 7 || ret != 2)
306 pic_update_irq(s->pics_state);
309 pic_update_irq(s->pics_state);
315 static u32 pic_ioport_read(void *opaque, u32 addr1)
317 struct kvm_kpic_state *s = opaque;
324 ret = pic_poll_read(s, addr1);
328 if (s->read_reg_select)
337 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
339 struct kvm_kpic_state *s = opaque;
340 s->elcr = val & s->elcr_mask;
343 static u32 elcr_ioport_read(void *opaque, u32 addr1)
345 struct kvm_kpic_state *s = opaque;
349 static int picdev_in_range(struct kvm_io_device *this, gpa_t addr)
364 static void picdev_write(struct kvm_io_device *this,
365 gpa_t addr, int len, const void *val)
367 struct kvm_pic *s = this->private;
368 unsigned char data = *(unsigned char *)val;
371 if (printk_ratelimit())
372 printk(KERN_ERR "PIC: non byte write\n");
380 pic_ioport_write(&s->pics[addr >> 7], addr, data);
384 elcr_ioport_write(&s->pics[addr & 1], addr, data);
389 static void picdev_read(struct kvm_io_device *this,
390 gpa_t addr, int len, void *val)
392 struct kvm_pic *s = this->private;
393 unsigned char data = 0;
396 if (printk_ratelimit())
397 printk(KERN_ERR "PIC: non byte read\n");
405 data = pic_ioport_read(&s->pics[addr >> 7], addr);
409 data = elcr_ioport_read(&s->pics[addr & 1], addr);
412 *(unsigned char *)val = data;
416 * callback when PIC0 irq status changed
418 static void pic_irq_request(void *opaque, int level)
420 struct kvm *kvm = opaque;
421 struct kvm_vcpu *vcpu = kvm->vcpus[0];
423 pic_irqchip(kvm)->output = level;
428 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
431 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
434 s->pics[0].elcr_mask = 0xf8;
435 s->pics[1].elcr_mask = 0xde;
436 s->irq_request = pic_irq_request;
437 s->irq_request_opaque = kvm;
438 s->pics[0].pics_state = s;
439 s->pics[1].pics_state = s;
442 * Initialize PIO device
444 s->dev.read = picdev_read;
445 s->dev.write = picdev_write;
446 s->dev.in_range = picdev_in_range;
448 kvm_io_bus_register_dev(&kvm->pio_bus, &s->dev);