KVM: make irq ack notifier functions static
[linux-2.6] / arch / x86 / kvm / i8254.c
1 /*
2  * 8253/8254 interval timer emulation
3  *
4  * Copyright (c) 2003-2004 Fabrice Bellard
5  * Copyright (c) 2006 Intel Corporation
6  * Copyright (c) 2007 Keir Fraser, XenSource Inc
7  * Copyright (c) 2008 Intel Corporation
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a copy
10  * of this software and associated documentation files (the "Software"), to deal
11  * in the Software without restriction, including without limitation the rights
12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13  * copies of the Software, and to permit persons to whom the Software is
14  * furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25  * THE SOFTWARE.
26  *
27  * Authors:
28  *   Sheng Yang <sheng.yang@intel.com>
29  *   Based on QEMU and Xen.
30  */
31
32 #include <linux/kvm_host.h>
33
34 #include "irq.h"
35 #include "i8254.h"
36
37 #ifndef CONFIG_X86_64
38 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
39 #else
40 #define mod_64(x, y) ((x) % (y))
41 #endif
42
43 #define RW_STATE_LSB 1
44 #define RW_STATE_MSB 2
45 #define RW_STATE_WORD0 3
46 #define RW_STATE_WORD1 4
47
48 /* Compute with 96 bit intermediate result: (a*b)/c */
49 static u64 muldiv64(u64 a, u32 b, u32 c)
50 {
51         union {
52                 u64 ll;
53                 struct {
54                         u32 low, high;
55                 } l;
56         } u, res;
57         u64 rl, rh;
58
59         u.ll = a;
60         rl = (u64)u.l.low * (u64)b;
61         rh = (u64)u.l.high * (u64)b;
62         rh += (rl >> 32);
63         res.l.high = div64_u64(rh, c);
64         res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
65         return res.ll;
66 }
67
68 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
69 {
70         struct kvm_kpit_channel_state *c =
71                 &kvm->arch.vpit->pit_state.channels[channel];
72
73         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
74
75         switch (c->mode) {
76         default:
77         case 0:
78         case 4:
79                 /* XXX: just disable/enable counting */
80                 break;
81         case 1:
82         case 2:
83         case 3:
84         case 5:
85                 /* Restart counting on rising edge. */
86                 if (c->gate < val)
87                         c->count_load_time = ktime_get();
88                 break;
89         }
90
91         c->gate = val;
92 }
93
94 static int pit_get_gate(struct kvm *kvm, int channel)
95 {
96         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
97
98         return kvm->arch.vpit->pit_state.channels[channel].gate;
99 }
100
101 static int pit_get_count(struct kvm *kvm, int channel)
102 {
103         struct kvm_kpit_channel_state *c =
104                 &kvm->arch.vpit->pit_state.channels[channel];
105         s64 d, t;
106         int counter;
107
108         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
109
110         t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
111         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
112
113         switch (c->mode) {
114         case 0:
115         case 1:
116         case 4:
117         case 5:
118                 counter = (c->count - d) & 0xffff;
119                 break;
120         case 3:
121                 /* XXX: may be incorrect for odd counts */
122                 counter = c->count - (mod_64((2 * d), c->count));
123                 break;
124         default:
125                 counter = c->count - mod_64(d, c->count);
126                 break;
127         }
128         return counter;
129 }
130
131 static int pit_get_out(struct kvm *kvm, int channel)
132 {
133         struct kvm_kpit_channel_state *c =
134                 &kvm->arch.vpit->pit_state.channels[channel];
135         s64 d, t;
136         int out;
137
138         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
139
140         t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
141         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
142
143         switch (c->mode) {
144         default:
145         case 0:
146                 out = (d >= c->count);
147                 break;
148         case 1:
149                 out = (d < c->count);
150                 break;
151         case 2:
152                 out = ((mod_64(d, c->count) == 0) && (d != 0));
153                 break;
154         case 3:
155                 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
156                 break;
157         case 4:
158         case 5:
159                 out = (d == c->count);
160                 break;
161         }
162
163         return out;
164 }
165
166 static void pit_latch_count(struct kvm *kvm, int channel)
167 {
168         struct kvm_kpit_channel_state *c =
169                 &kvm->arch.vpit->pit_state.channels[channel];
170
171         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
172
173         if (!c->count_latched) {
174                 c->latched_count = pit_get_count(kvm, channel);
175                 c->count_latched = c->rw_mode;
176         }
177 }
178
179 static void pit_latch_status(struct kvm *kvm, int channel)
180 {
181         struct kvm_kpit_channel_state *c =
182                 &kvm->arch.vpit->pit_state.channels[channel];
183
184         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
185
186         if (!c->status_latched) {
187                 /* TODO: Return NULL COUNT (bit 6). */
188                 c->status = ((pit_get_out(kvm, channel) << 7) |
189                                 (c->rw_mode << 4) |
190                                 (c->mode << 1) |
191                                 c->bcd);
192                 c->status_latched = 1;
193         }
194 }
195
196 static int __pit_timer_fn(struct kvm_kpit_state *ps)
197 {
198         struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
199         struct kvm_kpit_timer *pt = &ps->pit_timer;
200
201         if (!atomic_inc_and_test(&pt->pending))
202                 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
203         if (vcpu0 && waitqueue_active(&vcpu0->wq)) {
204                 vcpu0->arch.mp_state = KVM_MP_STATE_RUNNABLE;
205                 wake_up_interruptible(&vcpu0->wq);
206         }
207
208         pt->timer.expires = ktime_add_ns(pt->timer.expires, pt->period);
209         pt->scheduled = ktime_to_ns(pt->timer.expires);
210         if (pt->period)
211                 ps->channels[0].count_load_time = pt->timer.expires;
212
213         return (pt->period == 0 ? 0 : 1);
214 }
215
216 int pit_has_pending_timer(struct kvm_vcpu *vcpu)
217 {
218         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
219
220         if (pit && vcpu->vcpu_id == 0 && pit->pit_state.irq_ack)
221                 return atomic_read(&pit->pit_state.pit_timer.pending);
222         return 0;
223 }
224
225 static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
226 {
227         struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
228                                                  irq_ack_notifier);
229         spin_lock(&ps->inject_lock);
230         if (atomic_dec_return(&ps->pit_timer.pending) < 0)
231                 atomic_inc(&ps->pit_timer.pending);
232         ps->irq_ack = 1;
233         spin_unlock(&ps->inject_lock);
234 }
235
236 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
237 {
238         struct kvm_kpit_state *ps;
239         int restart_timer = 0;
240
241         ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
242
243         restart_timer = __pit_timer_fn(ps);
244
245         if (restart_timer)
246                 return HRTIMER_RESTART;
247         else
248                 return HRTIMER_NORESTART;
249 }
250
251 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
252 {
253         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
254         struct hrtimer *timer;
255
256         if (vcpu->vcpu_id != 0 || !pit)
257                 return;
258
259         timer = &pit->pit_state.pit_timer.timer;
260         if (hrtimer_cancel(timer))
261                 hrtimer_start(timer, timer->expires, HRTIMER_MODE_ABS);
262 }
263
264 static void destroy_pit_timer(struct kvm_kpit_timer *pt)
265 {
266         pr_debug("pit: execute del timer!\n");
267         hrtimer_cancel(&pt->timer);
268 }
269
270 static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
271 {
272         struct kvm_kpit_timer *pt = &ps->pit_timer;
273         s64 interval;
274
275         interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
276
277         pr_debug("pit: create pit timer, interval is %llu nsec\n", interval);
278
279         /* TODO The new value only affected after the retriggered */
280         hrtimer_cancel(&pt->timer);
281         pt->period = (is_period == 0) ? 0 : interval;
282         pt->timer.function = pit_timer_fn;
283         atomic_set(&pt->pending, 0);
284         ps->irq_ack = 1;
285
286         hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
287                       HRTIMER_MODE_ABS);
288 }
289
290 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
291 {
292         struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
293
294         WARN_ON(!mutex_is_locked(&ps->lock));
295
296         pr_debug("pit: load_count val is %d, channel is %d\n", val, channel);
297
298         /*
299          * Though spec said the state of 8254 is undefined after power-up,
300          * seems some tricky OS like Windows XP depends on IRQ0 interrupt
301          * when booting up.
302          * So here setting initialize rate for it, and not a specific number
303          */
304         if (val == 0)
305                 val = 0x10000;
306
307         ps->channels[channel].count_load_time = ktime_get();
308         ps->channels[channel].count = val;
309
310         if (channel != 0)
311                 return;
312
313         /* Two types of timer
314          * mode 1 is one shot, mode 2 is period, otherwise del timer */
315         switch (ps->channels[0].mode) {
316         case 1:
317         /* FIXME: enhance mode 4 precision */
318         case 4:
319                 create_pit_timer(ps, val, 0);
320                 break;
321         case 2:
322         case 3:
323                 create_pit_timer(ps, val, 1);
324                 break;
325         default:
326                 destroy_pit_timer(&ps->pit_timer);
327         }
328 }
329
330 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val)
331 {
332         mutex_lock(&kvm->arch.vpit->pit_state.lock);
333         pit_load_count(kvm, channel, val);
334         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
335 }
336
337 static void pit_ioport_write(struct kvm_io_device *this,
338                              gpa_t addr, int len, const void *data)
339 {
340         struct kvm_pit *pit = (struct kvm_pit *)this->private;
341         struct kvm_kpit_state *pit_state = &pit->pit_state;
342         struct kvm *kvm = pit->kvm;
343         int channel, access;
344         struct kvm_kpit_channel_state *s;
345         u32 val = *(u32 *) data;
346
347         val  &= 0xff;
348         addr &= KVM_PIT_CHANNEL_MASK;
349
350         mutex_lock(&pit_state->lock);
351
352         if (val != 0)
353                 pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n",
354                           (unsigned int)addr, len, val);
355
356         if (addr == 3) {
357                 channel = val >> 6;
358                 if (channel == 3) {
359                         /* Read-Back Command. */
360                         for (channel = 0; channel < 3; channel++) {
361                                 s = &pit_state->channels[channel];
362                                 if (val & (2 << channel)) {
363                                         if (!(val & 0x20))
364                                                 pit_latch_count(kvm, channel);
365                                         if (!(val & 0x10))
366                                                 pit_latch_status(kvm, channel);
367                                 }
368                         }
369                 } else {
370                         /* Select Counter <channel>. */
371                         s = &pit_state->channels[channel];
372                         access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
373                         if (access == 0) {
374                                 pit_latch_count(kvm, channel);
375                         } else {
376                                 s->rw_mode = access;
377                                 s->read_state = access;
378                                 s->write_state = access;
379                                 s->mode = (val >> 1) & 7;
380                                 if (s->mode > 5)
381                                         s->mode -= 4;
382                                 s->bcd = val & 1;
383                         }
384                 }
385         } else {
386                 /* Write Count. */
387                 s = &pit_state->channels[addr];
388                 switch (s->write_state) {
389                 default:
390                 case RW_STATE_LSB:
391                         pit_load_count(kvm, addr, val);
392                         break;
393                 case RW_STATE_MSB:
394                         pit_load_count(kvm, addr, val << 8);
395                         break;
396                 case RW_STATE_WORD0:
397                         s->write_latch = val;
398                         s->write_state = RW_STATE_WORD1;
399                         break;
400                 case RW_STATE_WORD1:
401                         pit_load_count(kvm, addr, s->write_latch | (val << 8));
402                         s->write_state = RW_STATE_WORD0;
403                         break;
404                 }
405         }
406
407         mutex_unlock(&pit_state->lock);
408 }
409
410 static void pit_ioport_read(struct kvm_io_device *this,
411                             gpa_t addr, int len, void *data)
412 {
413         struct kvm_pit *pit = (struct kvm_pit *)this->private;
414         struct kvm_kpit_state *pit_state = &pit->pit_state;
415         struct kvm *kvm = pit->kvm;
416         int ret, count;
417         struct kvm_kpit_channel_state *s;
418
419         addr &= KVM_PIT_CHANNEL_MASK;
420         s = &pit_state->channels[addr];
421
422         mutex_lock(&pit_state->lock);
423
424         if (s->status_latched) {
425                 s->status_latched = 0;
426                 ret = s->status;
427         } else if (s->count_latched) {
428                 switch (s->count_latched) {
429                 default:
430                 case RW_STATE_LSB:
431                         ret = s->latched_count & 0xff;
432                         s->count_latched = 0;
433                         break;
434                 case RW_STATE_MSB:
435                         ret = s->latched_count >> 8;
436                         s->count_latched = 0;
437                         break;
438                 case RW_STATE_WORD0:
439                         ret = s->latched_count & 0xff;
440                         s->count_latched = RW_STATE_MSB;
441                         break;
442                 }
443         } else {
444                 switch (s->read_state) {
445                 default:
446                 case RW_STATE_LSB:
447                         count = pit_get_count(kvm, addr);
448                         ret = count & 0xff;
449                         break;
450                 case RW_STATE_MSB:
451                         count = pit_get_count(kvm, addr);
452                         ret = (count >> 8) & 0xff;
453                         break;
454                 case RW_STATE_WORD0:
455                         count = pit_get_count(kvm, addr);
456                         ret = count & 0xff;
457                         s->read_state = RW_STATE_WORD1;
458                         break;
459                 case RW_STATE_WORD1:
460                         count = pit_get_count(kvm, addr);
461                         ret = (count >> 8) & 0xff;
462                         s->read_state = RW_STATE_WORD0;
463                         break;
464                 }
465         }
466
467         if (len > sizeof(ret))
468                 len = sizeof(ret);
469         memcpy(data, (char *)&ret, len);
470
471         mutex_unlock(&pit_state->lock);
472 }
473
474 static int pit_in_range(struct kvm_io_device *this, gpa_t addr,
475                         int len, int is_write)
476 {
477         return ((addr >= KVM_PIT_BASE_ADDRESS) &&
478                 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
479 }
480
481 static void speaker_ioport_write(struct kvm_io_device *this,
482                                  gpa_t addr, int len, const void *data)
483 {
484         struct kvm_pit *pit = (struct kvm_pit *)this->private;
485         struct kvm_kpit_state *pit_state = &pit->pit_state;
486         struct kvm *kvm = pit->kvm;
487         u32 val = *(u32 *) data;
488
489         mutex_lock(&pit_state->lock);
490         pit_state->speaker_data_on = (val >> 1) & 1;
491         pit_set_gate(kvm, 2, val & 1);
492         mutex_unlock(&pit_state->lock);
493 }
494
495 static void speaker_ioport_read(struct kvm_io_device *this,
496                                 gpa_t addr, int len, void *data)
497 {
498         struct kvm_pit *pit = (struct kvm_pit *)this->private;
499         struct kvm_kpit_state *pit_state = &pit->pit_state;
500         struct kvm *kvm = pit->kvm;
501         unsigned int refresh_clock;
502         int ret;
503
504         /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
505         refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
506
507         mutex_lock(&pit_state->lock);
508         ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
509                 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
510         if (len > sizeof(ret))
511                 len = sizeof(ret);
512         memcpy(data, (char *)&ret, len);
513         mutex_unlock(&pit_state->lock);
514 }
515
516 static int speaker_in_range(struct kvm_io_device *this, gpa_t addr,
517                             int len, int is_write)
518 {
519         return (addr == KVM_SPEAKER_BASE_ADDRESS);
520 }
521
522 void kvm_pit_reset(struct kvm_pit *pit)
523 {
524         int i;
525         struct kvm_kpit_channel_state *c;
526
527         mutex_lock(&pit->pit_state.lock);
528         for (i = 0; i < 3; i++) {
529                 c = &pit->pit_state.channels[i];
530                 c->mode = 0xff;
531                 c->gate = (i != 2);
532                 pit_load_count(pit->kvm, i, 0);
533         }
534         mutex_unlock(&pit->pit_state.lock);
535
536         atomic_set(&pit->pit_state.pit_timer.pending, 0);
537         pit->pit_state.irq_ack = 1;
538 }
539
540 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
541 {
542         struct kvm_pit *pit;
543         struct kvm_kpit_state *pit_state;
544
545         pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
546         if (!pit)
547                 return NULL;
548
549         mutex_init(&pit->pit_state.lock);
550         mutex_lock(&pit->pit_state.lock);
551         spin_lock_init(&pit->pit_state.inject_lock);
552
553         /* Initialize PIO device */
554         pit->dev.read = pit_ioport_read;
555         pit->dev.write = pit_ioport_write;
556         pit->dev.in_range = pit_in_range;
557         pit->dev.private = pit;
558         kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev);
559
560         pit->speaker_dev.read = speaker_ioport_read;
561         pit->speaker_dev.write = speaker_ioport_write;
562         pit->speaker_dev.in_range = speaker_in_range;
563         pit->speaker_dev.private = pit;
564         kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev);
565
566         kvm->arch.vpit = pit;
567         pit->kvm = kvm;
568
569         pit_state = &pit->pit_state;
570         pit_state->pit = pit;
571         hrtimer_init(&pit_state->pit_timer.timer,
572                      CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
573         pit_state->irq_ack_notifier.gsi = 0;
574         pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
575         kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
576         mutex_unlock(&pit->pit_state.lock);
577
578         kvm_pit_reset(pit);
579
580         return pit;
581 }
582
583 void kvm_free_pit(struct kvm *kvm)
584 {
585         struct hrtimer *timer;
586
587         if (kvm->arch.vpit) {
588                 mutex_lock(&kvm->arch.vpit->pit_state.lock);
589                 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
590                 hrtimer_cancel(timer);
591                 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
592                 kfree(kvm->arch.vpit);
593         }
594 }
595
596 static void __inject_pit_timer_intr(struct kvm *kvm)
597 {
598         mutex_lock(&kvm->lock);
599         kvm_set_irq(kvm, 0, 1);
600         kvm_set_irq(kvm, 0, 0);
601         mutex_unlock(&kvm->lock);
602 }
603
604 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
605 {
606         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
607         struct kvm *kvm = vcpu->kvm;
608         struct kvm_kpit_state *ps;
609
610         if (vcpu && pit) {
611                 int inject = 0;
612                 ps = &pit->pit_state;
613
614                 /* Try to inject pending interrupts when
615                  * last one has been acked.
616                  */
617                 spin_lock(&ps->inject_lock);
618                 if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) {
619                         ps->irq_ack = 0;
620                         inject = 1;
621                 }
622                 spin_unlock(&ps->inject_lock);
623                 if (inject)
624                         __inject_pit_timer_intr(kvm);
625         }
626 }