Merge branch 'for-linus' of git://neil.brown.name/md
[linux-2.6] / sound / pci / echoaudio / darla24_dsp.c
1 /***************************************************************************
2
3    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4    All rights reserved
5    www.echoaudio.com
6
7    This file is part of Echo Digital Audio's generic driver library.
8
9    Echo Digital Audio's generic driver library is free software;
10    you can redistribute it and/or modify it under the terms of
11    the GNU General Public License as published by the Free Software
12    Foundation.
13
14    This program is distributed in the hope that it will be useful,
15    but WITHOUT ANY WARRANTY; without even the implied warranty of
16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17    GNU General Public License for more details.
18
19    You should have received a copy of the GNU General Public License
20    along with this program; if not, write to the Free Software
21    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22    MA  02111-1307, USA.
23
24    *************************************************************************
25
26  Translation from C++ and adaptation for use in ALSA-Driver
27  were made by Giuliano Pochini <pochini@shiny.it>
28
29 ****************************************************************************/
30
31
32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
33 {
34         int err;
35
36         DE_INIT(("init_hw() - Darla24\n"));
37         if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA24))
38                 return -ENODEV;
39
40         if ((err = init_dsp_comm_page(chip))) {
41                 DE_INIT(("init_hw - could not initialize DSP comm page\n"));
42                 return err;
43         }
44
45         chip->device_id = device_id;
46         chip->subdevice_id = subdevice_id;
47         chip->bad_board = TRUE;
48         chip->dsp_code_to_load = &card_fw[FW_DARLA24_DSP];
49         /* Since this card has no ASIC, mark it as loaded so everything
50            works OK */
51         chip->asic_loaded = TRUE;
52         chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
53                 ECHO_CLOCK_BIT_ESYNC;
54
55         if ((err = load_firmware(chip)) < 0)
56                 return err;
57         chip->bad_board = FALSE;
58
59         if ((err = init_line_levels(chip)) < 0)
60                 return err;
61
62         DE_INIT(("init_hw done\n"));
63         return err;
64 }
65
66
67
68 static u32 detect_input_clocks(const struct echoaudio *chip)
69 {
70         u32 clocks_from_dsp, clock_bits;
71
72         /* Map the DSP clock detect bits to the generic driver clock
73            detect bits */
74         clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
75
76         clock_bits = ECHO_CLOCK_BIT_INTERNAL;
77
78         if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC)
79                 clock_bits |= ECHO_CLOCK_BIT_ESYNC;
80
81         return clock_bits;
82 }
83
84
85
86 /* The Darla24 has no ASIC. Just do nothing */
87 static int load_asic(struct echoaudio *chip)
88 {
89         return 0;
90 }
91
92
93
94 static int set_sample_rate(struct echoaudio *chip, u32 rate)
95 {
96         u8 clock;
97
98         switch (rate) {
99         case 96000:
100                 clock = GD24_96000;
101                 break;
102         case 88200:
103                 clock = GD24_88200;
104                 break;
105         case 48000:
106                 clock = GD24_48000;
107                 break;
108         case 44100:
109                 clock = GD24_44100;
110                 break;
111         case 32000:
112                 clock = GD24_32000;
113                 break;
114         case 22050:
115                 clock = GD24_22050;
116                 break;
117         case 16000:
118                 clock = GD24_16000;
119                 break;
120         case 11025:
121                 clock = GD24_11025;
122                 break;
123         case 8000:
124                 clock = GD24_8000;
125                 break;
126         default:
127                 DE_ACT(("set_sample_rate: Error, invalid sample rate %d\n",
128                         rate));
129                 return -EINVAL;
130         }
131
132         if (wait_handshake(chip))
133                 return -EIO;
134
135         DE_ACT(("set_sample_rate: %d clock %d\n", rate, clock));
136         chip->sample_rate = rate;
137
138         /* Override the sample rate if this card is set to Echo sync. */
139         if (chip->input_clock == ECHO_CLOCK_ESYNC)
140                 clock = GD24_EXT_SYNC;
141
142         chip->comm_page->sample_rate = cpu_to_le32(rate);       /* ignored by the DSP ? */
143         chip->comm_page->gd_clock_state = clock;
144         clear_handshake(chip);
145         return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
146 }
147
148
149
150 static int set_input_clock(struct echoaudio *chip, u16 clock)
151 {
152         if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
153                        clock != ECHO_CLOCK_ESYNC))
154                 return -EINVAL;
155         chip->input_clock = clock;
156         return set_sample_rate(chip, chip->sample_rate);
157 }
158