2 * This file manages the translation entries for the IBM Calgary IOMMU.
4 * Derived from arch/powerpc/platforms/pseries/iommu.c
6 * Copyright (C) IBM Corporation, 2006
8 * Author: Jon Mason <jdmason@us.ibm.com>
9 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/config.h>
27 #include <linux/types.h>
28 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/string.h>
32 #include <linux/pci.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/bootmem.h>
36 #include <asm/calgary.h>
37 #include <asm/proto.h>
39 /* flush a tce at 'tceaddr' to main memory */
40 static inline void flush_tce(void* tceaddr)
42 /* a single tce can't cross a cache line */
44 asm volatile("clflush (%0)" :: "r" (tceaddr));
46 asm volatile("wbinvd":::"memory");
49 void tce_build(struct iommu_table *tbl, unsigned long index,
50 unsigned int npages, unsigned long uaddr, int direction)
56 t = (1 << TCE_READ_SHIFT);
57 if (direction != DMA_TO_DEVICE)
58 t |= (1 << TCE_WRITE_SHIFT);
60 tp = ((u64*)tbl->it_base) + index;
63 rpn = (virt_to_bus((void*)uaddr)) >> PAGE_SHIFT;
65 t |= (rpn << TCE_RPN_SHIFT);
75 void tce_free(struct iommu_table *tbl, long index, unsigned int npages)
79 tp = ((u64*)tbl->it_base) + index;
88 static inline unsigned int table_size_to_number_of_entries(unsigned char size)
91 * size is the order of the table, 0-7
92 * smallest table is 8K entries, so shift result by 13 to
95 return (1 << size) << 13;
98 static int tce_table_setparms(struct pci_dev *dev, struct iommu_table *tbl)
100 unsigned int bitmapsz;
101 unsigned long bmppages;
104 tbl->it_busno = dev->bus->number;
106 /* set the tce table size - measured in entries */
107 tbl->it_size = table_size_to_number_of_entries(specified_table_size);
109 tbl->it_base = (unsigned long)tce_table_kva[dev->bus->number];
111 printk(KERN_ERR "Calgary: iommu_table_setparms: "
112 "no table allocated?!\n");
118 * number of bytes needed for the bitmap size in number of
119 * entries; we need one bit per entry
121 bitmapsz = tbl->it_size / BITS_PER_BYTE;
122 bmppages = __get_free_pages(GFP_KERNEL, get_order(bitmapsz));
124 printk(KERN_ERR "Calgary: cannot allocate bitmap\n");
129 tbl->it_map = (unsigned long*)bmppages;
131 memset(tbl->it_map, 0, bitmapsz);
135 spin_lock_init(&tbl->it_lock);
143 int build_tce_table(struct pci_dev *dev, void __iomem *bbar)
145 struct iommu_table *tbl;
149 printk(KERN_ERR "Calgary: dev %p has sysdata %p\n",
154 tbl = kzalloc(sizeof(struct iommu_table), GFP_KERNEL);
156 printk(KERN_ERR "Calgary: error allocating iommu_table\n");
161 ret = tce_table_setparms(dev, tbl);
165 tce_free(tbl, 0, tbl->it_size);
170 * NUMA is already using the bus's sysdata pointer, so we use
171 * the bus's pci_dev's sysdata instead.
183 void* alloc_tce_table(void)
187 size = table_size_to_number_of_entries(specified_table_size);
188 size *= TCE_ENTRY_SIZE;
190 return __alloc_bootmem_low(size, size, 0);
193 void free_tce_table(void *tbl)
200 size = table_size_to_number_of_entries(specified_table_size);
201 size *= TCE_ENTRY_SIZE;
203 free_bootmem(__pa(tbl), size);