2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/sched.h>
16 #include <linux/threads.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
34 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
46 #endif /* CONFIG_PPC32 */
47 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
49 /* This table only contains "desktop" CPUs, it need to be filled with embedded
52 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
54 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
57 /* We only set the spe features if the kernel was compiled with
61 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
63 #define PPC_FEATURE_SPE_COMP 0
66 struct cpu_spec cpu_specs[] = {
69 .pvr_mask = 0xffff0000,
70 .pvr_value = 0x00400000,
71 .cpu_name = "POWER3 (630)",
72 .cpu_features = CPU_FTRS_POWER3,
73 .cpu_user_features = COMMON_USER_PPC64,
77 .cpu_setup = __setup_cpu_power3,
78 #ifdef CONFIG_OPROFILE
79 .oprofile_cpu_type = "ppc64/power3",
80 .oprofile_model = &op_model_rs64,
84 .pvr_mask = 0xffff0000,
85 .pvr_value = 0x00410000,
86 .cpu_name = "POWER3 (630+)",
87 .cpu_features = CPU_FTRS_POWER3,
88 .cpu_user_features = COMMON_USER_PPC64,
92 .cpu_setup = __setup_cpu_power3,
93 #ifdef CONFIG_OPROFILE
94 .oprofile_cpu_type = "ppc64/power3",
95 .oprofile_model = &op_model_rs64,
99 .pvr_mask = 0xffff0000,
100 .pvr_value = 0x00330000,
101 .cpu_name = "RS64-II (northstar)",
102 .cpu_features = CPU_FTRS_RS64,
103 .cpu_user_features = COMMON_USER_PPC64,
107 .cpu_setup = __setup_cpu_power3,
108 #ifdef CONFIG_OPROFILE
109 .oprofile_cpu_type = "ppc64/rs64",
110 .oprofile_model = &op_model_rs64,
114 .pvr_mask = 0xffff0000,
115 .pvr_value = 0x00340000,
116 .cpu_name = "RS64-III (pulsar)",
117 .cpu_features = CPU_FTRS_RS64,
118 .cpu_user_features = COMMON_USER_PPC64,
122 .cpu_setup = __setup_cpu_power3,
123 #ifdef CONFIG_OPROFILE
124 .oprofile_cpu_type = "ppc64/rs64",
125 .oprofile_model = &op_model_rs64,
129 .pvr_mask = 0xffff0000,
130 .pvr_value = 0x00360000,
131 .cpu_name = "RS64-III (icestar)",
132 .cpu_features = CPU_FTRS_RS64,
133 .cpu_user_features = COMMON_USER_PPC64,
137 .cpu_setup = __setup_cpu_power3,
138 #ifdef CONFIG_OPROFILE
139 .oprofile_cpu_type = "ppc64/rs64",
140 .oprofile_model = &op_model_rs64,
144 .pvr_mask = 0xffff0000,
145 .pvr_value = 0x00370000,
146 .cpu_name = "RS64-IV (sstar)",
147 .cpu_features = CPU_FTRS_RS64,
148 .cpu_user_features = COMMON_USER_PPC64,
152 .cpu_setup = __setup_cpu_power3,
153 #ifdef CONFIG_OPROFILE
154 .oprofile_cpu_type = "ppc64/rs64",
155 .oprofile_model = &op_model_rs64,
159 .pvr_mask = 0xffff0000,
160 .pvr_value = 0x00350000,
161 .cpu_name = "POWER4 (gp)",
162 .cpu_features = CPU_FTRS_POWER4,
163 .cpu_user_features = COMMON_USER_PPC64,
167 .cpu_setup = __setup_cpu_power4,
168 #ifdef CONFIG_OPROFILE
169 .oprofile_cpu_type = "ppc64/power4",
170 .oprofile_model = &op_model_rs64,
174 .pvr_mask = 0xffff0000,
175 .pvr_value = 0x00380000,
176 .cpu_name = "POWER4+ (gq)",
177 .cpu_features = CPU_FTRS_POWER4,
178 .cpu_user_features = COMMON_USER_PPC64,
182 .cpu_setup = __setup_cpu_power4,
183 #ifdef CONFIG_OPROFILE
184 .oprofile_cpu_type = "ppc64/power4",
185 .oprofile_model = &op_model_power4,
189 .pvr_mask = 0xffff0000,
190 .pvr_value = 0x00390000,
191 .cpu_name = "PPC970",
192 .cpu_features = CPU_FTRS_PPC970,
193 .cpu_user_features = COMMON_USER_PPC64 |
194 PPC_FEATURE_HAS_ALTIVEC_COMP,
198 .cpu_setup = __setup_cpu_ppc970,
199 #ifdef CONFIG_OPROFILE
200 .oprofile_cpu_type = "ppc64/970",
201 .oprofile_model = &op_model_power4,
204 #endif /* CONFIG_PPC64 */
205 #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
207 .pvr_mask = 0xffff0000,
208 .pvr_value = 0x003c0000,
209 .cpu_name = "PPC970FX",
211 .cpu_features = CPU_FTRS_970_32,
213 .cpu_features = CPU_FTRS_PPC970,
215 .cpu_user_features = COMMON_USER_PPC64 |
216 PPC_FEATURE_HAS_ALTIVEC_COMP,
220 .cpu_setup = __setup_cpu_ppc970,
221 #ifdef CONFIG_OPROFILE
222 .oprofile_cpu_type = "ppc64/970",
223 .oprofile_model = &op_model_power4,
226 #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
229 .pvr_mask = 0xffff0000,
230 .pvr_value = 0x00440000,
231 .cpu_name = "PPC970MP",
232 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_PPC64 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP,
237 .cpu_setup = __setup_cpu_ppc970,
238 #ifdef CONFIG_OPROFILE
239 .oprofile_cpu_type = "ppc64/970",
240 .oprofile_model = &op_model_power4,
244 .pvr_mask = 0xffff0000,
245 .pvr_value = 0x003a0000,
246 .cpu_name = "POWER5 (gr)",
247 .cpu_features = CPU_FTRS_POWER5,
248 .cpu_user_features = COMMON_USER_PPC64,
252 .cpu_setup = __setup_cpu_power4,
253 #ifdef CONFIG_OPROFILE
254 .oprofile_cpu_type = "ppc64/power5",
255 .oprofile_model = &op_model_power4,
259 .pvr_mask = 0xffff0000,
260 .pvr_value = 0x003b0000,
261 .cpu_name = "POWER5 (gs)",
262 .cpu_features = CPU_FTRS_POWER5,
263 .cpu_user_features = COMMON_USER_PPC64,
267 .cpu_setup = __setup_cpu_power4,
268 #ifdef CONFIG_OPROFILE
269 .oprofile_cpu_type = "ppc64/power5",
270 .oprofile_model = &op_model_power4,
274 .pvr_mask = 0xffff0000,
275 .pvr_value = 0x00700000,
276 .cpu_name = "Cell Broadband Engine",
277 .cpu_features = CPU_FTRS_CELL,
278 .cpu_user_features = COMMON_USER_PPC64 |
279 PPC_FEATURE_HAS_ALTIVEC_COMP,
282 .cpu_setup = __setup_cpu_be,
284 { /* default match */
285 .pvr_mask = 0x00000000,
286 .pvr_value = 0x00000000,
287 .cpu_name = "POWER4 (compatible)",
288 .cpu_features = CPU_FTRS_COMPATIBLE,
289 .cpu_user_features = COMMON_USER_PPC64,
293 .cpu_setup = __setup_cpu_power4,
295 #endif /* CONFIG_PPC64 */
299 .pvr_mask = 0xffff0000,
300 .pvr_value = 0x00010000,
302 .cpu_features = CPU_FTRS_PPC601,
303 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
304 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
309 .pvr_mask = 0xffff0000,
310 .pvr_value = 0x00030000,
312 .cpu_features = CPU_FTRS_603,
313 .cpu_user_features = COMMON_USER,
316 .cpu_setup = __setup_cpu_603
319 .pvr_mask = 0xffff0000,
320 .pvr_value = 0x00060000,
322 .cpu_features = CPU_FTRS_603,
323 .cpu_user_features = COMMON_USER,
326 .cpu_setup = __setup_cpu_603
329 .pvr_mask = 0xffff0000,
330 .pvr_value = 0x00070000,
332 .cpu_features = CPU_FTRS_603,
333 .cpu_user_features = COMMON_USER,
336 .cpu_setup = __setup_cpu_603
339 .pvr_mask = 0xffff0000,
340 .pvr_value = 0x00040000,
342 .cpu_features = CPU_FTRS_604,
343 .cpu_user_features = COMMON_USER,
347 .cpu_setup = __setup_cpu_604
350 .pvr_mask = 0xfffff000,
351 .pvr_value = 0x00090000,
353 .cpu_features = CPU_FTRS_604,
354 .cpu_user_features = COMMON_USER,
358 .cpu_setup = __setup_cpu_604
361 .pvr_mask = 0xffff0000,
362 .pvr_value = 0x00090000,
364 .cpu_features = CPU_FTRS_604,
365 .cpu_user_features = COMMON_USER,
369 .cpu_setup = __setup_cpu_604
372 .pvr_mask = 0xffff0000,
373 .pvr_value = 0x000a0000,
375 .cpu_features = CPU_FTRS_604,
376 .cpu_user_features = COMMON_USER,
380 .cpu_setup = __setup_cpu_604
382 { /* 740/750 (0x4202, don't support TAU ?) */
383 .pvr_mask = 0xffffffff,
384 .pvr_value = 0x00084202,
385 .cpu_name = "740/750",
386 .cpu_features = CPU_FTRS_740_NOTAU,
387 .cpu_user_features = COMMON_USER,
391 .cpu_setup = __setup_cpu_750
393 { /* 750CX (80100 and 8010x?) */
394 .pvr_mask = 0xfffffff0,
395 .pvr_value = 0x00080100,
397 .cpu_features = CPU_FTRS_750,
398 .cpu_user_features = COMMON_USER,
402 .cpu_setup = __setup_cpu_750cx
404 { /* 750CX (82201 and 82202) */
405 .pvr_mask = 0xfffffff0,
406 .pvr_value = 0x00082200,
408 .cpu_features = CPU_FTRS_750,
409 .cpu_user_features = COMMON_USER,
413 .cpu_setup = __setup_cpu_750cx
415 { /* 750CXe (82214) */
416 .pvr_mask = 0xfffffff0,
417 .pvr_value = 0x00082210,
418 .cpu_name = "750CXe",
419 .cpu_features = CPU_FTRS_750,
420 .cpu_user_features = COMMON_USER,
424 .cpu_setup = __setup_cpu_750cx
426 { /* 750CXe "Gekko" (83214) */
427 .pvr_mask = 0xffffffff,
428 .pvr_value = 0x00083214,
429 .cpu_name = "750CXe",
430 .cpu_features = CPU_FTRS_750,
431 .cpu_user_features = COMMON_USER,
435 .cpu_setup = __setup_cpu_750cx
438 .pvr_mask = 0xfffff000,
439 .pvr_value = 0x00083000,
440 .cpu_name = "745/755",
441 .cpu_features = CPU_FTRS_750,
442 .cpu_user_features = COMMON_USER,
446 .cpu_setup = __setup_cpu_750
448 { /* 750FX rev 1.x */
449 .pvr_mask = 0xffffff00,
450 .pvr_value = 0x70000100,
452 .cpu_features = CPU_FTRS_750FX1,
453 .cpu_user_features = COMMON_USER,
457 .cpu_setup = __setup_cpu_750
459 { /* 750FX rev 2.0 must disable HID0[DPM] */
460 .pvr_mask = 0xffffffff,
461 .pvr_value = 0x70000200,
463 .cpu_features = CPU_FTRS_750FX2,
464 .cpu_user_features = COMMON_USER,
468 .cpu_setup = __setup_cpu_750
470 { /* 750FX (All revs except 2.0) */
471 .pvr_mask = 0xffff0000,
472 .pvr_value = 0x70000000,
474 .cpu_features = CPU_FTRS_750FX,
475 .cpu_user_features = COMMON_USER,
479 .cpu_setup = __setup_cpu_750fx
482 .pvr_mask = 0xffff0000,
483 .pvr_value = 0x70020000,
485 .cpu_features = CPU_FTRS_750GX,
486 .cpu_user_features = COMMON_USER,
490 .cpu_setup = __setup_cpu_750fx
492 { /* 740/750 (L2CR bit need fixup for 740) */
493 .pvr_mask = 0xffff0000,
494 .pvr_value = 0x00080000,
495 .cpu_name = "740/750",
496 .cpu_features = CPU_FTRS_740,
497 .cpu_user_features = COMMON_USER,
501 .cpu_setup = __setup_cpu_750
503 { /* 7400 rev 1.1 ? (no TAU) */
504 .pvr_mask = 0xffffffff,
505 .pvr_value = 0x000c1101,
506 .cpu_name = "7400 (1.1)",
507 .cpu_features = CPU_FTRS_7400_NOTAU,
508 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
512 .cpu_setup = __setup_cpu_7400
515 .pvr_mask = 0xffff0000,
516 .pvr_value = 0x000c0000,
518 .cpu_features = CPU_FTRS_7400,
519 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
523 .cpu_setup = __setup_cpu_7400
526 .pvr_mask = 0xffff0000,
527 .pvr_value = 0x800c0000,
529 .cpu_features = CPU_FTRS_7400,
530 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
534 .cpu_setup = __setup_cpu_7410
536 { /* 7450 2.0 - no doze/nap */
537 .pvr_mask = 0xffffffff,
538 .pvr_value = 0x80000200,
540 .cpu_features = CPU_FTRS_7450_20,
541 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
545 .cpu_setup = __setup_cpu_745x
548 .pvr_mask = 0xffffffff,
549 .pvr_value = 0x80000201,
551 .cpu_features = CPU_FTRS_7450_21,
552 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
556 .cpu_setup = __setup_cpu_745x
558 { /* 7450 2.3 and newer */
559 .pvr_mask = 0xffff0000,
560 .pvr_value = 0x80000000,
562 .cpu_features = CPU_FTRS_7450_23,
563 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
567 .cpu_setup = __setup_cpu_745x
570 .pvr_mask = 0xffffff00,
571 .pvr_value = 0x80010100,
573 .cpu_features = CPU_FTRS_7455_1,
574 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
578 .cpu_setup = __setup_cpu_745x
581 .pvr_mask = 0xffffffff,
582 .pvr_value = 0x80010200,
584 .cpu_features = CPU_FTRS_7455_20,
585 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
589 .cpu_setup = __setup_cpu_745x
592 .pvr_mask = 0xffff0000,
593 .pvr_value = 0x80010000,
595 .cpu_features = CPU_FTRS_7455,
596 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
600 .cpu_setup = __setup_cpu_745x
602 { /* 7447/7457 Rev 1.0 */
603 .pvr_mask = 0xffffffff,
604 .pvr_value = 0x80020100,
605 .cpu_name = "7447/7457",
606 .cpu_features = CPU_FTRS_7447_10,
607 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
611 .cpu_setup = __setup_cpu_745x
613 { /* 7447/7457 Rev 1.1 */
614 .pvr_mask = 0xffffffff,
615 .pvr_value = 0x80020101,
616 .cpu_name = "7447/7457",
617 .cpu_features = CPU_FTRS_7447_10,
618 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
622 .cpu_setup = __setup_cpu_745x
624 { /* 7447/7457 Rev 1.2 and later */
625 .pvr_mask = 0xffff0000,
626 .pvr_value = 0x80020000,
627 .cpu_name = "7447/7457",
628 .cpu_features = CPU_FTRS_7447,
629 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
633 .cpu_setup = __setup_cpu_745x
636 .pvr_mask = 0xffff0000,
637 .pvr_value = 0x80030000,
639 .cpu_features = CPU_FTRS_7447A,
640 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
644 .cpu_setup = __setup_cpu_745x
647 .pvr_mask = 0xffff0000,
648 .pvr_value = 0x80040000,
650 .cpu_features = CPU_FTRS_7447A,
651 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
655 .cpu_setup = __setup_cpu_745x
657 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
658 .pvr_mask = 0x7fff0000,
659 .pvr_value = 0x00810000,
661 .cpu_features = CPU_FTRS_82XX,
662 .cpu_user_features = COMMON_USER,
665 .cpu_setup = __setup_cpu_603
667 { /* All G2_LE (603e core, plus some) have the same pvr */
668 .pvr_mask = 0x7fff0000,
669 .pvr_value = 0x00820000,
671 .cpu_features = CPU_FTRS_G2_LE,
672 .cpu_user_features = COMMON_USER,
675 .cpu_setup = __setup_cpu_603
677 { /* e300 (a 603e core, plus some) on 83xx */
678 .pvr_mask = 0x7fff0000,
679 .pvr_value = 0x00830000,
681 .cpu_features = CPU_FTRS_E300,
682 .cpu_user_features = COMMON_USER,
685 .cpu_setup = __setup_cpu_603
687 { /* default match, we assume split I/D cache & TB (non-601)... */
688 .pvr_mask = 0x00000000,
689 .pvr_value = 0x00000000,
690 .cpu_name = "(generic PPC)",
691 .cpu_features = CPU_FTRS_CLASSIC32,
692 .cpu_user_features = COMMON_USER,
696 #endif /* CLASSIC_PPC */
699 .pvr_mask = 0xffff0000,
700 .pvr_value = 0x00500000,
702 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
703 * if the 8xx code is there.... */
704 .cpu_features = CPU_FTRS_8XX,
705 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
709 #endif /* CONFIG_8xx */
712 .pvr_mask = 0xffffff00,
713 .pvr_value = 0x00200200,
715 .cpu_features = CPU_FTRS_40X,
716 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
721 .pvr_mask = 0xffffff00,
722 .pvr_value = 0x00201400,
723 .cpu_name = "403GCX",
724 .cpu_features = CPU_FTRS_40X,
725 .cpu_user_features = PPC_FEATURE_32 |
726 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
731 .pvr_mask = 0xffff0000,
732 .pvr_value = 0x00200000,
733 .cpu_name = "403G ??",
734 .cpu_features = CPU_FTRS_40X,
735 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
740 .pvr_mask = 0xffff0000,
741 .pvr_value = 0x40110000,
743 .cpu_features = CPU_FTRS_40X,
744 .cpu_user_features = PPC_FEATURE_32 |
745 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
750 .pvr_mask = 0xffff0000,
751 .pvr_value = 0x40130000,
752 .cpu_name = "STB03xxx",
753 .cpu_features = CPU_FTRS_40X,
754 .cpu_user_features = PPC_FEATURE_32 |
755 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
760 .pvr_mask = 0xffff0000,
761 .pvr_value = 0x41810000,
762 .cpu_name = "STB04xxx",
763 .cpu_features = CPU_FTRS_40X,
764 .cpu_user_features = PPC_FEATURE_32 |
765 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
770 .pvr_mask = 0xffff0000,
771 .pvr_value = 0x41610000,
772 .cpu_name = "NP405L",
773 .cpu_features = CPU_FTRS_40X,
774 .cpu_user_features = PPC_FEATURE_32 |
775 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
780 .pvr_mask = 0xffff0000,
781 .pvr_value = 0x40B10000,
782 .cpu_name = "NP4GS3",
783 .cpu_features = CPU_FTRS_40X,
784 .cpu_user_features = PPC_FEATURE_32 |
785 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
790 .pvr_mask = 0xffff0000,
791 .pvr_value = 0x41410000,
792 .cpu_name = "NP405H",
793 .cpu_features = CPU_FTRS_40X,
794 .cpu_user_features = PPC_FEATURE_32 |
795 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
800 .pvr_mask = 0xffff0000,
801 .pvr_value = 0x50910000,
802 .cpu_name = "405GPr",
803 .cpu_features = CPU_FTRS_40X,
804 .cpu_user_features = PPC_FEATURE_32 |
805 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
810 .pvr_mask = 0xffff0000,
811 .pvr_value = 0x51510000,
812 .cpu_name = "STBx25xx",
813 .cpu_features = CPU_FTRS_40X,
814 .cpu_user_features = PPC_FEATURE_32 |
815 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
820 .pvr_mask = 0xffff0000,
821 .pvr_value = 0x41F10000,
823 .cpu_features = CPU_FTRS_40X,
824 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
828 { /* Xilinx Virtex-II Pro */
829 .pvr_mask = 0xffff0000,
830 .pvr_value = 0x20010000,
831 .cpu_name = "Virtex-II Pro",
832 .cpu_features = CPU_FTRS_40X,
833 .cpu_user_features = PPC_FEATURE_32 |
834 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
839 .pvr_mask = 0xffff0000,
840 .pvr_value = 0x51210000,
842 .cpu_features = CPU_FTRS_40X,
843 .cpu_user_features = PPC_FEATURE_32 |
844 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
849 #endif /* CONFIG_40x */
852 .pvr_mask = 0xf0000fff,
853 .pvr_value = 0x40000850,
854 .cpu_name = "440EP Rev. A",
855 .cpu_features = CPU_FTRS_44X,
856 .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
861 .pvr_mask = 0xf0000fff,
862 .pvr_value = 0x400008d3,
863 .cpu_name = "440EP Rev. B",
864 .cpu_features = CPU_FTRS_44X,
865 .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
870 .pvr_mask = 0xf0000fff,
871 .pvr_value = 0x40000440,
872 .cpu_name = "440GP Rev. B",
873 .cpu_features = CPU_FTRS_44X,
874 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
879 .pvr_mask = 0xf0000fff,
880 .pvr_value = 0x40000481,
881 .cpu_name = "440GP Rev. C",
882 .cpu_features = CPU_FTRS_44X,
883 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
888 .pvr_mask = 0xf0000fff,
889 .pvr_value = 0x50000850,
890 .cpu_name = "440GX Rev. A",
891 .cpu_features = CPU_FTRS_44X,
892 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
897 .pvr_mask = 0xf0000fff,
898 .pvr_value = 0x50000851,
899 .cpu_name = "440GX Rev. B",
900 .cpu_features = CPU_FTRS_44X,
901 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
906 .pvr_mask = 0xf0000fff,
907 .pvr_value = 0x50000892,
908 .cpu_name = "440GX Rev. C",
909 .cpu_features = CPU_FTRS_44X,
910 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
915 .pvr_mask = 0xf0000fff,
916 .pvr_value = 0x50000894,
917 .cpu_name = "440GX Rev. F",
918 .cpu_features = CPU_FTRS_44X,
919 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
924 .pvr_mask = 0xff000fff,
925 .pvr_value = 0x53000891,
926 .cpu_name = "440SP Rev. A",
927 .cpu_features = CPU_FTRS_44X,
928 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
932 { /* 440SPe Rev. A */
933 .pvr_mask = 0xff000fff,
934 .pvr_value = 0x53000890,
935 .cpu_name = "440SPe Rev. A",
936 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
938 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
942 #endif /* CONFIG_44x */
943 #ifdef CONFIG_FSL_BOOKE
945 .pvr_mask = 0xfff00000,
946 .pvr_value = 0x81000000,
947 .cpu_name = "e200z5",
948 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
949 .cpu_features = CPU_FTRS_E200,
950 .cpu_user_features = PPC_FEATURE_32 |
951 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
952 PPC_FEATURE_UNIFIED_CACHE,
956 .pvr_mask = 0xfff00000,
957 .pvr_value = 0x81100000,
958 .cpu_name = "e200z6",
959 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
960 .cpu_features = CPU_FTRS_E200,
961 .cpu_user_features = PPC_FEATURE_32 |
962 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
963 PPC_FEATURE_HAS_EFP_SINGLE |
964 PPC_FEATURE_UNIFIED_CACHE,
968 .pvr_mask = 0xffff0000,
969 .pvr_value = 0x80200000,
971 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
972 .cpu_features = CPU_FTRS_E500,
973 .cpu_user_features = PPC_FEATURE_32 |
974 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
975 PPC_FEATURE_HAS_EFP_SINGLE,
981 .pvr_mask = 0xffff0000,
982 .pvr_value = 0x80210000,
983 .cpu_name = "e500v2",
984 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
985 .cpu_features = CPU_FTRS_E500_2,
986 .cpu_user_features = PPC_FEATURE_32 |
987 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
988 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
995 { /* default match */
996 .pvr_mask = 0x00000000,
997 .pvr_value = 0x00000000,
998 .cpu_name = "(generic PPC)",
999 .cpu_features = CPU_FTRS_GENERIC_32,
1000 .cpu_user_features = PPC_FEATURE_32,
1004 #endif /* !CLASSIC_PPC */
1005 #endif /* CONFIG_PPC32 */