2 * MPC8610 HPCD Device Tree Source
4 * Copyright 2007-2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License Version 2 as published
8 * by the Free Software Foundation.
13 model = "MPC8610HPCD";
14 compatible = "fsl,MPC8610HPCD";
32 d-cache-line-size = <d# 32>; // bytes
33 i-cache-line-size = <d# 32>; // bytes
34 d-cache-size = <8000>; // L1, 32K
35 i-cache-size = <8000>; // L1, 32K
36 timebase-frequency = <0>; // 33 MHz, from uboot
37 bus-frequency = <0>; // From uboot
38 clock-frequency = <0>; // From uboot
43 device_type = "memory";
44 reg = <00000000 20000000>; // 512M at 0x0
50 #interrupt-cells = <2>;
52 compatible = "fsl,mpc8610-immr", "simple-bus";
53 ranges = <0 e0000000 00100000>;
54 reg = <e0000000 1000>;
61 compatible = "fsl-i2c";
64 interrupt-parent = <&mpic>;
68 compatible = "cirrus,cs4270";
70 /* MCLK source is a stand-alone oscillator */
71 clock-frequency = <bb8000>;
79 compatible = "fsl-i2c";
82 interrupt-parent = <&mpic>;
86 serial0: serial@4500 {
88 device_type = "serial";
89 compatible = "ns16550";
91 clock-frequency = <0>;
93 interrupt-parent = <&mpic>;
96 serial1: serial@4600 {
98 device_type = "serial";
99 compatible = "ns16550";
101 clock-frequency = <0>;
103 interrupt-parent = <&mpic>;
106 mpic: interrupt-controller@40000 {
107 clock-frequency = <0>;
108 interrupt-controller;
109 #address-cells = <0>;
110 #interrupt-cells = <2>;
112 compatible = "chrp,open-pic";
113 device_type = "open-pic";
117 global-utilities@e0000 {
118 compatible = "fsl,mpc8610-guts";
124 compatible = "fsl,mpc8610-ssi";
127 interrupt-parent = <&mpic>;
129 fsl,mode = "i2s-slave";
130 codec-handle = <&cs4270>;
134 compatible = "fsl,mpc8610-ssi";
137 interrupt-parent = <&mpic>;
142 #address-cells = <1>;
144 compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
146 reg = <21300 4>; /* DMA general status register */
147 ranges = <0 21100 200>;
150 compatible = "fsl,mpc8610-dma-channel",
151 "fsl,eloplus-dma-channel";
154 interrupt-parent = <&mpic>;
158 compatible = "fsl,mpc8610-dma-channel",
159 "fsl,eloplus-dma-channel";
162 interrupt-parent = <&mpic>;
166 compatible = "fsl,mpc8610-dma-channel",
167 "fsl,eloplus-dma-channel";
170 interrupt-parent = <&mpic>;
174 compatible = "fsl,mpc8610-dma-channel",
175 "fsl,eloplus-dma-channel";
178 interrupt-parent = <&mpic>;
184 #address-cells = <1>;
186 compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
188 reg = <c300 4>; /* DMA general status register */
189 ranges = <0 c100 200>;
192 compatible = "fsl,mpc8610-dma-channel",
193 "fsl,mpc8540-dma-channel";
196 interrupt-parent = <&mpic>;
200 compatible = "fsl,mpc8610-dma-channel",
201 "fsl,mpc8540-dma-channel";
204 interrupt-parent = <&mpic>;
208 compatible = "fsl,mpc8610-dma-channel",
209 "fsl,mpc8540-dma-channel";
212 interrupt-parent = <&mpic>;
216 compatible = "fsl,mpc8610-dma-channel",
217 "fsl,mpc8540-dma-channel";
220 interrupt-parent = <&mpic>;
229 compatible = "fsl,mpc8610-pci";
231 #interrupt-cells = <1>;
233 #address-cells = <3>;
234 reg = <e0008000 1000>;
236 ranges = <02000000 0 80000000 80000000 0 10000000
237 01000000 0 00000000 e1000000 0 00100000>;
238 clock-frequency = <1fca055>;
239 interrupt-parent = <&mpic>;
241 interrupt-map-mask = <f800 0 0 7>;
257 pci1: pcie@e000a000 {
259 compatible = "fsl,mpc8641-pcie";
261 #interrupt-cells = <1>;
263 #address-cells = <3>;
264 reg = <e000a000 1000>;
266 ranges = <02000000 0 a0000000 a0000000 0 10000000
267 01000000 0 00000000 e3000000 0 00100000>;
268 clock-frequency = <1fca055>;
269 interrupt-parent = <&mpic>;
271 interrupt-map-mask = <f800 0 0 7>;
291 #address-cells = <3>;
293 ranges = <02000000 0 a0000000
302 #address-cells = <3>;
303 ranges = <02000000 0 a0000000