git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-orion5x/common.c

   1 /*
   2  * arch/arm/mach-orion5x/common.c
   3  *
   4  * Core functions for Marvell Orion 5x SoCs
   5  *
   6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/mbus.h>
  18 #include <linux/mv643xx_eth.h>
  19 #include <linux/mv643xx_i2c.h>
  20 #include <linux/ata_platform.h>
  21 #include <asm/page.h>
  22 #include <asm/setup.h>
  23 #include <asm/timex.h>
  24 #include <asm/mach/arch.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <mach/hardware.h>
  28 #include <mach/orion5x.h>
  29 #include <plat/ehci-orion.h>
  30 #include <plat/mv_xor.h>
  31 #include <plat/orion_nand.h>
  32 #include <plat/time.h>
  33 #include "common.h"
  34
  35 /*****************************************************************************
  36  * I/O Address Mapping
  37  ****************************************************************************/
  38 static struct map_desc orion5x_io_desc[] __initdata = {
  39         {
  40                 .virtual        = ORION5X_REGS_VIRT_BASE,
  41                 .pfn            = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  42                 .length         = ORION5X_REGS_SIZE,
  43                 .type           = MT_DEVICE,
  44         }, {
  45                 .virtual        = ORION5X_PCIE_IO_VIRT_BASE,
  46                 .pfn            = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  47                 .length         = ORION5X_PCIE_IO_SIZE,
  48                 .type           = MT_DEVICE,
  49         }, {
  50                 .virtual        = ORION5X_PCI_IO_VIRT_BASE,
  51                 .pfn            = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  52                 .length         = ORION5X_PCI_IO_SIZE,
  53                 .type           = MT_DEVICE,
  54         }, {
  55                 .virtual        = ORION5X_PCIE_WA_VIRT_BASE,
  56                 .pfn            = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  57                 .length         = ORION5X_PCIE_WA_SIZE,
  58                 .type           = MT_DEVICE,
  59         },
  60 };
  61
  62 void __init orion5x_map_io(void)
  63 {
  64         iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  65 }
  66
  67
  68 /*****************************************************************************
  69  * EHCI
  70  ****************************************************************************/
  71 static struct orion_ehci_data orion5x_ehci_data = {
  72         .dram           = &orion5x_mbus_dram_info,
  73 };
  74
  75 static u64 ehci_dmamask = 0xffffffffUL;
  76
  77
  78 /*****************************************************************************
  79  * EHCI0
  80  ****************************************************************************/
  81 static struct resource orion5x_ehci0_resources[] = {
  82         {
  83                 .start  = ORION5X_USB0_PHYS_BASE,
  84                 .end    = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
  85                 .flags  = IORESOURCE_MEM,
  86         }, {
  87                 .start  = IRQ_ORION5X_USB0_CTRL,
  88                 .end    = IRQ_ORION5X_USB0_CTRL,
  89                 .flags  = IORESOURCE_IRQ,
  90         },
  91 };
  92
  93 static struct platform_device orion5x_ehci0 = {
  94         .name           = "orion-ehci",
  95         .id             = 0,
  96         .dev            = {
  97                 .dma_mask               = &ehci_dmamask,
  98                 .coherent_dma_mask      = 0xffffffff,
  99                 .platform_data          = &orion5x_ehci_data,
 100         },
 101         .resource       = orion5x_ehci0_resources,
 102         .num_resources  = ARRAY_SIZE(orion5x_ehci0_resources),
 103 };
 104
 105 void __init orion5x_ehci0_init(void)
 106 {
 107         platform_device_register(&orion5x_ehci0);
 108 }
 109
 110
 111 /*****************************************************************************
 112  * EHCI1
 113  ****************************************************************************/
 114 static struct resource orion5x_ehci1_resources[] = {
 115         {
 116                 .start  = ORION5X_USB1_PHYS_BASE,
 117                 .end    = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
 118                 .flags  = IORESOURCE_MEM,
 119         }, {
 120                 .start  = IRQ_ORION5X_USB1_CTRL,
 121                 .end    = IRQ_ORION5X_USB1_CTRL,
 122                 .flags  = IORESOURCE_IRQ,
 123         },
 124 };
 125
 126 static struct platform_device orion5x_ehci1 = {
 127         .name           = "orion-ehci",
 128         .id             = 1,
 129         .dev            = {
 130                 .dma_mask               = &ehci_dmamask,
 131                 .coherent_dma_mask      = 0xffffffff,
 132                 .platform_data          = &orion5x_ehci_data,
 133         },
 134         .resource       = orion5x_ehci1_resources,
 135         .num_resources  = ARRAY_SIZE(orion5x_ehci1_resources),
 136 };
 137
 138 void __init orion5x_ehci1_init(void)
 139 {
 140         platform_device_register(&orion5x_ehci1);
 141 }
 142
 143
 144 /*****************************************************************************
 145  * GigE
 146  ****************************************************************************/
 147 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
 148         .dram           = &orion5x_mbus_dram_info,
 149         .t_clk          = ORION5X_TCLK,
 150 };
 151
 152 static struct resource orion5x_eth_shared_resources[] = {
 153         {
 154                 .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
 155                 .end    = ORION5X_ETH_PHYS_BASE + 0x3fff,
 156                 .flags  = IORESOURCE_MEM,
 157         }, {
 158                 .start  = IRQ_ORION5X_ETH_ERR,
 159                 .end    = IRQ_ORION5X_ETH_ERR,
 160                 .flags  = IORESOURCE_IRQ,
 161         },
 162 };
 163
 164 static struct platform_device orion5x_eth_shared = {
 165         .name           = MV643XX_ETH_SHARED_NAME,
 166         .id             = 0,
 167         .dev            = {
 168                 .platform_data  = &orion5x_eth_shared_data,
 169         },
 170         .num_resources  = ARRAY_SIZE(orion5x_eth_shared_resources),
 171         .resource       = orion5x_eth_shared_resources,
 172 };
 173
 174 static struct resource orion5x_eth_resources[] = {
 175         {
 176                 .name   = "eth irq",
 177                 .start  = IRQ_ORION5X_ETH_SUM,
 178                 .end    = IRQ_ORION5X_ETH_SUM,
 179                 .flags  = IORESOURCE_IRQ,
 180         },
 181 };
 182
 183 static struct platform_device orion5x_eth = {
 184         .name           = MV643XX_ETH_NAME,
 185         .id             = 0,
 186         .num_resources  = 1,
 187         .resource       = orion5x_eth_resources,
 188 };
 189
 190 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 191 {
 192         eth_data->shared = &orion5x_eth_shared;
 193         orion5x_eth.dev.platform_data = eth_data;
 194
 195         platform_device_register(&orion5x_eth_shared);
 196         platform_device_register(&orion5x_eth);
 197 }
 198
 199
 200 /*****************************************************************************
 201  * I2C
 202  ****************************************************************************/
 203 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 204         .freq_m         = 8, /* assumes 166 MHz TCLK */
 205         .freq_n         = 3,
 206         .timeout        = 1000, /* Default timeout of 1 second */
 207 };
 208
 209 static struct resource orion5x_i2c_resources[] = {
 210         {
 211                 .name   = "i2c base",
 212                 .start  = I2C_PHYS_BASE,
 213                 .end    = I2C_PHYS_BASE + 0x1f,
 214                 .flags  = IORESOURCE_MEM,
 215         }, {
 216                 .name   = "i2c irq",
 217                 .start  = IRQ_ORION5X_I2C,
 218                 .end    = IRQ_ORION5X_I2C,
 219                 .flags  = IORESOURCE_IRQ,
 220         },
 221 };
 222
 223 static struct platform_device orion5x_i2c = {
 224         .name           = MV64XXX_I2C_CTLR_NAME,
 225         .id             = 0,
 226         .num_resources  = ARRAY_SIZE(orion5x_i2c_resources),
 227         .resource       = orion5x_i2c_resources,
 228         .dev            = {
 229                 .platform_data  = &orion5x_i2c_pdata,
 230         },
 231 };
 232
 233 void __init orion5x_i2c_init(void)
 234 {
 235         platform_device_register(&orion5x_i2c);
 236 }
 237
 238
 239 /*****************************************************************************
 240  * SATA
 241  ****************************************************************************/
 242 static struct resource orion5x_sata_resources[] = {
 243         {
 244                 .name   = "sata base",
 245                 .start  = ORION5X_SATA_PHYS_BASE,
 246                 .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
 247                 .flags  = IORESOURCE_MEM,
 248         }, {
 249                 .name   = "sata irq",
 250                 .start  = IRQ_ORION5X_SATA,
 251                 .end    = IRQ_ORION5X_SATA,
 252                 .flags  = IORESOURCE_IRQ,
 253         },
 254 };
 255
 256 static struct platform_device orion5x_sata = {
 257         .name           = "sata_mv",
 258         .id             = 0,
 259         .dev            = {
 260                 .coherent_dma_mask      = 0xffffffff,
 261         },
 262         .num_resources  = ARRAY_SIZE(orion5x_sata_resources),
 263         .resource       = orion5x_sata_resources,
 264 };
 265
 266 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 267 {
 268         sata_data->dram = &orion5x_mbus_dram_info;
 269         orion5x_sata.dev.platform_data = sata_data;
 270         platform_device_register(&orion5x_sata);
 271 }
 272
 273
 274 /*****************************************************************************
 275  * UART0
 276  ****************************************************************************/
 277 static struct plat_serial8250_port orion5x_uart0_data[] = {
 278         {
 279                 .mapbase        = UART0_PHYS_BASE,
 280                 .membase        = (char *)UART0_VIRT_BASE,
 281                 .irq            = IRQ_ORION5X_UART0,
 282                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 283                 .iotype         = UPIO_MEM,
 284                 .regshift       = 2,
 285                 .uartclk        = ORION5X_TCLK,
 286         }, {
 287         },
 288 };
 289
 290 static struct resource orion5x_uart0_resources[] = {
 291         {
 292                 .start          = UART0_PHYS_BASE,
 293                 .end            = UART0_PHYS_BASE + 0xff,
 294                 .flags          = IORESOURCE_MEM,
 295         }, {
 296                 .start          = IRQ_ORION5X_UART0,
 297                 .end            = IRQ_ORION5X_UART0,
 298                 .flags          = IORESOURCE_IRQ,
 299         },
 300 };
 301
 302 static struct platform_device orion5x_uart0 = {
 303         .name                   = "serial8250",
 304         .id                     = PLAT8250_DEV_PLATFORM,
 305         .dev                    = {
 306                 .platform_data  = orion5x_uart0_data,
 307         },
 308         .resource               = orion5x_uart0_resources,
 309         .num_resources          = ARRAY_SIZE(orion5x_uart0_resources),
 310 };
 311
 312 void __init orion5x_uart0_init(void)
 313 {
 314         platform_device_register(&orion5x_uart0);
 315 }
 316
 317
 318 /*****************************************************************************
 319  * UART1
 320  ****************************************************************************/
 321 static struct plat_serial8250_port orion5x_uart1_data[] = {
 322         {
 323                 .mapbase        = UART1_PHYS_BASE,
 324                 .membase        = (char *)UART1_VIRT_BASE,
 325                 .irq            = IRQ_ORION5X_UART1,
 326                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 327                 .iotype         = UPIO_MEM,
 328                 .regshift       = 2,
 329                 .uartclk        = ORION5X_TCLK,
 330         }, {
 331         },
 332 };
 333
 334 static struct resource orion5x_uart1_resources[] = {
 335         {
 336                 .start          = UART1_PHYS_BASE,
 337                 .end            = UART1_PHYS_BASE + 0xff,
 338                 .flags          = IORESOURCE_MEM,
 339         }, {
 340                 .start          = IRQ_ORION5X_UART1,
 341                 .end            = IRQ_ORION5X_UART1,
 342                 .flags          = IORESOURCE_IRQ,
 343         },
 344 };
 345
 346 static struct platform_device orion5x_uart1 = {
 347         .name                   = "serial8250",
 348         .id                     = PLAT8250_DEV_PLATFORM1,
 349         .dev                    = {
 350                 .platform_data  = orion5x_uart1_data,
 351         },
 352         .resource               = orion5x_uart1_resources,
 353         .num_resources          = ARRAY_SIZE(orion5x_uart1_resources),
 354 };
 355
 356 void __init orion5x_uart1_init(void)
 357 {
 358         platform_device_register(&orion5x_uart1);
 359 }
 360
 361
 362 /*****************************************************************************
 363  * XOR engine
 364  ****************************************************************************/
 365 static struct resource orion5x_xor_shared_resources[] = {
 366         {
 367                 .name   = "xor low",
 368                 .start  = ORION5X_XOR_PHYS_BASE,
 369                 .end    = ORION5X_XOR_PHYS_BASE + 0xff,
 370                 .flags  = IORESOURCE_MEM,
 371         }, {
 372                 .name   = "xor high",
 373                 .start  = ORION5X_XOR_PHYS_BASE + 0x200,
 374                 .end    = ORION5X_XOR_PHYS_BASE + 0x2ff,
 375                 .flags  = IORESOURCE_MEM,
 376         },
 377 };
 378
 379 static struct platform_device orion5x_xor_shared = {
 380         .name           = MV_XOR_SHARED_NAME,
 381         .id             = 0,
 382         .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
 383         .resource       = orion5x_xor_shared_resources,
 384 };
 385
 386 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
 387
 388 static struct resource orion5x_xor0_resources[] = {
 389         [0] = {
 390                 .start  = IRQ_ORION5X_XOR0,
 391                 .end    = IRQ_ORION5X_XOR0,
 392                 .flags  = IORESOURCE_IRQ,
 393         },
 394 };
 395
 396 static struct mv_xor_platform_data orion5x_xor0_data = {
 397         .shared         = &orion5x_xor_shared,
 398         .hw_id          = 0,
 399         .pool_size      = PAGE_SIZE,
 400 };
 401
 402 static struct platform_device orion5x_xor0_channel = {
 403         .name           = MV_XOR_NAME,
 404         .id             = 0,
 405         .num_resources  = ARRAY_SIZE(orion5x_xor0_resources),
 406         .resource       = orion5x_xor0_resources,
 407         .dev            = {
 408                 .dma_mask               = &orion5x_xor_dmamask,
 409                 .coherent_dma_mask      = DMA_64BIT_MASK,
 410                 .platform_data          = (void *)&orion5x_xor0_data,
 411         },
 412 };
 413
 414 static struct resource orion5x_xor1_resources[] = {
 415         [0] = {
 416                 .start  = IRQ_ORION5X_XOR1,
 417                 .end    = IRQ_ORION5X_XOR1,
 418                 .flags  = IORESOURCE_IRQ,
 419         },
 420 };
 421
 422 static struct mv_xor_platform_data orion5x_xor1_data = {
 423         .shared         = &orion5x_xor_shared,
 424         .hw_id          = 1,
 425         .pool_size      = PAGE_SIZE,
 426 };
 427
 428 static struct platform_device orion5x_xor1_channel = {
 429         .name           = MV_XOR_NAME,
 430         .id             = 1,
 431         .num_resources  = ARRAY_SIZE(orion5x_xor1_resources),
 432         .resource       = orion5x_xor1_resources,
 433         .dev            = {
 434                 .dma_mask               = &orion5x_xor_dmamask,
 435                 .coherent_dma_mask      = DMA_64BIT_MASK,
 436                 .platform_data          = (void *)&orion5x_xor1_data,
 437         },
 438 };
 439
 440 void __init orion5x_xor_init(void)
 441 {
 442         platform_device_register(&orion5x_xor_shared);
 443
 444         /*
 445          * two engines can't do memset simultaneously, this limitation
 446          * satisfied by removing memset support from one of the engines.
 447          */
 448         dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
 449         dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
 450         platform_device_register(&orion5x_xor0_channel);
 451
 452         dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
 453         dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
 454         dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
 455         platform_device_register(&orion5x_xor1_channel);
 456 }
 457
 458
 459 /*****************************************************************************
 460  * Time handling
 461  ****************************************************************************/
 462 static void orion5x_timer_init(void)
 463 {
 464         orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
 465 }
 466
 467 struct sys_timer orion5x_timer = {
 468         .init = orion5x_timer_init,
 469 };
 470
 471
 472 /*****************************************************************************
 473  * General
 474  ****************************************************************************/
 475 /*
 476  * Identify device ID and rev from PCIe configuration header space '0'.
 477  */
 478 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 479 {
 480         orion5x_pcie_id(dev, rev);
 481
 482         if (*dev == MV88F5281_DEV_ID) {
 483                 if (*rev == MV88F5281_REV_D2) {
 484                         *dev_name = "MV88F5281-D2";
 485                 } else if (*rev == MV88F5281_REV_D1) {
 486                         *dev_name = "MV88F5281-D1";
 487                 } else if (*rev == MV88F5281_REV_D0) {
 488                         *dev_name = "MV88F5281-D0";
 489                 } else {
 490                         *dev_name = "MV88F5281-Rev-Unsupported";
 491                 }
 492         } else if (*dev == MV88F5182_DEV_ID) {
 493                 if (*rev == MV88F5182_REV_A2) {
 494                         *dev_name = "MV88F5182-A2";
 495                 } else {
 496                         *dev_name = "MV88F5182-Rev-Unsupported";
 497                 }
 498         } else if (*dev == MV88F5181_DEV_ID) {
 499                 if (*rev == MV88F5181_REV_B1) {
 500                         *dev_name = "MV88F5181-Rev-B1";
 501                 } else if (*rev == MV88F5181L_REV_A1) {
 502                         *dev_name = "MV88F5181L-Rev-A1";
 503                 } else {
 504                         *dev_name = "MV88F5181(L)-Rev-Unsupported";
 505                 }
 506         } else {
 507                 *dev_name = "Device-Unknown";
 508         }
 509 }
 510
 511 void __init orion5x_init(void)
 512 {
 513         char *dev_name;
 514         u32 dev, rev;
 515
 516         orion5x_id(&dev, &rev, &dev_name);
 517         printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
 518
 519         /*
 520          * Setup Orion address map
 521          */
 522         orion5x_setup_cpu_mbus_bridge();
 523
 524         /*
 525          * Don't issue "Wait for Interrupt" instruction if we are
 526          * running on D0 5281 silicon.
 527          */
 528         if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
 529                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
 530                 disable_hlt();
 531         }
 532 }
 533
 534 /*
 535  * Many orion-based systems have buggy bootloader implementations.
 536  * This is a common fixup for bogus memory tags.
 537  */
 538 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
 539                             char **from, struct meminfo *meminfo)
 540 {
 541         for (; t->hdr.size; t = tag_next(t))
 542                 if (t->hdr.tag == ATAG_MEM &&
 543                     (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 544                      t->u.mem.start & ~PAGE_MASK)) {
 545                         printk(KERN_WARNING
 546                                "Clearing invalid memory bank %dKB@0x%08x\n",
 547                                t->u.mem.size / 1024, t->u.mem.start);
 548                         t->hdr.tag = 0;
 549                 }
 550 }