git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47
  48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  50
  51 /* Highest firmware API version supported */
  52 #define IWL4965_UCODE_API_MAX 2
  53
  54 /* Lowest firmware API version supported */
  55 #define IWL4965_UCODE_API_MIN 2
  56
  57 #define IWL4965_FW_PRE "iwlwifi-4965-"
  58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  60
  61
  62 /* module parameters */
  63 static struct iwl_mod_params iwl4965_mod_params = {
  64         .num_of_queues = IWL49_NUM_QUEUES,
  65         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  66         .enable_qos = 1,
  67         .amsdu_size_8K = 1,
  68         .restart_fw = 1,
  69         /* the rest are 0 by default */
  70 };
  71
  72 /* check contents of special bootstrap uCode SRAM */
  73 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  74 {
  75         __le32 *image = priv->ucode_boot.v_addr;
  76         u32 len = priv->ucode_boot.len;
  77         u32 reg;
  78         u32 val;
  79
  80         IWL_DEBUG_INFO("Begin verify bsm\n");
  81
  82         /* verify BSM SRAM contents */
  83         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  84         for (reg = BSM_SRAM_LOWER_BOUND;
  85              reg < BSM_SRAM_LOWER_BOUND + len;
  86              reg += sizeof(u32), image++) {
  87                 val = iwl_read_prph(priv, reg);
  88                 if (val != le32_to_cpu(*image)) {
  89                         IWL_ERROR("BSM uCode verification failed at "
  90                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  91                                   BSM_SRAM_LOWER_BOUND,
  92                                   reg - BSM_SRAM_LOWER_BOUND, len,
  93                                   val, le32_to_cpu(*image));
  94                         return -EIO;
  95                 }
  96         }
  97
  98         IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  99
 100         return 0;
 101 }
 102
 103 /**
 104  * iwl4965_load_bsm - Load bootstrap instructions
 105  *
 106  * BSM operation:
 107  *
 108  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 109  * in special SRAM that does not power down during RFKILL.  When powering back
 110  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 111  * the bootstrap program into the on-board processor, and starts it.
 112  *
 113  * The bootstrap program loads (via DMA) instructions and data for a new
 114  * program from host DRAM locations indicated by the host driver in the
 115  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 116  * automatically.
 117  *
 118  * When initializing the NIC, the host driver points the BSM to the
 119  * "initialize" uCode image.  This uCode sets up some internal data, then
 120  * notifies host via "initialize alive" that it is complete.
 121  *
 122  * The host then replaces the BSM_DRAM_* pointer values to point to the
 123  * normal runtime uCode instructions and a backup uCode data cache buffer
 124  * (filled initially with starting data values for the on-board processor),
 125  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 126  * which begins normal operation.
 127  *
 128  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 129  * the backup data cache in DRAM before SRAM is powered down.
 130  *
 131  * When powering back up, the BSM loads the bootstrap program.  This reloads
 132  * the runtime uCode instructions and the backup data cache into SRAM,
 133  * and re-launches the runtime uCode from where it left off.
 134  */
 135 static int iwl4965_load_bsm(struct iwl_priv *priv)
 136 {
 137         __le32 *image = priv->ucode_boot.v_addr;
 138         u32 len = priv->ucode_boot.len;
 139         dma_addr_t pinst;
 140         dma_addr_t pdata;
 141         u32 inst_len;
 142         u32 data_len;
 143         int i;
 144         u32 done;
 145         u32 reg_offset;
 146         int ret;
 147
 148         IWL_DEBUG_INFO("Begin load bsm\n");
 149
 150         priv->ucode_type = UCODE_RT;
 151
 152         /* make sure bootstrap program is no larger than BSM's SRAM size */
 153         if (len > IWL_MAX_BSM_SIZE)
 154                 return -EINVAL;
 155
 156         /* Tell bootstrap uCode where to find the "Initialize" uCode
 157          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 158          * NOTE:  iwl_init_alive_start() will replace these values,
 159          *        after the "initialize" uCode has run, to point to
 160          *        runtime/protocol instructions and backup data cache.
 161          */
 162         pinst = priv->ucode_init.p_addr >> 4;
 163         pdata = priv->ucode_init_data.p_addr >> 4;
 164         inst_len = priv->ucode_init.len;
 165         data_len = priv->ucode_init_data.len;
 166
 167         ret = iwl_grab_nic_access(priv);
 168         if (ret)
 169                 return ret;
 170
 171         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 172         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 173         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 174         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 175
 176         /* Fill BSM memory with bootstrap instructions */
 177         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 178              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 179              reg_offset += sizeof(u32), image++)
 180                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 181
 182         ret = iwl4965_verify_bsm(priv);
 183         if (ret) {
 184                 iwl_release_nic_access(priv);
 185                 return ret;
 186         }
 187
 188         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 189         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 190         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
 191         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 192
 193         /* Load bootstrap code into instruction SRAM now,
 194          *   to prepare to load "initialize" uCode */
 195         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 196
 197         /* Wait for load of bootstrap uCode to finish */
 198         for (i = 0; i < 100; i++) {
 199                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 200                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 201                         break;
 202                 udelay(10);
 203         }
 204         if (i < 100)
 205                 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
 206         else {
 207                 IWL_ERROR("BSM write did not complete!\n");
 208                 return -EIO;
 209         }
 210
 211         /* Enable future boot loads whenever power management unit triggers it
 212          *   (e.g. when powering back up after power-save shutdown) */
 213         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 214
 215         iwl_release_nic_access(priv);
 216
 217         return 0;
 218 }
 219
 220 /**
 221  * iwl4965_set_ucode_ptrs - Set uCode address location
 222  *
 223  * Tell initialization uCode where to find runtime uCode.
 224  *
 225  * BSM registers initially contain pointers to initialization uCode.
 226  * We need to replace them to load runtime uCode inst and data,
 227  * and to save runtime data when powering down.
 228  */
 229 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 230 {
 231         dma_addr_t pinst;
 232         dma_addr_t pdata;
 233         unsigned long flags;
 234         int ret = 0;
 235
 236         /* bits 35:4 for 4965 */
 237         pinst = priv->ucode_code.p_addr >> 4;
 238         pdata = priv->ucode_data_backup.p_addr >> 4;
 239
 240         spin_lock_irqsave(&priv->lock, flags);
 241         ret = iwl_grab_nic_access(priv);
 242         if (ret) {
 243                 spin_unlock_irqrestore(&priv->lock, flags);
 244                 return ret;
 245         }
 246
 247         /* Tell bootstrap uCode where to find image to load */
 248         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 249         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 250         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 251                                  priv->ucode_data.len);
 252
 253         /* Inst byte count must be last to set up, bit 31 signals uCode
 254          *   that all new ptr/size info is in place */
 255         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 256                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 257         iwl_release_nic_access(priv);
 258
 259         spin_unlock_irqrestore(&priv->lock, flags);
 260
 261         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
 262
 263         return ret;
 264 }
 265
 266 /**
 267  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 268  *
 269  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 270  *
 271  * The 4965 "initialize" ALIVE reply contains calibration data for:
 272  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 273  *   (3945 does not contain this data).
 274  *
 275  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 276 */
 277 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 278 {
 279         /* Check alive response for "valid" sign from uCode */
 280         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 281                 /* We had an error bringing up the hardware, so take it
 282                  * all the way back down so we can try again */
 283                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
 284                 goto restart;
 285         }
 286
 287         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 288          * This is a paranoid check, because we would not have gotten the
 289          * "initialize" alive if code weren't properly loaded.  */
 290         if (iwl_verify_ucode(priv)) {
 291                 /* Runtime instruction load was bad;
 292                  * take it all the way back down so we can try again */
 293                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 294                 goto restart;
 295         }
 296
 297         /* Calculate temperature */
 298         priv->temperature = iwl4965_hw_get_temperature(priv);
 299
 300         /* Send pointers to protocol/runtime uCode image ... init code will
 301          * load and launch runtime uCode, which will send us another "Alive"
 302          * notification. */
 303         IWL_DEBUG_INFO("Initialization Alive received.\n");
 304         if (iwl4965_set_ucode_ptrs(priv)) {
 305                 /* Runtime instruction load won't happen;
 306                  * take it all the way back down so we can try again */
 307                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
 308                 goto restart;
 309         }
 310         return;
 311
 312 restart:
 313         queue_work(priv->workqueue, &priv->restart);
 314 }
 315
 316 static int is_fat_channel(__le32 rxon_flags)
 317 {
 318         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 319                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 320 }
 321
 322 /*
 323  * EEPROM handlers
 324  */
 325 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 326 {
 327         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 328 }
 329
 330 /*
 331  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 332  * must be called under priv->lock and mac access
 333  */
 334 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 335 {
 336         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 337 }
 338
 339 static int iwl4965_apm_init(struct iwl_priv *priv)
 340 {
 341         int ret = 0;
 342
 343         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 344                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 345
 346         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 347         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 348                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 349
 350         /* set "initialization complete" bit to move adapter
 351          * D0U* --> D0A* state */
 352         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 353
 354         /* wait for clock stabilization */
 355         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 356                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 357                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 358         if (ret < 0) {
 359                 IWL_DEBUG_INFO("Failed to init the card\n");
 360                 goto out;
 361         }
 362
 363         ret = iwl_grab_nic_access(priv);
 364         if (ret)
 365                 goto out;
 366
 367         /* enable DMA */
 368         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 369                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 370
 371         udelay(20);
 372
 373         /* disable L1-Active */
 374         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 375                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 376
 377         iwl_release_nic_access(priv);
 378 out:
 379         return ret;
 380 }
 381
 382
 383 static void iwl4965_nic_config(struct iwl_priv *priv)
 384 {
 385         unsigned long flags;
 386         u32 val;
 387         u16 radio_cfg;
 388         u16 link;
 389
 390         spin_lock_irqsave(&priv->lock, flags);
 391
 392         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 393                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 394                 /* Enable No Snoop field */
 395                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 396                                        val & ~(1 << 11));
 397         }
 398
 399         pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
 400
 401         /* L1 is enabled by BIOS */
 402         if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 403                 /* disable L0S disabled L1A enabled */
 404                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 405         else
 406                 /* L0S enabled L1A disabled */
 407                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 408
 409         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 410
 411         /* write radio config values to register */
 412         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 413                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 414                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 415                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 416                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 417
 418         /* set CSR_HW_CONFIG_REG for uCode use */
 419         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 420                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 421                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 422
 423         priv->calib_info = (struct iwl_eeprom_calib_info *)
 424                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 425
 426         spin_unlock_irqrestore(&priv->lock, flags);
 427 }
 428
 429 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 430 {
 431         int ret = 0;
 432         unsigned long flags;
 433
 434         spin_lock_irqsave(&priv->lock, flags);
 435
 436         /* set stop master bit */
 437         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 438
 439         ret = iwl_poll_bit(priv, CSR_RESET,
 440                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
 441                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 442         if (ret < 0)
 443                 goto out;
 444
 445 out:
 446         spin_unlock_irqrestore(&priv->lock, flags);
 447         IWL_DEBUG_INFO("stop master\n");
 448
 449         return ret;
 450 }
 451
 452 static void iwl4965_apm_stop(struct iwl_priv *priv)
 453 {
 454         unsigned long flags;
 455
 456         iwl4965_apm_stop_master(priv);
 457
 458         spin_lock_irqsave(&priv->lock, flags);
 459
 460         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 461
 462         udelay(10);
 463         /* clear "init complete"  move adapter D0A* --> D0U state */
 464         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 465         spin_unlock_irqrestore(&priv->lock, flags);
 466 }
 467
 468 static int iwl4965_apm_reset(struct iwl_priv *priv)
 469 {
 470         int ret = 0;
 471         unsigned long flags;
 472
 473         iwl4965_apm_stop_master(priv);
 474
 475         spin_lock_irqsave(&priv->lock, flags);
 476
 477         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 478
 479         udelay(10);
 480
 481         /* FIXME: put here L1A -L0S w/a */
 482
 483         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 484
 485         ret = iwl_poll_bit(priv, CSR_RESET,
 486                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 487                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
 488
 489         if (ret)
 490                 goto out;
 491
 492         udelay(10);
 493
 494         ret = iwl_grab_nic_access(priv);
 495         if (ret)
 496                 goto out;
 497         /* Enable DMA and BSM Clock */
 498         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 499                                               APMG_CLK_VAL_BSM_CLK_RQT);
 500
 501         udelay(10);
 502
 503         /* disable L1A */
 504         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 505                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 506
 507         iwl_release_nic_access(priv);
 508
 509         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 510         wake_up_interruptible(&priv->wait_command_queue);
 511
 512 out:
 513         spin_unlock_irqrestore(&priv->lock, flags);
 514
 515         return ret;
 516 }
 517
 518 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 519  * Called after every association, but this runs only once!
 520  *  ... once chain noise is calibrated the first time, it's good forever.  */
 521 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 522 {
 523         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 524
 525         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 526                 struct iwl_calib_diff_gain_cmd cmd;
 527
 528                 memset(&cmd, 0, sizeof(cmd));
 529                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 530                 cmd.diff_gain_a = 0;
 531                 cmd.diff_gain_b = 0;
 532                 cmd.diff_gain_c = 0;
 533                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 534                                  sizeof(cmd), &cmd))
 535                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 536                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 537                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 538         }
 539 }
 540
 541 static void iwl4965_gain_computation(struct iwl_priv *priv,
 542                 u32 *average_noise,
 543                 u16 min_average_noise_antenna_i,
 544                 u32 min_average_noise)
 545 {
 546         int i, ret;
 547         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 548
 549         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 550
 551         for (i = 0; i < NUM_RX_CHAINS; i++) {
 552                 s32 delta_g = 0;
 553
 554                 if (!(data->disconn_array[i]) &&
 555                     (data->delta_gain_code[i] ==
 556                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 557                         delta_g = average_noise[i] - min_average_noise;
 558                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 559                         data->delta_gain_code[i] =
 560                                 min(data->delta_gain_code[i],
 561                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 562
 563                         data->delta_gain_code[i] =
 564                                 (data->delta_gain_code[i] | (1 << 2));
 565                 } else {
 566                         data->delta_gain_code[i] = 0;
 567                 }
 568         }
 569         IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
 570                      data->delta_gain_code[0],
 571                      data->delta_gain_code[1],
 572                      data->delta_gain_code[2]);
 573
 574         /* Differential gain gets sent to uCode only once */
 575         if (!data->radio_write) {
 576                 struct iwl_calib_diff_gain_cmd cmd;
 577                 data->radio_write = 1;
 578
 579                 memset(&cmd, 0, sizeof(cmd));
 580                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 581                 cmd.diff_gain_a = data->delta_gain_code[0];
 582                 cmd.diff_gain_b = data->delta_gain_code[1];
 583                 cmd.diff_gain_c = data->delta_gain_code[2];
 584                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 585                                       sizeof(cmd), &cmd);
 586                 if (ret)
 587                         IWL_DEBUG_CALIB("fail sending cmd "
 588                                      "REPLY_PHY_CALIBRATION_CMD \n");
 589
 590                 /* TODO we might want recalculate
 591                  * rx_chain in rxon cmd */
 592
 593                 /* Mark so we run this algo only once! */
 594                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 595         }
 596         data->chain_noise_a = 0;
 597         data->chain_noise_b = 0;
 598         data->chain_noise_c = 0;
 599         data->chain_signal_a = 0;
 600         data->chain_signal_b = 0;
 601         data->chain_signal_c = 0;
 602         data->beacon_count = 0;
 603 }
 604
 605 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 606                         __le32 *tx_flags)
 607 {
 608         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 609                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 610                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 611         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 612                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 613                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 614         }
 615 }
 616
 617 static void iwl4965_bg_txpower_work(struct work_struct *work)
 618 {
 619         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 620                         txpower_work);
 621
 622         /* If a scan happened to start before we got here
 623          * then just return; the statistics notification will
 624          * kick off another scheduled work to compensate for
 625          * any temperature delta we missed here. */
 626         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 627             test_bit(STATUS_SCANNING, &priv->status))
 628                 return;
 629
 630         mutex_lock(&priv->mutex);
 631
 632         /* Regardless of if we are associated, we must reconfigure the
 633          * TX power since frames can be sent on non-radar channels while
 634          * not associated */
 635         iwl4965_send_tx_power(priv);
 636
 637         /* Update last_temperature to keep is_calib_needed from running
 638          * when it isn't needed... */
 639         priv->last_temperature = priv->temperature;
 640
 641         mutex_unlock(&priv->mutex);
 642 }
 643
 644 /*
 645  * Acquire priv->lock before calling this function !
 646  */
 647 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 648 {
 649         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 650                              (index & 0xff) | (txq_id << 8));
 651         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 652 }
 653
 654 /**
 655  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 656  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 657  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 658  *
 659  * NOTE:  Acquire priv->lock before calling this function !
 660  */
 661 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 662                                         struct iwl_tx_queue *txq,
 663                                         int tx_fifo_id, int scd_retry)
 664 {
 665         int txq_id = txq->q.id;
 666
 667         /* Find out whether to activate Tx queue */
 668         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 669
 670         /* Set up and activate */
 671         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 672                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 673                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 674                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 675                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 676                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 677
 678         txq->sched_retry = scd_retry;
 679
 680         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 681                        active ? "Activate" : "Deactivate",
 682                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 683 }
 684
 685 static const u16 default_queue_to_tx_fifo[] = {
 686         IWL_TX_FIFO_AC3,
 687         IWL_TX_FIFO_AC2,
 688         IWL_TX_FIFO_AC1,
 689         IWL_TX_FIFO_AC0,
 690         IWL49_CMD_FIFO_NUM,
 691         IWL_TX_FIFO_HCCA_1,
 692         IWL_TX_FIFO_HCCA_2
 693 };
 694
 695 static int iwl4965_alive_notify(struct iwl_priv *priv)
 696 {
 697         u32 a;
 698         unsigned long flags;
 699         int ret;
 700         int i, chan;
 701         u32 reg_val;
 702
 703         spin_lock_irqsave(&priv->lock, flags);
 704
 705         ret = iwl_grab_nic_access(priv);
 706         if (ret) {
 707                 spin_unlock_irqrestore(&priv->lock, flags);
 708                 return ret;
 709         }
 710
 711         /* Clear 4965's internal Tx Scheduler data base */
 712         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 713         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 714         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 715                 iwl_write_targ_mem(priv, a, 0);
 716         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 717                 iwl_write_targ_mem(priv, a, 0);
 718         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 719                 iwl_write_targ_mem(priv, a, 0);
 720
 721         /* Tel 4965 where to find Tx byte count tables */
 722         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 723                         priv->scd_bc_tbls.dma >> 10);
 724
 725         /* Enable DMA channel */
 726         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 727                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 728                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 729                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 730
 731         /* Update FH chicken bits */
 732         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 733         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 734                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 735
 736         /* Disable chain mode for all queues */
 737         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 738
 739         /* Initialize each Tx queue (including the command queue) */
 740         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 741
 742                 /* TFD circular buffer read/write indexes */
 743                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 744                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 745
 746                 /* Max Tx Window size for Scheduler-ACK mode */
 747                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 748                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 749                                 (SCD_WIN_SIZE <<
 750                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 751                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 752
 753                 /* Frame limit */
 754                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 755                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 756                                 sizeof(u32),
 757                                 (SCD_FRAME_LIMIT <<
 758                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 759                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 760
 761         }
 762         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 763                                  (1 << priv->hw_params.max_txq_num) - 1);
 764
 765         /* Activate all Tx DMA/FIFO channels */
 766         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 767
 768         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 769
 770         /* Map each Tx/cmd queue to its corresponding fifo */
 771         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 772                 int ac = default_queue_to_tx_fifo[i];
 773                 iwl_txq_ctx_activate(priv, i);
 774                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 775         }
 776
 777         iwl_release_nic_access(priv);
 778         spin_unlock_irqrestore(&priv->lock, flags);
 779
 780         return ret;
 781 }
 782
 783 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 784         .min_nrg_cck = 97,
 785         .max_nrg_cck = 0,
 786
 787         .auto_corr_min_ofdm = 85,
 788         .auto_corr_min_ofdm_mrc = 170,
 789         .auto_corr_min_ofdm_x1 = 105,
 790         .auto_corr_min_ofdm_mrc_x1 = 220,
 791
 792         .auto_corr_max_ofdm = 120,
 793         .auto_corr_max_ofdm_mrc = 210,
 794         .auto_corr_max_ofdm_x1 = 140,
 795         .auto_corr_max_ofdm_mrc_x1 = 270,
 796
 797         .auto_corr_min_cck = 125,
 798         .auto_corr_max_cck = 200,
 799         .auto_corr_min_cck_mrc = 200,
 800         .auto_corr_max_cck_mrc = 400,
 801
 802         .nrg_th_cck = 100,
 803         .nrg_th_ofdm = 100,
 804 };
 805
 806 /**
 807  * iwl4965_hw_set_hw_params
 808  *
 809  * Called when initializing driver
 810  */
 811 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 812 {
 813
 814         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 815             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 816                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 817                           IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 818                 return -EINVAL;
 819         }
 820
 821         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 822         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 823         priv->hw_params.scd_bc_tbls_size =
 824                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 825         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 826         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 827         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 828         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 829         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 830         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 831
 832         priv->hw_params.tx_chains_num = 2;
 833         priv->hw_params.rx_chains_num = 2;
 834         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 835         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 836         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 837
 838         priv->hw_params.sens = &iwl4965_sensitivity;
 839
 840         return 0;
 841 }
 842
 843 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 844 {
 845         s32 sign = 1;
 846
 847         if (num < 0) {
 848                 sign = -sign;
 849                 num = -num;
 850         }
 851         if (denom < 0) {
 852                 sign = -sign;
 853                 denom = -denom;
 854         }
 855         *res = 1;
 856         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 857
 858         return 1;
 859 }
 860
 861 /**
 862  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 863  *
 864  * Determines power supply voltage compensation for txpower calculations.
 865  * Returns number of 1/2-dB steps to subtract from gain table index,
 866  * to compensate for difference between power supply voltage during
 867  * factory measurements, vs. current power supply voltage.
 868  *
 869  * Voltage indication is higher for lower voltage.
 870  * Lower voltage requires more gain (lower gain table index).
 871  */
 872 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 873                                             s32 current_voltage)
 874 {
 875         s32 comp = 0;
 876
 877         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 878             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 879                 return 0;
 880
 881         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 882                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 883
 884         if (current_voltage > eeprom_voltage)
 885                 comp *= 2;
 886         if ((comp < -2) || (comp > 2))
 887                 comp = 0;
 888
 889         return comp;
 890 }
 891
 892 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 893 {
 894         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 895             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 896                 return CALIB_CH_GROUP_5;
 897
 898         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 899             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 900                 return CALIB_CH_GROUP_1;
 901
 902         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 903             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 904                 return CALIB_CH_GROUP_2;
 905
 906         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 907             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 908                 return CALIB_CH_GROUP_3;
 909
 910         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 911             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 912                 return CALIB_CH_GROUP_4;
 913
 914         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
 915         return -1;
 916 }
 917
 918 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 919 {
 920         s32 b = -1;
 921
 922         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 923                 if (priv->calib_info->band_info[b].ch_from == 0)
 924                         continue;
 925
 926                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 927                     && (channel <= priv->calib_info->band_info[b].ch_to))
 928                         break;
 929         }
 930
 931         return b;
 932 }
 933
 934 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 935 {
 936         s32 val;
 937
 938         if (x2 == x1)
 939                 return y1;
 940         else {
 941                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 942                 return val + y2;
 943         }
 944 }
 945
 946 /**
 947  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 948  *
 949  * Interpolates factory measurements from the two sample channels within a
 950  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 951  * differences in channel frequencies, which is proportional to differences
 952  * in channel number.
 953  */
 954 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 955                                     struct iwl_eeprom_calib_ch_info *chan_info)
 956 {
 957         s32 s = -1;
 958         u32 c;
 959         u32 m;
 960         const struct iwl_eeprom_calib_measure *m1;
 961         const struct iwl_eeprom_calib_measure *m2;
 962         struct iwl_eeprom_calib_measure *omeas;
 963         u32 ch_i1;
 964         u32 ch_i2;
 965
 966         s = iwl4965_get_sub_band(priv, channel);
 967         if (s >= EEPROM_TX_POWER_BANDS) {
 968                 IWL_ERROR("Tx Power can not find channel %d\n", channel);
 969                 return -1;
 970         }
 971
 972         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 973         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 974         chan_info->ch_num = (u8) channel;
 975
 976         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
 977                           channel, s, ch_i1, ch_i2);
 978
 979         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 980                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 981                         m1 = &(priv->calib_info->band_info[s].ch1.
 982                                measurements[c][m]);
 983                         m2 = &(priv->calib_info->band_info[s].ch2.
 984                                measurements[c][m]);
 985                         omeas = &(chan_info->measurements[c][m]);
 986
 987                         omeas->actual_pow =
 988                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 989                                                            m1->actual_pow,
 990                                                            ch_i2,
 991                                                            m2->actual_pow);
 992                         omeas->gain_idx =
 993                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 994                                                            m1->gain_idx, ch_i2,
 995                                                            m2->gain_idx);
 996                         omeas->temperature =
 997                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 998                                                            m1->temperature,
 999                                                            ch_i2,
1000                                                            m2->temperature);
1001                         omeas->pa_det =
1002                             (s8) iwl4965_interpolate_value(channel, ch_i1,
1003                                                            m1->pa_det, ch_i2,
1004                                                            m2->pa_det);
1005
1006                         IWL_DEBUG_TXPOWER
1007                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1008                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1009                         IWL_DEBUG_TXPOWER
1010                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1011                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1012                         IWL_DEBUG_TXPOWER
1013                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1014                              m1->pa_det, m2->pa_det, omeas->pa_det);
1015                         IWL_DEBUG_TXPOWER
1016                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
1017                              m1->temperature, m2->temperature,
1018                              omeas->temperature);
1019                 }
1020         }
1021
1022         return 0;
1023 }
1024
1025 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1026  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1027 static s32 back_off_table[] = {
1028         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1029         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1030         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1031         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1032         10                      /* CCK */
1033 };
1034
1035 /* Thermal compensation values for txpower for various frequency ranges ...
1036  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1037 static struct iwl4965_txpower_comp_entry {
1038         s32 degrees_per_05db_a;
1039         s32 degrees_per_05db_a_denom;
1040 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1041         {9, 2},                 /* group 0 5.2, ch  34-43 */
1042         {4, 1},                 /* group 1 5.2, ch  44-70 */
1043         {4, 1},                 /* group 2 5.2, ch  71-124 */
1044         {4, 1},                 /* group 3 5.2, ch 125-200 */
1045         {3, 1}                  /* group 4 2.4, ch   all */
1046 };
1047
1048 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1049 {
1050         if (!band) {
1051                 if ((rate_power_index & 7) <= 4)
1052                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1053         }
1054         return MIN_TX_GAIN_INDEX;
1055 }
1056
1057 struct gain_entry {
1058         u8 dsp;
1059         u8 radio;
1060 };
1061
1062 static const struct gain_entry gain_table[2][108] = {
1063         /* 5.2GHz power gain index table */
1064         {
1065          {123, 0x3F},           /* highest txpower */
1066          {117, 0x3F},
1067          {110, 0x3F},
1068          {104, 0x3F},
1069          {98, 0x3F},
1070          {110, 0x3E},
1071          {104, 0x3E},
1072          {98, 0x3E},
1073          {110, 0x3D},
1074          {104, 0x3D},
1075          {98, 0x3D},
1076          {110, 0x3C},
1077          {104, 0x3C},
1078          {98, 0x3C},
1079          {110, 0x3B},
1080          {104, 0x3B},
1081          {98, 0x3B},
1082          {110, 0x3A},
1083          {104, 0x3A},
1084          {98, 0x3A},
1085          {110, 0x39},
1086          {104, 0x39},
1087          {98, 0x39},
1088          {110, 0x38},
1089          {104, 0x38},
1090          {98, 0x38},
1091          {110, 0x37},
1092          {104, 0x37},
1093          {98, 0x37},
1094          {110, 0x36},
1095          {104, 0x36},
1096          {98, 0x36},
1097          {110, 0x35},
1098          {104, 0x35},
1099          {98, 0x35},
1100          {110, 0x34},
1101          {104, 0x34},
1102          {98, 0x34},
1103          {110, 0x33},
1104          {104, 0x33},
1105          {98, 0x33},
1106          {110, 0x32},
1107          {104, 0x32},
1108          {98, 0x32},
1109          {110, 0x31},
1110          {104, 0x31},
1111          {98, 0x31},
1112          {110, 0x30},
1113          {104, 0x30},
1114          {98, 0x30},
1115          {110, 0x25},
1116          {104, 0x25},
1117          {98, 0x25},
1118          {110, 0x24},
1119          {104, 0x24},
1120          {98, 0x24},
1121          {110, 0x23},
1122          {104, 0x23},
1123          {98, 0x23},
1124          {110, 0x22},
1125          {104, 0x18},
1126          {98, 0x18},
1127          {110, 0x17},
1128          {104, 0x17},
1129          {98, 0x17},
1130          {110, 0x16},
1131          {104, 0x16},
1132          {98, 0x16},
1133          {110, 0x15},
1134          {104, 0x15},
1135          {98, 0x15},
1136          {110, 0x14},
1137          {104, 0x14},
1138          {98, 0x14},
1139          {110, 0x13},
1140          {104, 0x13},
1141          {98, 0x13},
1142          {110, 0x12},
1143          {104, 0x08},
1144          {98, 0x08},
1145          {110, 0x07},
1146          {104, 0x07},
1147          {98, 0x07},
1148          {110, 0x06},
1149          {104, 0x06},
1150          {98, 0x06},
1151          {110, 0x05},
1152          {104, 0x05},
1153          {98, 0x05},
1154          {110, 0x04},
1155          {104, 0x04},
1156          {98, 0x04},
1157          {110, 0x03},
1158          {104, 0x03},
1159          {98, 0x03},
1160          {110, 0x02},
1161          {104, 0x02},
1162          {98, 0x02},
1163          {110, 0x01},
1164          {104, 0x01},
1165          {98, 0x01},
1166          {110, 0x00},
1167          {104, 0x00},
1168          {98, 0x00},
1169          {93, 0x00},
1170          {88, 0x00},
1171          {83, 0x00},
1172          {78, 0x00},
1173          },
1174         /* 2.4GHz power gain index table */
1175         {
1176          {110, 0x3f},           /* highest txpower */
1177          {104, 0x3f},
1178          {98, 0x3f},
1179          {110, 0x3e},
1180          {104, 0x3e},
1181          {98, 0x3e},
1182          {110, 0x3d},
1183          {104, 0x3d},
1184          {98, 0x3d},
1185          {110, 0x3c},
1186          {104, 0x3c},
1187          {98, 0x3c},
1188          {110, 0x3b},
1189          {104, 0x3b},
1190          {98, 0x3b},
1191          {110, 0x3a},
1192          {104, 0x3a},
1193          {98, 0x3a},
1194          {110, 0x39},
1195          {104, 0x39},
1196          {98, 0x39},
1197          {110, 0x38},
1198          {104, 0x38},
1199          {98, 0x38},
1200          {110, 0x37},
1201          {104, 0x37},
1202          {98, 0x37},
1203          {110, 0x36},
1204          {104, 0x36},
1205          {98, 0x36},
1206          {110, 0x35},
1207          {104, 0x35},
1208          {98, 0x35},
1209          {110, 0x34},
1210          {104, 0x34},
1211          {98, 0x34},
1212          {110, 0x33},
1213          {104, 0x33},
1214          {98, 0x33},
1215          {110, 0x32},
1216          {104, 0x32},
1217          {98, 0x32},
1218          {110, 0x31},
1219          {104, 0x31},
1220          {98, 0x31},
1221          {110, 0x30},
1222          {104, 0x30},
1223          {98, 0x30},
1224          {110, 0x6},
1225          {104, 0x6},
1226          {98, 0x6},
1227          {110, 0x5},
1228          {104, 0x5},
1229          {98, 0x5},
1230          {110, 0x4},
1231          {104, 0x4},
1232          {98, 0x4},
1233          {110, 0x3},
1234          {104, 0x3},
1235          {98, 0x3},
1236          {110, 0x2},
1237          {104, 0x2},
1238          {98, 0x2},
1239          {110, 0x1},
1240          {104, 0x1},
1241          {98, 0x1},
1242          {110, 0x0},
1243          {104, 0x0},
1244          {98, 0x0},
1245          {97, 0},
1246          {96, 0},
1247          {95, 0},
1248          {94, 0},
1249          {93, 0},
1250          {92, 0},
1251          {91, 0},
1252          {90, 0},
1253          {89, 0},
1254          {88, 0},
1255          {87, 0},
1256          {86, 0},
1257          {85, 0},
1258          {84, 0},
1259          {83, 0},
1260          {82, 0},
1261          {81, 0},
1262          {80, 0},
1263          {79, 0},
1264          {78, 0},
1265          {77, 0},
1266          {76, 0},
1267          {75, 0},
1268          {74, 0},
1269          {73, 0},
1270          {72, 0},
1271          {71, 0},
1272          {70, 0},
1273          {69, 0},
1274          {68, 0},
1275          {67, 0},
1276          {66, 0},
1277          {65, 0},
1278          {64, 0},
1279          {63, 0},
1280          {62, 0},
1281          {61, 0},
1282          {60, 0},
1283          {59, 0},
1284          }
1285 };
1286
1287 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1288                                     u8 is_fat, u8 ctrl_chan_high,
1289                                     struct iwl4965_tx_power_db *tx_power_tbl)
1290 {
1291         u8 saturation_power;
1292         s32 target_power;
1293         s32 user_target_power;
1294         s32 power_limit;
1295         s32 current_temp;
1296         s32 reg_limit;
1297         s32 current_regulatory;
1298         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1299         int i;
1300         int c;
1301         const struct iwl_channel_info *ch_info = NULL;
1302         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1303         const struct iwl_eeprom_calib_measure *measurement;
1304         s16 voltage;
1305         s32 init_voltage;
1306         s32 voltage_compensation;
1307         s32 degrees_per_05db_num;
1308         s32 degrees_per_05db_denom;
1309         s32 factory_temp;
1310         s32 temperature_comp[2];
1311         s32 factory_gain_index[2];
1312         s32 factory_actual_pwr[2];
1313         s32 power_index;
1314
1315         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1316          *   are used for indexing into txpower table) */
1317         user_target_power = 2 * priv->tx_power_user_lmt;
1318
1319         /* Get current (RXON) channel, band, width */
1320         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1321                           is_fat);
1322
1323         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1324
1325         if (!is_channel_valid(ch_info))
1326                 return -EINVAL;
1327
1328         /* get txatten group, used to select 1) thermal txpower adjustment
1329          *   and 2) mimo txpower balance between Tx chains. */
1330         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1331         if (txatten_grp < 0)
1332                 return -EINVAL;
1333
1334         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1335                           channel, txatten_grp);
1336
1337         if (is_fat) {
1338                 if (ctrl_chan_high)
1339                         channel -= 2;
1340                 else
1341                         channel += 2;
1342         }
1343
1344         /* hardware txpower limits ...
1345          * saturation (clipping distortion) txpowers are in half-dBm */
1346         if (band)
1347                 saturation_power = priv->calib_info->saturation_power24;
1348         else
1349                 saturation_power = priv->calib_info->saturation_power52;
1350
1351         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1352             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1353                 if (band)
1354                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1355                 else
1356                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1357         }
1358
1359         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1360          *   max_power_avg values are in dBm, convert * 2 */
1361         if (is_fat)
1362                 reg_limit = ch_info->fat_max_power_avg * 2;
1363         else
1364                 reg_limit = ch_info->max_power_avg * 2;
1365
1366         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1367             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1368                 if (band)
1369                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1370                 else
1371                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1372         }
1373
1374         /* Interpolate txpower calibration values for this channel,
1375          *   based on factory calibration tests on spaced channels. */
1376         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1377
1378         /* calculate tx gain adjustment based on power supply voltage */
1379         voltage = priv->calib_info->voltage;
1380         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1381         voltage_compensation =
1382             iwl4965_get_voltage_compensation(voltage, init_voltage);
1383
1384         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1385                           init_voltage,
1386                           voltage, voltage_compensation);
1387
1388         /* get current temperature (Celsius) */
1389         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1390         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1391         current_temp = KELVIN_TO_CELSIUS(current_temp);
1392
1393         /* select thermal txpower adjustment params, based on channel group
1394          *   (same frequency group used for mimo txatten adjustment) */
1395         degrees_per_05db_num =
1396             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1397         degrees_per_05db_denom =
1398             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1399
1400         /* get per-chain txpower values from factory measurements */
1401         for (c = 0; c < 2; c++) {
1402                 measurement = &ch_eeprom_info.measurements[c][1];
1403
1404                 /* txgain adjustment (in half-dB steps) based on difference
1405                  *   between factory and current temperature */
1406                 factory_temp = measurement->temperature;
1407                 iwl4965_math_div_round((current_temp - factory_temp) *
1408                                        degrees_per_05db_denom,
1409                                        degrees_per_05db_num,
1410                                        &temperature_comp[c]);
1411
1412                 factory_gain_index[c] = measurement->gain_idx;
1413                 factory_actual_pwr[c] = measurement->actual_pow;
1414
1415                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1416                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1417                                   "curr tmp %d, comp %d steps\n",
1418                                   factory_temp, current_temp,
1419                                   temperature_comp[c]);
1420
1421                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1422                                   factory_gain_index[c],
1423                                   factory_actual_pwr[c]);
1424         }
1425
1426         /* for each of 33 bit-rates (including 1 for CCK) */
1427         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1428                 u8 is_mimo_rate;
1429                 union iwl4965_tx_power_dual_stream tx_power;
1430
1431                 /* for mimo, reduce each chain's txpower by half
1432                  * (3dB, 6 steps), so total output power is regulatory
1433                  * compliant. */
1434                 if (i & 0x8) {
1435                         current_regulatory = reg_limit -
1436                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1437                         is_mimo_rate = 1;
1438                 } else {
1439                         current_regulatory = reg_limit;
1440                         is_mimo_rate = 0;
1441                 }
1442
1443                 /* find txpower limit, either hardware or regulatory */
1444                 power_limit = saturation_power - back_off_table[i];
1445                 if (power_limit > current_regulatory)
1446                         power_limit = current_regulatory;
1447
1448                 /* reduce user's txpower request if necessary
1449                  * for this rate on this channel */
1450                 target_power = user_target_power;
1451                 if (target_power > power_limit)
1452                         target_power = power_limit;
1453
1454                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1455                                   i, saturation_power - back_off_table[i],
1456                                   current_regulatory, user_target_power,
1457                                   target_power);
1458
1459                 /* for each of 2 Tx chains (radio transmitters) */
1460                 for (c = 0; c < 2; c++) {
1461                         s32 atten_value;
1462
1463                         if (is_mimo_rate)
1464                                 atten_value =
1465                                     (s32)le32_to_cpu(priv->card_alive_init.
1466                                     tx_atten[txatten_grp][c]);
1467                         else
1468                                 atten_value = 0;
1469
1470                         /* calculate index; higher index means lower txpower */
1471                         power_index = (u8) (factory_gain_index[c] -
1472                                             (target_power -
1473                                              factory_actual_pwr[c]) -
1474                                             temperature_comp[c] -
1475                                             voltage_compensation +
1476                                             atten_value);
1477
1478 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1479                                                 power_index); */
1480
1481                         if (power_index < get_min_power_index(i, band))
1482                                 power_index = get_min_power_index(i, band);
1483
1484                         /* adjust 5 GHz index to support negative indexes */
1485                         if (!band)
1486                                 power_index += 9;
1487
1488                         /* CCK, rate 32, reduce txpower for CCK */
1489                         if (i == POWER_TABLE_CCK_ENTRY)
1490                                 power_index +=
1491                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1492
1493                         /* stay within the table! */
1494                         if (power_index > 107) {
1495                                 IWL_WARNING("txpower index %d > 107\n",
1496                                             power_index);
1497                                 power_index = 107;
1498                         }
1499                         if (power_index < 0) {
1500                                 IWL_WARNING("txpower index %d < 0\n",
1501                                             power_index);
1502                                 power_index = 0;
1503                         }
1504
1505                         /* fill txpower command for this rate/chain */
1506                         tx_power.s.radio_tx_gain[c] =
1507                                 gain_table[band][power_index].radio;
1508                         tx_power.s.dsp_predis_atten[c] =
1509                                 gain_table[band][power_index].dsp;
1510
1511                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1512                                           "gain 0x%02x dsp %d\n",
1513                                           c, atten_value, power_index,
1514                                         tx_power.s.radio_tx_gain[c],
1515                                         tx_power.s.dsp_predis_atten[c]);
1516                 } /* for each chain */
1517
1518                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1519
1520         } /* for each rate */
1521
1522         return 0;
1523 }
1524
1525 /**
1526  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1527  *
1528  * Uses the active RXON for channel, band, and characteristics (fat, high)
1529  * The power limit is taken from priv->tx_power_user_lmt.
1530  */
1531 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1532 {
1533         struct iwl4965_txpowertable_cmd cmd = { 0 };
1534         int ret;
1535         u8 band = 0;
1536         u8 is_fat = 0;
1537         u8 ctrl_chan_high = 0;
1538
1539         if (test_bit(STATUS_SCANNING, &priv->status)) {
1540                 /* If this gets hit a lot, switch it to a BUG() and catch
1541                  * the stack trace to find out who is calling this during
1542                  * a scan. */
1543                 IWL_WARNING("TX Power requested while scanning!\n");
1544                 return -EAGAIN;
1545         }
1546
1547         band = priv->band == IEEE80211_BAND_2GHZ;
1548
1549         is_fat =  is_fat_channel(priv->active_rxon.flags);
1550
1551         if (is_fat &&
1552             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1553                 ctrl_chan_high = 1;
1554
1555         cmd.band = band;
1556         cmd.channel = priv->active_rxon.channel;
1557
1558         ret = iwl4965_fill_txpower_tbl(priv, band,
1559                                 le16_to_cpu(priv->active_rxon.channel),
1560                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1561         if (ret)
1562                 goto out;
1563
1564         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1565
1566 out:
1567         return ret;
1568 }
1569
1570 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1571 {
1572         int ret = 0;
1573         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1574         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1575         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1576
1577         if ((rxon1->flags == rxon2->flags) &&
1578             (rxon1->filter_flags == rxon2->filter_flags) &&
1579             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1580             (rxon1->ofdm_ht_single_stream_basic_rates ==
1581              rxon2->ofdm_ht_single_stream_basic_rates) &&
1582             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1583              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1584             (rxon1->rx_chain == rxon2->rx_chain) &&
1585             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1586                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
1587                 return 0;
1588         }
1589
1590         rxon_assoc.flags = priv->staging_rxon.flags;
1591         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1592         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1593         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1594         rxon_assoc.reserved = 0;
1595         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1596             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1597         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1598             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1599         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1600
1601         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1602                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1603         if (ret)
1604                 return ret;
1605
1606         return ret;
1607 }
1608
1609 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1610 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1611 {
1612         int rc;
1613         u8 band = 0;
1614         u8 is_fat = 0;
1615         u8 ctrl_chan_high = 0;
1616         struct iwl4965_channel_switch_cmd cmd = { 0 };
1617         const struct iwl_channel_info *ch_info;
1618
1619         band = priv->band == IEEE80211_BAND_2GHZ;
1620
1621         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1622
1623         is_fat = is_fat_channel(priv->staging_rxon.flags);
1624
1625         if (is_fat &&
1626             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1627                 ctrl_chan_high = 1;
1628
1629         cmd.band = band;
1630         cmd.expect_beacon = 0;
1631         cmd.channel = cpu_to_le16(channel);
1632         cmd.rxon_flags = priv->active_rxon.flags;
1633         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1634         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1635         if (ch_info)
1636                 cmd.expect_beacon = is_channel_radar(ch_info);
1637         else
1638                 cmd.expect_beacon = 1;
1639
1640         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1641                                       ctrl_chan_high, &cmd.tx_power);
1642         if (rc) {
1643                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
1644                 return rc;
1645         }
1646
1647         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1648         return rc;
1649 }
1650 #endif
1651
1652 /**
1653  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1654  */
1655 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1656                                             struct iwl_tx_queue *txq,
1657                                             u16 byte_cnt)
1658 {
1659         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1660         int txq_id = txq->q.id;
1661         int write_ptr = txq->q.write_ptr;
1662         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1663         __le16 bc_ent;
1664
1665         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1666
1667         bc_ent = cpu_to_le16(len & 0xFFF);
1668         /* Set up byte count within first 256 entries */
1669         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1670
1671         /* If within first 64 entries, duplicate at end */
1672         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1673                 scd_bc_tbl[txq_id].
1674                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1675 }
1676
1677 /**
1678  * sign_extend - Sign extend a value using specified bit as sign-bit
1679  *
1680  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1681  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1682  *
1683  * @param oper value to sign extend
1684  * @param index 0 based bit index (0<=index<32) to sign bit
1685  */
1686 static s32 sign_extend(u32 oper, int index)
1687 {
1688         u8 shift = 31 - index;
1689
1690         return (s32)(oper << shift) >> shift;
1691 }
1692
1693 /**
1694  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1695  * @statistics: Provides the temperature reading from the uCode
1696  *
1697  * A return of <0 indicates bogus data in the statistics
1698  */
1699 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1700 {
1701         s32 temperature;
1702         s32 vt;
1703         s32 R1, R2, R3;
1704         u32 R4;
1705
1706         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1707                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1708                 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1709                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1710                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1711                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1712                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1713         } else {
1714                 IWL_DEBUG_TEMP("Running temperature calibration\n");
1715                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1716                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1717                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1718                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1719         }
1720
1721         /*
1722          * Temperature is only 23 bits, so sign extend out to 32.
1723          *
1724          * NOTE If we haven't received a statistics notification yet
1725          * with an updated temperature, use R4 provided to us in the
1726          * "initialize" ALIVE response.
1727          */
1728         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1729                 vt = sign_extend(R4, 23);
1730         else
1731                 vt = sign_extend(
1732                         le32_to_cpu(priv->statistics.general.temperature), 23);
1733
1734         IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1735
1736         if (R3 == R1) {
1737                 IWL_ERROR("Calibration conflict R1 == R3\n");
1738                 return -1;
1739         }
1740
1741         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1742          * Add offset to center the adjustment around 0 degrees Centigrade. */
1743         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1744         temperature /= (R3 - R1);
1745         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1746
1747         IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1748                         temperature, KELVIN_TO_CELSIUS(temperature));
1749
1750         return temperature;
1751 }
1752
1753 /* Adjust Txpower only if temperature variance is greater than threshold. */
1754 #define IWL_TEMPERATURE_THRESHOLD   3
1755
1756 /**
1757  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1758  *
1759  * If the temperature changed has changed sufficiently, then a recalibration
1760  * is needed.
1761  *
1762  * Assumes caller will replace priv->last_temperature once calibration
1763  * executed.
1764  */
1765 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1766 {
1767         int temp_diff;
1768
1769         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1770                 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1771                 return 0;
1772         }
1773
1774         temp_diff = priv->temperature - priv->last_temperature;
1775
1776         /* get absolute value */
1777         if (temp_diff < 0) {
1778                 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1779                 temp_diff = -temp_diff;
1780         } else if (temp_diff == 0)
1781                 IWL_DEBUG_POWER("Same temp, \n");
1782         else
1783                 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1784
1785         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1786                 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1787                 return 0;
1788         }
1789
1790         IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1791
1792         return 1;
1793 }
1794
1795 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1796 {
1797         s32 temp;
1798
1799         temp = iwl4965_hw_get_temperature(priv);
1800         if (temp < 0)
1801                 return;
1802
1803         if (priv->temperature != temp) {
1804                 if (priv->temperature)
1805                         IWL_DEBUG_TEMP("Temperature changed "
1806                                        "from %dC to %dC\n",
1807                                        KELVIN_TO_CELSIUS(priv->temperature),
1808                                        KELVIN_TO_CELSIUS(temp));
1809                 else
1810                         IWL_DEBUG_TEMP("Temperature "
1811                                        "initialized to %dC\n",
1812                                        KELVIN_TO_CELSIUS(temp));
1813         }
1814
1815         priv->temperature = temp;
1816         set_bit(STATUS_TEMPERATURE, &priv->status);
1817
1818         if (!priv->disable_tx_power_cal &&
1819              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1820              iwl4965_is_temp_calib_needed(priv))
1821                 queue_work(priv->workqueue, &priv->txpower_work);
1822 }
1823
1824 /**
1825  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1826  */
1827 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1828                                             u16 txq_id)
1829 {
1830         /* Simply stop the queue, but don't change any configuration;
1831          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1832         iwl_write_prph(priv,
1833                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1834                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1835                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1836 }
1837
1838 /**
1839  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1840  * priv->lock must be held by the caller
1841  */
1842 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1843                                    u16 ssn_idx, u8 tx_fifo)
1844 {
1845         int ret = 0;
1846
1847         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1848             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1849                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1850                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1851                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1852                 return -EINVAL;
1853         }
1854
1855         ret = iwl_grab_nic_access(priv);
1856         if (ret)
1857                 return ret;
1858
1859         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1860
1861         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1862
1863         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1864         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1865         /* supposes that ssn_idx is valid (!= 0xFFF) */
1866         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1867
1868         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1869         iwl_txq_ctx_deactivate(priv, txq_id);
1870         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1871
1872         iwl_release_nic_access(priv);
1873
1874         return 0;
1875 }
1876
1877 /**
1878  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1879  */
1880 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1881                                         u16 txq_id)
1882 {
1883         u32 tbl_dw_addr;
1884         u32 tbl_dw;
1885         u16 scd_q2ratid;
1886
1887         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1888
1889         tbl_dw_addr = priv->scd_base_addr +
1890                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1891
1892         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1893
1894         if (txq_id & 0x1)
1895                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1896         else
1897                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1898
1899         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1900
1901         return 0;
1902 }
1903
1904
1905 /**
1906  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1907  *
1908  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1909  *        i.e. it must be one of the higher queues used for aggregation
1910  */
1911 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1912                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1913 {
1914         unsigned long flags;
1915         int ret;
1916         u16 ra_tid;
1917
1918         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1919             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1920                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1921                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1922                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1923                 return -EINVAL;
1924         }
1925
1926         ra_tid = BUILD_RAxTID(sta_id, tid);
1927
1928         /* Modify device's station table to Tx this TID */
1929         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1930
1931         spin_lock_irqsave(&priv->lock, flags);
1932         ret = iwl_grab_nic_access(priv);
1933         if (ret) {
1934                 spin_unlock_irqrestore(&priv->lock, flags);
1935                 return ret;
1936         }
1937
1938         /* Stop this Tx queue before configuring it */
1939         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1940
1941         /* Map receiver-address / traffic-ID to this queue */
1942         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1943
1944         /* Set this queue as a chain-building queue */
1945         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1946
1947         /* Place first TFD at index corresponding to start sequence number.
1948          * Assumes that ssn_idx is valid (!= 0xFFF) */
1949         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1950         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1951         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1952
1953         /* Set up Tx window size and frame limit for this queue */
1954         iwl_write_targ_mem(priv,
1955                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1956                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1957                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1958
1959         iwl_write_targ_mem(priv, priv->scd_base_addr +
1960                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1961                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1962                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1963
1964         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1965
1966         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1967         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1968
1969         iwl_release_nic_access(priv);
1970         spin_unlock_irqrestore(&priv->lock, flags);
1971
1972         return 0;
1973 }
1974
1975
1976 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1977 {
1978         switch (cmd_id) {
1979         case REPLY_RXON:
1980                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1981         default:
1982                 return len;
1983         }
1984 }
1985
1986 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1987 {
1988         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1989         addsta->mode = cmd->mode;
1990         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1991         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1992         addsta->station_flags = cmd->station_flags;
1993         addsta->station_flags_msk = cmd->station_flags_msk;
1994         addsta->tid_disable_tx = cmd->tid_disable_tx;
1995         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1996         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1997         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1998         addsta->reserved1 = __constant_cpu_to_le16(0);
1999         addsta->reserved2 = __constant_cpu_to_le32(0);
2000
2001         return (u16)sizeof(struct iwl4965_addsta_cmd);
2002 }
2003
2004 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2005 {
2006         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2007 }
2008
2009 /**
2010  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2011  */
2012 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2013                                       struct iwl_ht_agg *agg,
2014                                       struct iwl4965_tx_resp *tx_resp,
2015                                       int txq_id, u16 start_idx)
2016 {
2017         u16 status;
2018         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2019         struct ieee80211_tx_info *info = NULL;
2020         struct ieee80211_hdr *hdr = NULL;
2021         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2022         int i, sh, idx;
2023         u16 seq;
2024         if (agg->wait_for_ba)
2025                 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2026
2027         agg->frame_count = tx_resp->frame_count;
2028         agg->start_idx = start_idx;
2029         agg->rate_n_flags = rate_n_flags;
2030         agg->bitmap = 0;
2031
2032         /* num frames attempted by Tx command */
2033         if (agg->frame_count == 1) {
2034                 /* Only one frame was attempted; no block-ack will arrive */
2035                 status = le16_to_cpu(frame_status[0].status);
2036                 idx = start_idx;
2037
2038                 /* FIXME: code repetition */
2039                 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2040                                    agg->frame_count, agg->start_idx, idx);
2041
2042                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2043                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2044                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2045                 info->flags |= iwl_is_tx_success(status) ?
2046                         IEEE80211_TX_STAT_ACK : 0;
2047                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2048                 /* FIXME: code repetition end */
2049
2050                 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2051                                     status & 0xff, tx_resp->failure_frame);
2052                 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2053
2054                 agg->wait_for_ba = 0;
2055         } else {
2056                 /* Two or more frames were attempted; expect block-ack */
2057                 u64 bitmap = 0;
2058                 int start = agg->start_idx;
2059
2060                 /* Construct bit-map of pending frames within Tx window */
2061                 for (i = 0; i < agg->frame_count; i++) {
2062                         u16 sc;
2063                         status = le16_to_cpu(frame_status[i].status);
2064                         seq  = le16_to_cpu(frame_status[i].sequence);
2065                         idx = SEQ_TO_INDEX(seq);
2066                         txq_id = SEQ_TO_QUEUE(seq);
2067
2068                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2069                                       AGG_TX_STATE_ABORT_MSK))
2070                                 continue;
2071
2072                         IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2073                                            agg->frame_count, txq_id, idx);
2074
2075                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2076
2077                         sc = le16_to_cpu(hdr->seq_ctrl);
2078                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2079                                 IWL_ERROR("BUG_ON idx doesn't match seq control"
2080                                           " idx=%d, seq_idx=%d, seq=%d\n",
2081                                           idx, SEQ_TO_SN(sc),
2082                                           hdr->seq_ctrl);
2083                                 return -1;
2084                         }
2085
2086                         IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2087                                            i, idx, SEQ_TO_SN(sc));
2088
2089                         sh = idx - start;
2090                         if (sh > 64) {
2091                                 sh = (start - idx) + 0xff;
2092                                 bitmap = bitmap << sh;
2093                                 sh = 0;
2094                                 start = idx;
2095                         } else if (sh < -64)
2096                                 sh  = 0xff - (start - idx);
2097                         else if (sh < 0) {
2098                                 sh = start - idx;
2099                                 start = idx;
2100                                 bitmap = bitmap << sh;
2101                                 sh = 0;
2102                         }
2103                         bitmap |= 1ULL << sh;
2104                         IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2105                                            start, (unsigned long long)bitmap);
2106                 }
2107
2108                 agg->bitmap = bitmap;
2109                 agg->start_idx = start;
2110                 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2111                                    agg->frame_count, agg->start_idx,
2112                                    (unsigned long long)agg->bitmap);
2113
2114                 if (bitmap)
2115                         agg->wait_for_ba = 1;
2116         }
2117         return 0;
2118 }
2119
2120 /**
2121  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2122  */
2123 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2124                                 struct iwl_rx_mem_buffer *rxb)
2125 {
2126         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2127         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2128         int txq_id = SEQ_TO_QUEUE(sequence);
2129         int index = SEQ_TO_INDEX(sequence);
2130         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2131         struct ieee80211_hdr *hdr;
2132         struct ieee80211_tx_info *info;
2133         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2134         u32  status = le32_to_cpu(tx_resp->u.status);
2135         int tid = MAX_TID_COUNT;
2136         int sta_id;
2137         int freed;
2138         u8 *qc = NULL;
2139
2140         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2141                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2142                           "is out of range [0-%d] %d %d\n", txq_id,
2143                           index, txq->q.n_bd, txq->q.write_ptr,
2144                           txq->q.read_ptr);
2145                 return;
2146         }
2147
2148         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2149         memset(&info->status, 0, sizeof(info->status));
2150
2151         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2152         if (ieee80211_is_data_qos(hdr->frame_control)) {
2153                 qc = ieee80211_get_qos_ctl(hdr);
2154                 tid = qc[0] & 0xf;
2155         }
2156
2157         sta_id = iwl_get_ra_sta_id(priv, hdr);
2158         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2159                 IWL_ERROR("Station not known\n");
2160                 return;
2161         }
2162
2163         if (txq->sched_retry) {
2164                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2165                 struct iwl_ht_agg *agg = NULL;
2166
2167                 WARN_ON(!qc);
2168
2169                 agg = &priv->stations[sta_id].tid[tid].agg;
2170
2171                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2172
2173                 /* check if BAR is needed */
2174                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2175                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2176
2177                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2178                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2179                         IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2180                                            "%d index %d\n", scd_ssn , index);
2181                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2182                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2183
2184                         if (priv->mac80211_registered &&
2185                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2186                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2187                                 if (agg->state == IWL_AGG_OFF)
2188                                         ieee80211_wake_queue(priv->hw, txq_id);
2189                                 else
2190                                         ieee80211_wake_queue(priv->hw,
2191                                                              txq->swq_id);
2192                         }
2193                 }
2194         } else {
2195                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2196                 info->flags |= iwl_is_tx_success(status) ?
2197                                         IEEE80211_TX_STAT_ACK : 0;
2198                 iwl_hwrate_to_tx_control(priv,
2199                                         le32_to_cpu(tx_resp->rate_n_flags),
2200                                         info);
2201
2202                 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2203                                    "rate_n_flags 0x%x retries %d\n",
2204                                    txq_id,
2205                                    iwl_get_tx_fail_reason(status), status,
2206                                    le32_to_cpu(tx_resp->rate_n_flags),
2207                                    tx_resp->failure_frame);
2208
2209                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2210                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2211                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2212
2213                 if (priv->mac80211_registered &&
2214                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2215                         ieee80211_wake_queue(priv->hw, txq_id);
2216         }
2217
2218         if (qc && likely(sta_id != IWL_INVALID_STATION))
2219                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2220
2221         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2222                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
2223 }
2224
2225 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2226                              struct iwl_rx_phy_res *rx_resp)
2227 {
2228         /* data from PHY/DSP regarding signal strength, etc.,
2229          *   contents are always there, not configurable by host.  */
2230         struct iwl4965_rx_non_cfg_phy *ncphy =
2231             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2232         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2233                         >> IWL49_AGC_DB_POS;
2234
2235         u32 valid_antennae =
2236             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2237                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2238         u8 max_rssi = 0;
2239         u32 i;
2240
2241         /* Find max rssi among 3 possible receivers.
2242          * These values are measured by the digital signal processor (DSP).
2243          * They should stay fairly constant even as the signal strength varies,
2244          *   if the radio's automatic gain control (AGC) is working right.
2245          * AGC value (see below) will provide the "interesting" info. */
2246         for (i = 0; i < 3; i++)
2247                 if (valid_antennae & (1 << i))
2248                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2249
2250         IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2251                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2252                 max_rssi, agc);
2253
2254         /* dBm = max_rssi dB - agc dB - constant.
2255          * Higher AGC (higher radio gain) means lower signal. */
2256         return max_rssi - agc - IWL_RSSI_OFFSET;
2257 }
2258
2259
2260 /* Set up 4965-specific Rx frame reply handlers */
2261 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2262 {
2263         /* Legacy Rx frames */
2264         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2265         /* Tx response */
2266         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2267 }
2268
2269 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2270 {
2271         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2272 }
2273
2274 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2275 {
2276         cancel_work_sync(&priv->txpower_work);
2277 }
2278
2279
2280 static struct iwl_hcmd_ops iwl4965_hcmd = {
2281         .rxon_assoc = iwl4965_send_rxon_assoc,
2282 };
2283
2284 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2285         .get_hcmd_size = iwl4965_get_hcmd_size,
2286         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2287         .chain_noise_reset = iwl4965_chain_noise_reset,
2288         .gain_computation = iwl4965_gain_computation,
2289         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2290         .calc_rssi = iwl4965_calc_rssi,
2291 };
2292
2293 static struct iwl_lib_ops iwl4965_lib = {
2294         .set_hw_params = iwl4965_hw_set_hw_params,
2295         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2296         .txq_set_sched = iwl4965_txq_set_sched,
2297         .txq_agg_enable = iwl4965_txq_agg_enable,
2298         .txq_agg_disable = iwl4965_txq_agg_disable,
2299         .rx_handler_setup = iwl4965_rx_handler_setup,
2300         .setup_deferred_work = iwl4965_setup_deferred_work,
2301         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2302         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2303         .alive_notify = iwl4965_alive_notify,
2304         .init_alive_start = iwl4965_init_alive_start,
2305         .load_ucode = iwl4965_load_bsm,
2306         .apm_ops = {
2307                 .init = iwl4965_apm_init,
2308                 .reset = iwl4965_apm_reset,
2309                 .stop = iwl4965_apm_stop,
2310                 .config = iwl4965_nic_config,
2311                 .set_pwr_src = iwl_set_pwr_src,
2312         },
2313         .eeprom_ops = {
2314                 .regulatory_bands = {
2315                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2316                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2317                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2318                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2319                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2320                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2321                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2322                 },
2323                 .verify_signature  = iwlcore_eeprom_verify_signature,
2324                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2325                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2326                 .calib_version = iwl4965_eeprom_calib_version,
2327                 .query_addr = iwlcore_eeprom_query_addr,
2328         },
2329         .send_tx_power  = iwl4965_send_tx_power,
2330         .update_chain_flags = iwl_update_chain_flags,
2331         .temperature = iwl4965_temperature_calib,
2332 };
2333
2334 static struct iwl_ops iwl4965_ops = {
2335         .lib = &iwl4965_lib,
2336         .hcmd = &iwl4965_hcmd,
2337         .utils = &iwl4965_hcmd_utils,
2338 };
2339
2340 struct iwl_cfg iwl4965_agn_cfg = {
2341         .name = "4965AGN",
2342         .fw_name_pre = IWL4965_FW_PRE,
2343         .ucode_api_max = IWL4965_UCODE_API_MAX,
2344         .ucode_api_min = IWL4965_UCODE_API_MIN,
2345         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2346         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2347         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2348         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2349         .ops = &iwl4965_ops,
2350         .mod_params = &iwl4965_mod_params,
2351 };
2352
2353 /* Module firmware */
2354 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2355
2356 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2357 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2358 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2359 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2360 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2361 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2362 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
2363 MODULE_PARM_DESC(debug, "debug output mask");
2364 module_param_named(
2365         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2366 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2367
2368 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2369 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2370 /* QoS */
2371 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
2372 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
2373 /* 11n */
2374 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2375 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2376 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2377 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2378
2379 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2380 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");