2 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
6 * Version 0.03 Cleaned auto-tune, added probe
7 * Version 0.04 Added second channel tuning
8 * Version 0.05 Enhanced tuning ; added qd6500 support
9 * Version 0.06 Added dos driver's list
10 * Version 0.07 Second channel bug fix
12 * QDI QD6500/QD6580 EIDE controller fast support
14 * Please set local bus speed using kernel parameter idebus
15 * for example, "idebus=33" stands for 33Mhz VLbus
16 * To activate controller support, use "ide0=qd65xx"
17 * To enable tuning, use "hda=autotune hdb=autotune"
18 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
22 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
23 * Samuel Thibault <samuel.thibault@fnac.net>
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/delay.h>
30 #include <linux/timer.h>
32 #include <linux/ioport.h>
33 #include <linux/blkdev.h>
34 #include <linux/hdreg.h>
35 #include <linux/ide.h>
36 #include <linux/init.h>
37 #include <asm/system.h>
40 #define DRV_NAME "qd65xx"
45 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
46 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
47 * -- qd6500 is a single IDE interface
48 * -- qd6580 is a dual IDE interface
50 * More research on qd6580 being done by willmore@cig.mot.com (David)
51 * More Information given by Petr Soucek (petr@ryston.cz)
52 * http://www.ryston.cz/petr/vlb
59 * base+0x01: Config (R/O)
61 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
62 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
63 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
64 * bit 3: qd6500: 1 = disabled, 0 = enabled
68 * qd6580: either 1010 or 0101
71 * base+0x02: Timer2 (qd6580 only)
74 * base+0x03: Control (qd6580 only)
76 * bits 0-3 must always be set 1
77 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
78 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
79 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
80 * channel 1 for hdc & hdd
81 * bit 1 : 1 = only disks on primary port
82 * 0 = disks & ATAPI devices on primary port
84 * bit 5 : status, but of what ?
85 * bit 6 : always set 1 by dos driver
86 * bit 7 : set 1 for non-ATAPI devices on primary port
87 * (maybe read-ahead and post-write buffer ?)
90 static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
95 * This routine is invoked to prepare for access to a given drive.
98 static void qd65xx_select(ide_drive_t *drive)
100 u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
101 (QD_TIMREG(drive) & 0x02);
103 if (timings[index] != QD_TIMING(drive))
104 outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
108 * qd6500_compute_timing
110 * computes the timing value where
111 * lower nibble represents active time, in count of VLB clocks
112 * upper nibble represents recovery time, in count of VLB clocks
115 static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
117 u8 active_cycle,recovery_cycle;
119 if (system_bus_clock()<=33) {
120 active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
121 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
123 active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
124 recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
127 return((recovery_cycle<<4) | 0x08 | active_cycle);
131 * qd6580_compute_timing
136 static u8 qd6580_compute_timing (int active_time, int recovery_time)
138 u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
139 u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
141 return((recovery_cycle<<4) | active_cycle);
147 * tries to find timing from dos driver's table
150 static int qd_find_disk_type (ide_drive_t *drive,
151 int *active_time, int *recovery_time)
153 struct qd65xx_timing_s *p;
156 if (!*drive->id->model) return 0;
158 strncpy(model,drive->id->model,40);
159 ide_fixstring(model,40,1); /* byte-swap */
161 for (p = qd65xx_timing ; p->offset != -1 ; p++) {
162 if (!strncmp(p->model, model+p->offset, 4)) {
163 printk(KERN_DEBUG "%s: listed !\n", drive->name);
164 *active_time = p->active;
165 *recovery_time = p->recovery;
178 static void qd_set_timing (ide_drive_t *drive, u8 timing)
180 drive->drive_data &= 0xff00;
181 drive->drive_data |= timing;
183 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
186 static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
188 int active_time = 175;
189 int recovery_time = 415; /* worst case values from the dos driver */
192 * FIXME: use "pio" value
194 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
195 && drive->id->tPIO && (drive->id->field_valid & 0x02)
196 && drive->id->eide_pio >= 240) {
198 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
201 recovery_time = drive->id->eide_pio - 120;
204 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
207 static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
209 ide_hwif_t *hwif = drive->hwif;
210 unsigned int cycle_time;
211 int active_time = 175;
212 int recovery_time = 415; /* worst case values from the dos driver */
213 u8 base = (hwif->config_data & 0xff00) >> 8;
215 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
216 cycle_time = ide_pio_cycle_time(drive, pio);
221 if (cycle_time >= 110) {
223 recovery_time = cycle_time - 102;
225 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
228 if (cycle_time >= 69) {
230 recovery_time = cycle_time - 61;
232 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
235 if (cycle_time >= 180) {
237 recovery_time = cycle_time - 120;
239 active_time = ide_pio_timings[pio].active_time;
240 recovery_time = cycle_time - active_time;
243 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
246 if (!HWIF(drive)->channel && drive->media != ide_disk) {
247 outb(0x5f, QD_CONTROL_PORT);
248 printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
249 "and post-write buffer on %s.\n",
250 drive->name, HWIF(drive)->name);
253 qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
259 * tests if the given port is a register
262 static int __init qd_testreg(int port)
267 local_irq_save(flags);
268 savereg = inb_p(port);
269 outb_p(QD_TESTVAL, port); /* safe value */
270 readreg = inb_p(port);
272 local_irq_restore(flags);
274 if (savereg == QD_TESTVAL) {
275 printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
276 printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
277 printk(KERN_ERR "Assuming qd65xx is not present.\n");
281 return (readreg != QD_TESTVAL);
284 static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
286 u8 base = (hwif->config_data & 0xff00) >> 8;
287 u8 config = QD_CONFIG(hwif);
289 hwif->drives[0].drive_data = QD6500_DEF_DATA;
290 hwif->drives[1].drive_data = QD6500_DEF_DATA;
293 static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
296 u8 base = (hwif->config_data & 0xff00) >> 8;
297 u8 config = QD_CONFIG(hwif);
299 if (hwif->host_flags & IDE_HFLAG_SINGLE) {
300 t1 = QD6580_DEF_DATA;
301 t2 = QD6580_DEF_DATA2;
303 t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
305 hwif->drives[0].drive_data = t1;
306 hwif->drives[1].drive_data = t2;
309 static const struct ide_port_ops qd6500_port_ops = {
310 .port_init_devs = qd6500_port_init_devs,
311 .set_pio_mode = qd6500_set_pio_mode,
312 .selectproc = qd65xx_select,
315 static const struct ide_port_ops qd6580_port_ops = {
316 .port_init_devs = qd6580_port_init_devs,
317 .set_pio_mode = qd6580_set_pio_mode,
318 .selectproc = qd65xx_select,
321 static const struct ide_port_info qd65xx_port_info __initdata = {
323 .chipset = ide_qd65xx,
324 .host_flags = IDE_HFLAG_IO_32BIT |
326 IDE_HFLAG_NO_AUTOTUNE,
327 .pio_mask = ATA_PIO4,
333 * looks at the specified baseport, and if qd found, registers & initialises it
334 * return 1 if another qd may be probed
337 static int __init qd_probe(int base)
340 u8 config, unit, control;
341 struct ide_port_info d = qd65xx_port_info;
343 config = inb(QD_CONFIG_PORT);
345 if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
348 unit = ! (config & QD_CONFIG_IDE_BASEPORT);
351 d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
353 switch (config & 0xf0) {
354 case QD_CONFIG_QD6500:
355 if (qd_testreg(base))
356 return -ENODEV; /* bad register */
358 if (config & QD_CONFIG_DISABLED) {
359 printk(KERN_WARNING "qd6500 is disabled !\n");
363 printk(KERN_NOTICE "qd6500 at %#x\n", base);
364 printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
367 d.port_ops = &qd6500_port_ops;
368 d.host_flags |= IDE_HFLAG_SINGLE;
370 case QD_CONFIG_QD6580_A:
371 case QD_CONFIG_QD6580_B:
372 if (qd_testreg(base) || qd_testreg(base + 0x02))
373 return -ENODEV; /* bad registers */
375 control = inb(QD_CONTROL_PORT);
377 printk(KERN_NOTICE "qd6580 at %#x\n", base);
378 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
379 config, control, QD_ID3);
381 outb(QD_DEF_CONTR, QD_CONTROL_PORT);
383 d.port_ops = &qd6580_port_ops;
384 if (control & QD_CONTR_SEC_DISABLED)
385 d.host_flags |= IDE_HFLAG_SINGLE;
387 printk(KERN_INFO "qd6580: %s IDE board\n",
388 (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
394 rc = ide_legacy_device_add(&d, (base << 8) | config);
396 if (d.host_flags & IDE_HFLAG_SINGLE)
397 return (rc == 0) ? 1 : rc;
402 static int probe_qd65xx;
404 module_param_named(probe, probe_qd65xx, bool, 0);
405 MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
407 static int __init qd65xx_init(void)
409 int rc1, rc2 = -ENODEV;
411 if (probe_qd65xx == 0)
414 rc1 = qd_probe(0x30);
416 rc2 = qd_probe(0xb0);
418 if (rc1 < 0 && rc2 < 0)
424 module_init(qd65xx_init);
426 MODULE_AUTHOR("Samuel Thibault");
427 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
428 MODULE_LICENSE("GPL");