2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Unified implementation of memcpy, memmove and the __copy_user backend.
8 * Copyright (C) 1998, 99, 2000, 01, 2002 Ralf Baechle (ralf@gnu.org)
9 * Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc.
10 * Copyright (C) 2002 Broadcom, Inc.
11 * memcpy/copy_user author: Mark Vandevoorde
13 * Mnemonic names for arguments to memcpy/__copy_user
15 #include <linux/config.h>
17 #include <asm/offset.h>
18 #include <asm/regdef.h>
27 * memcpy copies len bytes from src to dst and sets v0 to dst.
29 * - src and dst don't overlap
32 * memcpy uses the standard calling convention
34 * __copy_user copies up to len bytes from src to dst and sets a2 (len) to
35 * the number of uncopied bytes due to an exception caused by a read or write.
36 * __copy_user assumes that src and dst don't overlap, and that the call is
37 * implementing one of the following:
39 * - src is readable (no exceptions when reading src)
41 * - dst is writable (no exceptions when writing dst)
42 * __copy_user uses a non-standard calling convention; see
43 * include/asm-mips/uaccess.h
45 * When an exception happens on a load, the handler must
46 # ensure that all of the destination buffer is overwritten to prevent
47 * leaking information to user mode programs.
55 * The exception handler for loads requires that:
56 * 1- AT contain the address of the byte just past the end of the source
58 * 2- src_entry <= src < AT, and
59 * 3- (dst - src) == (dst_entry - src_entry),
60 * The _entry suffix denotes values when __copy_user was called.
62 * (1) is set up up by uaccess.h and maintained by not writing AT in copy_user
63 * (2) is met by incrementing src by the number of bytes copied
64 * (3) is met by not doing loads between a pair of increments of dst and src
66 * The exception handlers for stores adjust len (if necessary) and return.
67 * These handlers do not need to overwrite any data.
69 * For __rmemcpy and memmove an exception is always a kernel bug, therefore
70 * they're not protected.
73 #define EXC(inst_reg,addr,handler) \
75 .section __ex_table,"a"; \
80 * Only on the 64-bit kernel we can made use of 64-bit registers.
105 * As we are sharing code base with the mips32 tree (which use the o32 ABI
106 * register definitions). We need to redefine the register definitions from
107 * the n64 ABI register naming to the o32 ABI register naming.
140 #endif /* USE_DOUBLE */
142 #ifdef CONFIG_CPU_LITTLE_ENDIAN
143 #define LDFIRST LOADR
145 #define STFIRST STORER
146 #define STREST STOREL
147 #define SHIFT_DISCARD SLLV
149 #define LDFIRST LOADL
151 #define STFIRST STOREL
152 #define STREST STORER
153 #define SHIFT_DISCARD SRLV
156 #define FIRST(unit) ((unit)*NBYTES)
157 #define REST(unit) (FIRST(unit)+NBYTES-1)
158 #define UNIT(unit) FIRST(unit)
160 #define ADDRMASK (NBYTES-1)
167 * A combined memcpy/__copy_user
168 * __copy_user sets len to 0 for success; else to an upper bound of
169 * the number of uncopied bytes.
170 * memcpy sets v0 to dst.
173 LEAF(memcpy) /* a0=dst a1=src a2=len */
174 move v0, dst /* return value */
178 * Note: dst & src may be unaligned, len may be 0
184 * The "issue break"s below are very approximate.
185 * Issue delays for dcache fills will perturb the schedule, as will
186 * load queue full replay traps, etc.
188 * If len < NBYTES use byte operations.
193 and t1, dst, ADDRMASK
196 bnez t2, copy_bytes_checklen
197 and t0, src, ADDRMASK
200 bnez t1, dst_unaligned
202 bnez t0, src_unaligned_dst_aligned
204 * use delay slot for fall-through
205 * src and dst are aligned; need to compute rem
208 SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter
209 beqz t0, cleanup_both_aligned # len < 8*NBYTES
210 and rem, len, (8*NBYTES-1) # rem = len % (8*NBYTES)
215 EXC( LOAD t0, UNIT(0)(src), l_exc)
216 EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
217 EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
218 EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
219 SUB len, len, 8*NBYTES
220 EXC( LOAD t4, UNIT(4)(src), l_exc_copy)
221 EXC( LOAD t7, UNIT(5)(src), l_exc_copy)
222 EXC( STORE t0, UNIT(0)(dst), s_exc_p8u)
223 EXC( STORE t1, UNIT(1)(dst), s_exc_p7u)
224 EXC( LOAD t0, UNIT(6)(src), l_exc_copy)
225 EXC( LOAD t1, UNIT(7)(src), l_exc_copy)
226 ADD src, src, 8*NBYTES
227 ADD dst, dst, 8*NBYTES
228 EXC( STORE t2, UNIT(-6)(dst), s_exc_p6u)
229 EXC( STORE t3, UNIT(-5)(dst), s_exc_p5u)
230 EXC( STORE t4, UNIT(-4)(dst), s_exc_p4u)
231 EXC( STORE t7, UNIT(-3)(dst), s_exc_p3u)
232 EXC( STORE t0, UNIT(-2)(dst), s_exc_p2u)
233 EXC( STORE t1, UNIT(-1)(dst), s_exc_p1u)
240 * len == rem == the number of bytes left to copy < 8*NBYTES
242 cleanup_both_aligned:
244 sltu t0, len, 4*NBYTES
245 bnez t0, less_than_4units
246 and rem, len, (NBYTES-1) # rem = len % NBYTES
250 EXC( LOAD t0, UNIT(0)(src), l_exc)
251 EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
252 EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
253 EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
254 SUB len, len, 4*NBYTES
255 ADD src, src, 4*NBYTES
256 EXC( STORE t0, UNIT(0)(dst), s_exc_p4u)
257 EXC( STORE t1, UNIT(1)(dst), s_exc_p3u)
258 EXC( STORE t2, UNIT(2)(dst), s_exc_p2u)
259 EXC( STORE t3, UNIT(3)(dst), s_exc_p1u)
261 ADD dst, dst, 4*NBYTES
266 beq rem, len, copy_bytes
269 EXC( LOAD t0, 0(src), l_exc)
272 EXC( STORE t0, 0(dst), s_exc_p1u)
277 * src and dst are aligned, need to copy rem bytes (rem < NBYTES)
278 * A loop would do only a byte at a time with possible branch
279 * mispredicts. Can't do an explicit LOAD dst,mask,or,STORE
280 * because can't assume read-access to dst. Instead, use
281 * STREST dst, which doesn't require read access to dst.
283 * This code should perform better than a simple loop on modern,
284 * wide-issue mips processors because the code has fewer branches and
285 * more instruction-level parallelism.
289 ADD t1, dst, len # t1 is just past last byte of dst
291 SLL rem, len, 3 # rem = number of bits to keep
292 EXC( LOAD t0, 0(src), l_exc)
293 SUB bits, bits, rem # bits = number of bits to discard
294 SHIFT_DISCARD t0, t0, bits
295 EXC( STREST t0, -1(t1), s_exc)
301 * t0 = src & ADDRMASK
302 * t1 = dst & ADDRMASK; T1 > 0
305 * Copy enough bytes to align dst
306 * Set match = (src and dst have same alignment)
309 EXC( LDFIRST t3, FIRST(0)(src), l_exc)
311 EXC( LDREST t3, REST(0)(src), l_exc_copy)
312 SUB t2, t2, t1 # t2 = number of bytes copied
314 EXC( STFIRST t3, FIRST(0)(dst), s_exc)
318 beqz match, both_aligned
321 src_unaligned_dst_aligned:
322 SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter
324 beqz t0, cleanup_src_unaligned
325 and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES
329 * Avoid consecutive LD*'s to the same register since some mips
330 * implementations can't issue them in the same cycle.
331 * It's OK to load FIRST(N+1) before REST(N) because the two addresses
332 * are to the same unit (unless src is aligned, but it's not).
334 EXC( LDFIRST t0, FIRST(0)(src), l_exc)
335 EXC( LDFIRST t1, FIRST(1)(src), l_exc_copy)
336 SUB len, len, 4*NBYTES
337 EXC( LDREST t0, REST(0)(src), l_exc_copy)
338 EXC( LDREST t1, REST(1)(src), l_exc_copy)
339 EXC( LDFIRST t2, FIRST(2)(src), l_exc_copy)
340 EXC( LDFIRST t3, FIRST(3)(src), l_exc_copy)
341 EXC( LDREST t2, REST(2)(src), l_exc_copy)
342 EXC( LDREST t3, REST(3)(src), l_exc_copy)
343 PREF( 0, 9*32(src) ) # 0 is PREF_LOAD (not streamed)
344 ADD src, src, 4*NBYTES
345 #ifdef CONFIG_CPU_SB1
346 nop # improves slotting
348 EXC( STORE t0, UNIT(0)(dst), s_exc_p4u)
349 EXC( STORE t1, UNIT(1)(dst), s_exc_p3u)
350 EXC( STORE t2, UNIT(2)(dst), s_exc_p2u)
351 EXC( STORE t3, UNIT(3)(dst), s_exc_p1u)
352 PREF( 1, 9*32(dst) ) # 1 is PREF_STORE (not streamed)
354 ADD dst, dst, 4*NBYTES
356 cleanup_src_unaligned:
358 and rem, len, NBYTES-1 # rem = len % NBYTES
359 beq rem, len, copy_bytes
362 EXC( LDFIRST t0, FIRST(0)(src), l_exc)
363 EXC( LDREST t0, REST(0)(src), l_exc_copy)
366 EXC( STORE t0, 0(dst), s_exc_p1u)
374 /* 0 < len < NBYTES */
375 #define COPY_BYTE(N) \
376 EXC( lb t0, N(src), l_exc); \
379 EXC( sb t0, N(dst), s_exc_p1)
389 EXC( lb t0, NBYTES-2(src), l_exc)
392 EXC( sb t0, NBYTES-2(dst), s_exc_p1)
400 * Copy bytes from src until faulting load address (or until a
403 * When reached by a faulting LDFIRST/LDREST, THREAD_BUADDR($28)
404 * may be more than a byte beyond the last address.
405 * Hence, the lb below may get an exception.
407 * Assumes src < THREAD_BUADDR($28)
409 LOAD t0, TI_TASK($28)
411 LOAD t0, THREAD_BUADDR(t0)
413 EXC( lb t1, 0(src), l_exc)
415 sb t1, 0(dst) # can't fault -- we're copy_from_user
419 LOAD t0, TI_TASK($28)
421 LOAD t0, THREAD_BUADDR(t0) # t0 is just past last good address
423 SUB len, AT, t0 # len number of uncopied bytes
425 * Here's where we rely on src and dst being incremented in tandem,
427 * dst += (fault addr - src) to put dst at first byte to clear
429 ADD dst, t0 # compute start address in a1
432 * Clear len bytes starting at dst. Can't call __bzero because it
433 * might modify len. An inefficient loop for these rare times...
448 ADD len, len, n*NBYTES
470 sltu t0, a1, t0 # dst + len <= src -> memcpy
471 sltu t1, a0, t1 # dst >= src + len -> memcpy
474 move v0, a0 /* return value */
478 /* fall through to __rmemcpy */
479 LEAF(__rmemcpy) /* a0=dst a1=src a2=len */
481 beqz t0, r_end_bytes_up # src >= dst
483 ADD a0, a2 # dst = dst + len
484 ADD a1, a2 # src = src + len
503 bnez a2, r_end_bytes_up