Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6] / arch / powerpc / boot / dts / mpc8313erdb.dts
1 /*
2  * MPC8313E RDB Device Tree Source
3  *
4  * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8313ERDB";
16         compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 serial0 = &serial0;
24                 serial1 = &serial1;
25                 pci0 = &pci0;
26         };
27
28         cpus {
29                 #address-cells = <1>;
30                 #size-cells = <0>;
31
32                 PowerPC,8313@0 {
33                         device_type = "cpu";
34                         reg = <0x0>;
35                         d-cache-line-size = <32>;
36                         i-cache-line-size = <32>;
37                         d-cache-size = <16384>;
38                         i-cache-size = <16384>;
39                         timebase-frequency = <0>;       // from bootloader
40                         bus-frequency = <0>;            // from bootloader
41                         clock-frequency = <0>;          // from bootloader
42                 };
43         };
44
45         memory {
46                 device_type = "memory";
47                 reg = <0x00000000 0x08000000>;  // 128MB at 0
48         };
49
50         localbus@e0005000 {
51                 #address-cells = <2>;
52                 #size-cells = <1>;
53                 compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
54                 reg = <0xe0005000 0x1000>;
55                 interrupts = <77 0x8>;
56                 interrupt-parent = <&ipic>;
57
58                 // CS0 and CS1 are swapped when
59                 // booting from nand, but the
60                 // addresses are the same.
61                 ranges = <0x0 0x0 0xfe000000 0x00800000
62                           0x1 0x0 0xe2800000 0x00008000
63                           0x2 0x0 0xf0000000 0x00020000
64                           0x3 0x0 0xfa000000 0x00008000>;
65
66                 flash@0,0 {
67                         #address-cells = <1>;
68                         #size-cells = <1>;
69                         compatible = "cfi-flash";
70                         reg = <0x0 0x0 0x800000>;
71                         bank-width = <2>;
72                         device-width = <1>;
73                 };
74
75                 nand@1,0 {
76                         #address-cells = <1>;
77                         #size-cells = <1>;
78                         compatible = "fsl,mpc8313-fcm-nand",
79                                      "fsl,elbc-fcm-nand";
80                         reg = <0x1 0x0 0x2000>;
81
82                         u-boot@0 {
83                                 reg = <0x0 0x100000>;
84                                 read-only;
85                         };
86
87                         kernel@100000 {
88                                 reg = <0x100000 0x300000>;
89                         };
90
91                         fs@400000 {
92                                 reg = <0x400000 0x1c00000>;
93                         };
94                 };
95         };
96
97         soc8313@e0000000 {
98                 #address-cells = <1>;
99                 #size-cells = <1>;
100                 device_type = "soc";
101                 compatible = "simple-bus";
102                 ranges = <0x0 0xe0000000 0x00100000>;
103                 reg = <0xe0000000 0x00000200>;
104                 bus-frequency = <0>;
105
106                 wdt@200 {
107                         device_type = "watchdog";
108                         compatible = "mpc83xx_wdt";
109                         reg = <0x200 0x100>;
110                 };
111
112                 sleep-nexus {
113                         #address-cells = <1>;
114                         #size-cells = <1>;
115                         compatible = "simple-bus";
116                         sleep = <&pmc 0x03000000>;
117                         ranges;
118
119                         i2c@3000 {
120                                 #address-cells = <1>;
121                                 #size-cells = <0>;
122                                 cell-index = <0>;
123                                 compatible = "fsl-i2c";
124                                 reg = <0x3000 0x100>;
125                                 interrupts = <14 0x8>;
126                                 interrupt-parent = <&ipic>;
127                                 dfsrr;
128                                 rtc@68 {
129                                         compatible = "dallas,ds1339";
130                                         reg = <0x68>;
131                                 };
132                         };
133
134                         crypto@30000 {
135                                 compatible = "fsl,sec2.2", "fsl,sec2.1",
136                                              "fsl,sec2.0";
137                                 reg = <0x30000 0x10000>;
138                                 interrupts = <11 0x8>;
139                                 interrupt-parent = <&ipic>;
140                                 fsl,num-channels = <1>;
141                                 fsl,channel-fifo-len = <24>;
142                                 fsl,exec-units-mask = <0x4c>;
143                                 fsl,descriptor-types-mask = <0x0122003f>;
144                         };
145                 };
146
147                 i2c@3100 {
148                         #address-cells = <1>;
149                         #size-cells = <0>;
150                         cell-index = <1>;
151                         compatible = "fsl-i2c";
152                         reg = <0x3100 0x100>;
153                         interrupts = <15 0x8>;
154                         interrupt-parent = <&ipic>;
155                         dfsrr;
156                 };
157
158                 spi@7000 {
159                         cell-index = <0>;
160                         compatible = "fsl,spi";
161                         reg = <0x7000 0x1000>;
162                         interrupts = <16 0x8>;
163                         interrupt-parent = <&ipic>;
164                         mode = "cpu";
165                 };
166
167                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
168                 usb@23000 {
169                         compatible = "fsl-usb2-dr";
170                         reg = <0x23000 0x1000>;
171                         #address-cells = <1>;
172                         #size-cells = <0>;
173                         interrupt-parent = <&ipic>;
174                         interrupts = <38 0x8>;
175                         phy_type = "utmi_wide";
176                         sleep = <&pmc 0x00300000>;
177                 };
178
179                 enet0: ethernet@24000 {
180                         #address-cells = <1>;
181                         #size-cells = <1>;
182                         sleep = <&pmc 0x20000000>;
183                         ranges = <0x0 0x24000 0x1000>;
184
185                         cell-index = <0>;
186                         device_type = "network";
187                         model = "eTSEC";
188                         compatible = "gianfar";
189                         reg = <0x24000 0x1000>;
190                         local-mac-address = [ 00 00 00 00 00 00 ];
191                         interrupts = <37 0x8 36 0x8 35 0x8>;
192                         interrupt-parent = <&ipic>;
193                         tbi-handle = < &tbi0 >;
194                         /* Vitesse 7385 isn't on the MDIO bus */
195                         fixed-link = <1 1 1000 0 0>;
196                         fsl,magic-packet;
197
198                         mdio@520 {
199                                 #address-cells = <1>;
200                                 #size-cells = <0>;
201                                 compatible = "fsl,gianfar-mdio";
202                                 reg = <0x520 0x20>;
203                                 phy4: ethernet-phy@4 {
204                                         interrupt-parent = <&ipic>;
205                                         interrupts = <20 0x8>;
206                                         reg = <0x4>;
207                                         device_type = "ethernet-phy";
208                                 };
209                                 tbi0: tbi-phy@11 {
210                                         reg = <0x11>;
211                                         device_type = "tbi-phy";
212                                 };
213                         };
214                 };
215
216                 enet1: ethernet@25000 {
217                         #address-cells = <1>;
218                         #size-cells = <1>;
219                         cell-index = <1>;
220                         device_type = "network";
221                         model = "eTSEC";
222                         compatible = "gianfar";
223                         reg = <0x25000 0x1000>;
224                         ranges = <0x0 0x25000 0x1000>;
225                         local-mac-address = [ 00 00 00 00 00 00 ];
226                         interrupts = <34 0x8 33 0x8 32 0x8>;
227                         interrupt-parent = <&ipic>;
228                         tbi-handle = < &tbi1 >;
229                         phy-handle = < &phy4 >;
230                         sleep = <&pmc 0x10000000>;
231                         fsl,magic-packet;
232
233                         mdio@520 {
234                                 #address-cells = <1>;
235                                 #size-cells = <0>;
236                                 compatible = "fsl,gianfar-tbi";
237                                 reg = <0x520 0x20>;
238
239                                 tbi1: tbi-phy@11 {
240                                         reg = <0x11>;
241                                         device_type = "tbi-phy";
242                                 };
243                         };
244
245
246                 };
247
248                 serial0: serial@4500 {
249                         cell-index = <0>;
250                         device_type = "serial";
251                         compatible = "ns16550";
252                         reg = <0x4500 0x100>;
253                         clock-frequency = <0>;
254                         interrupts = <9 0x8>;
255                         interrupt-parent = <&ipic>;
256                 };
257
258                 serial1: serial@4600 {
259                         cell-index = <1>;
260                         device_type = "serial";
261                         compatible = "ns16550";
262                         reg = <0x4600 0x100>;
263                         clock-frequency = <0>;
264                         interrupts = <10 0x8>;
265                         interrupt-parent = <&ipic>;
266                 };
267
268                 /* IPIC
269                  * interrupts cell = <intr #, sense>
270                  * sense values match linux IORESOURCE_IRQ_* defines:
271                  * sense == 8: Level, low assertion
272                  * sense == 2: Edge, high-to-low change
273                  */
274                 ipic: pic@700 {
275                         interrupt-controller;
276                         #address-cells = <0>;
277                         #interrupt-cells = <2>;
278                         reg = <0x700 0x100>;
279                         device_type = "ipic";
280                 };
281
282                 pmc: power@b00 {
283                         compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
284                         reg = <0xb00 0x100 0xa00 0x100>;
285                         interrupts = <80 8>;
286                         interrupt-parent = <&ipic>;
287                         fsl,mpc8313-wakeup-timer = <&gtm1>;
288
289                         /* Remove this (or change to "okay") if you have
290                          * a REVA3 or later board, if you apply one of the
291                          * workarounds listed in section 8.5 of the board
292                          * manual, or if you are adapting this device tree
293                          * to a different board.
294                          */
295                         status = "fail";
296                 };
297
298                 gtm1: timer@500 {
299                         compatible = "fsl,mpc8313-gtm", "fsl,gtm";
300                         reg = <0x500 0x100>;
301                         interrupts = <90 8 78 8 84 8 72 8>;
302                         interrupt-parent = <&ipic>;
303                 };
304
305                 timer@600 {
306                         compatible = "fsl,mpc8313-gtm", "fsl,gtm";
307                         reg = <0x600 0x100>;
308                         interrupts = <91 8 79 8 85 8 73 8>;
309                         interrupt-parent = <&ipic>;
310                 };
311         };
312
313         sleep-nexus {
314                 #address-cells = <1>;
315                 #size-cells = <1>;
316                 compatible = "simple-bus";
317                 sleep = <&pmc 0x00010000>;
318                 ranges;
319
320                 pci0: pci@e0008500 {
321                         cell-index = <1>;
322                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
323                         interrupt-map = <
324                                         /* IDSEL 0x0E -mini PCI */
325                                          0x7000 0x0 0x0 0x1 &ipic 18 0x8
326                                          0x7000 0x0 0x0 0x2 &ipic 18 0x8
327                                          0x7000 0x0 0x0 0x3 &ipic 18 0x8
328                                          0x7000 0x0 0x0 0x4 &ipic 18 0x8
329
330                                         /* IDSEL 0x0F - PCI slot */
331                                          0x7800 0x0 0x0 0x1 &ipic 17 0x8
332                                          0x7800 0x0 0x0 0x2 &ipic 18 0x8
333                                          0x7800 0x0 0x0 0x3 &ipic 17 0x8
334                                          0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
335                         interrupt-parent = <&ipic>;
336                         interrupts = <66 0x8>;
337                         bus-range = <0x0 0x0>;
338                         ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
339                                   0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
340                                   0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
341                         clock-frequency = <66666666>;
342                         #interrupt-cells = <1>;
343                         #size-cells = <2>;
344                         #address-cells = <3>;
345                         reg = <0xe0008500 0x100         /* internal registers */
346                                0xe0008300 0x8>;         /* config space access registers */
347                         compatible = "fsl,mpc8349-pci";
348                         device_type = "pci";
349                 };
350
351                 dma@82a8 {
352                         #address-cells = <1>;
353                         #size-cells = <1>;
354                         compatible = "fsl,mpc8313-dma", "fsl,elo-dma";
355                         reg = <0xe00082a8 4>;
356                         ranges = <0 0xe0008100 0x1a8>;
357                         interrupt-parent = <&ipic>;
358                         interrupts = <71 8>;
359
360                         dma-channel@0 {
361                                 compatible = "fsl,mpc8313-dma-channel",
362                                              "fsl,elo-dma-channel";
363                                 reg = <0 0x28>;
364                                 interrupt-parent = <&ipic>;
365                                 interrupts = <71 8>;
366                                 cell-index = <0>;
367                         };
368
369                         dma-channel@80 {
370                                 compatible = "fsl,mpc8313-dma-channel",
371                                              "fsl,elo-dma-channel";
372                                 reg = <0x80 0x28>;
373                                 interrupt-parent = <&ipic>;
374                                 interrupts = <71 8>;
375                                 cell-index = <1>;
376                         };
377
378                         dma-channel@100 {
379                                 compatible = "fsl,mpc8313-dma-channel",
380                                              "fsl,elo-dma-channel";
381                                 reg = <0x100 0x28>;
382                                 interrupt-parent = <&ipic>;
383                                 interrupts = <71 8>;
384                                 cell-index = <2>;
385                         };
386
387                         dma-channel@180 {
388                                 compatible = "fsl,mpc8313-dma-channel",
389                                              "fsl,elo-dma-channel";
390                                 reg = <0x180 0x28>;
391                                 interrupt-parent = <&ipic>;
392                                 interrupts = <71 8>;
393                                 cell-index = <3>;
394                         };
395                 };
396         };
397 };