2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
28 #include "rt_config.h"
31 UCHAR TemplateFrame[24] = {0x08/* Data type */,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0xAA,0xBB,0x12,0x34,0x56,0x00,0x11,0x22,0xAA,0xBB,0xCC,0x00,0x00}; // 802.11 MAC Header, Type:Data, Length:24bytes
32 extern RTMP_RF_REGS RF2850RegTable[];
33 extern UCHAR NUM_OF_2850_CHNL;
35 static CHAR CCKRateTable[] = {0, 1, 2, 3, 8, 9, 10, 11, -1}; /* CCK Mode. */
36 static CHAR OFDMRateTable[] = {0, 1, 2, 3, 4, 5, 6, 7, -1}; /* OFDM Mode. */
37 static CHAR HTMIXRateTable[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}; /* HT Mix Mode. */
40 IN PRTMP_ADAPTER pAd);
43 IN PRTMP_ADAPTER pAd);
45 static VOID RtmpDmaEnable(
49 static VOID BbpSoftReset(
50 IN PRTMP_ADAPTER pAd);
52 static VOID RtmpRfIoWrite(
53 IN PRTMP_ADAPTER pAd);
55 static INT ATESetUpFrame(
59 static INT ATETxPwrHandler(
63 static INT ATECmdHandler(
67 static int CheckMCSValid(
71 static VOID ATEWriteTxWI(
73 IN PTXWI_STRUC pOutTxWI,
76 IN BOOLEAN InsTimestamp,
79 IN BOOLEAN NSeq, // HW new a sequence.
88 IN HTTRANSMIT_SETTING *pTransmit);
91 static VOID SetJapanFilter(
92 IN PRTMP_ADAPTER pAd);
94 /*=========================end of prototype=========================*/
100 WPDMA_GLO_CFG_STRUC GloCfg;
102 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word); // disable DMA
103 if (GloCfg.field.TxDMABusy)
111 static INT RxDmaBusy(
112 IN PRTMP_ADAPTER pAd)
115 WPDMA_GLO_CFG_STRUC GloCfg;
117 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word); // disable DMA
118 if (GloCfg.field.RxDMABusy)
126 static VOID RtmpDmaEnable(
127 IN PRTMP_ADAPTER pAd,
132 WPDMA_GLO_CFG_STRUC GloCfg;
134 value = Enable > 0 ? 1 : 0;
136 // check DMA is in busy mode.
138 while (TxDmaBusy(pAd) || RxDmaBusy(pAd))
145 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word); // disable DMA
146 GloCfg.field.EnableTxDMA = value;
147 GloCfg.field.EnableRxDMA = value;
148 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word); // abort all TX rings
155 static VOID BbpSoftReset(
156 IN PRTMP_ADAPTER pAd)
160 // Soft reset, set BBP R21 bit0=1->0
161 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R21, &BbpData);
162 BbpData |= 0x00000001; //set bit0=1
163 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R21, BbpData);
165 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R21, &BbpData);
166 BbpData &= ~(0x00000001); //set bit0=0
167 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R21, BbpData);
172 static VOID RtmpRfIoWrite(
173 IN PRTMP_ADAPTER pAd)
175 // Set RF value 1's set R3[bit2] = [0]
176 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
177 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
178 RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
179 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
183 // Set RF value 2's set R3[bit2] = [1]
184 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
185 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
186 RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 | 0x04));
187 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
191 // Set RF value 3's set R3[bit2] = [0]
192 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
193 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
194 RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
195 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
200 static int CheckMCSValid(
210 pRateTab = CCKRateTable;
213 pRateTab = OFDMRateTable;
217 pRateTab = HTMIXRateTable;
220 ATEDBGPRINT(RT_DEBUG_ERROR, ("unrecognizable Tx Mode %d\n", Mode));
226 while(pRateTab[i] != -1)
228 if (pRateTab[i] == Mcs)
237 static INT ATETxPwrHandler(
238 IN PRTMP_ADAPTER pAd,
244 BOOLEAN bPowerReduce = FALSE;
246 #ifdef RALINK_28xx_QA
247 if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
249 /* When QA is used for Tx, pAd->ate.TxPower0/1 and real tx power
250 ** are not synchronized.
253 pAd->ate.TxPower0 = pAd->LatchRfRegs.xxx;
254 pAd->ate.TxPower1 = pAd->LatchRfRegs.xxx;
259 #endif // RALINK_28xx_QA //
261 TxPower = index == 0 ? pAd->ate.TxPower0 : pAd->ate.TxPower1;
263 if (pAd->ate.Channel <= 14)
268 // R3, R4 can't large than 31 (0x24), 31 ~ 36 used by BBP 94
272 Bbp94 = BBPR94_DEFAULT + (UCHAR)(TxPower - 31);
274 else if (TxPower < 0)
277 // R3, R4 can't less than 0, -1 ~ -6 used by BBP 94
281 Bbp94 = BBPR94_DEFAULT + TxPower;
287 Bbp94 = BBPR94_DEFAULT;
290 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R=%ld, BBP_R94=%d)\n", __func__, TxPower, R, Bbp94));
297 // R3, R4 can't large than 15 (0x0F)
301 else if (TxPower < 0)
304 // R3, R4 can't less than 0
307 ASSERT((TxPower >= -7));
308 R = (ULONG)(TxPower + 7);
317 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R=%lu)\n", __func__, TxPower, R));
320 if (pAd->ate.Channel <= 14)
324 R = R << 9; // shift TX power control to correct RF(R3) register bit position
325 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
326 pAd->LatchRfRegs.R3 = R;
330 R = R << 6; // shift TX power control to correct RF(R4) register bit position
331 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
332 pAd->LatchRfRegs.R4 = R;
337 if (bPowerReduce == FALSE)
341 R = (R << 10) | (1 << 9); // shift TX power control to correct RF(R3) register bit position
342 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
343 pAd->LatchRfRegs.R3 = R;
347 R = (R << 7) | (1 << 6); // shift TX power control to correct RF(R4) register bit position
348 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
349 pAd->LatchRfRegs.R4 = R;
356 R = (R << 10); // shift TX power control to correct RF(R3) register bit position
357 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
359 /* Clear bit 9 of R3 to reduce 7dB. */
360 pAd->LatchRfRegs.R3 = (R & (~(1 << 9)));
364 R = (R << 7); // shift TX power control to correct RF(R4) register bit position
365 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
367 /* Clear bit 6 of R4 to reduce 7dB. */
368 pAd->LatchRfRegs.R4 = (R & (~(1 << 6)));
379 static INT ATETxPwrHandler(
380 IN PRTMP_ADAPTER pAd,
387 #ifdef RALINK_28xx_QA
388 if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
390 // TODO: how to get current TxPower0/1 from pAd->LatchRfRegs ?
391 /* When QA is used for Tx, pAd->ate.TxPower0/1 and real tx power
392 ** are not synchronized.
395 pAd->ate.TxPower0 = pAd->LatchRfRegs.xxx;
396 pAd->ate.TxPower1 = pAd->LatchRfRegs.xxx;
401 #endif // RALINK_28xx_QA //
403 TxPower = index == 0 ? pAd->ate.TxPower0 : pAd->ate.TxPower1;
408 // R3, R4 can't large than 36 (0x24), 31 ~ 36 used by BBP 94
412 Bbp94 = BBPR94_DEFAULT + (UCHAR)(TxPower - 31);
414 else if (TxPower < 0)
417 // R3, R4 can't less than 0, -1 ~ -6 used by BBP 94
421 Bbp94 = BBPR94_DEFAULT + TxPower;
427 Bbp94 = BBPR94_DEFAULT;
430 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R3=%ld, BBP_R94=%d)\n", __func__, TxPower, R, Bbp94));
432 if (pAd->ate.Channel <= 14)
436 R = R << 9; // shift TX power control to correct RF(R3) register bit position
437 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
438 pAd->LatchRfRegs.R3 = R;
442 R = R << 6; // shift TX power control to correct RF(R4) register bit position
443 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
444 pAd->LatchRfRegs.R4 = R;
451 R = (R << 10) | (1 << 9); // shift TX power control to correct RF(R3) register bit position
452 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
453 pAd->LatchRfRegs.R3 = R;
457 R = (R << 7) | (1 << 6); // shift TX power control to correct RF(R4) register bit position
458 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
459 pAd->LatchRfRegs.R4 = R;
470 ==========================================================================
472 Set ATE operation mode to
473 0. ATESTART = Start ATE Mode
474 1. ATESTOP = Stop ATE Mode
475 2. TXCONT = Continuous Transmit
476 3. TXCARR = Transmit Carrier
477 4. TXFRAME = Transmit Frames
478 5. RXFRAME = Receive Frames
479 #ifdef RALINK_28xx_QA
480 6. TXSTOP = Stop Any Type of Transmition
481 7. RXSTOP = Stop Receiving Frames
482 #endif // RALINK_28xx_QA //
484 TRUE if all parameters are OK, FALSE otherwise
485 ==========================================================================
487 static INT ATECmdHandler(
488 IN PRTMP_ADAPTER pAd,
498 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
500 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
506 ATEDBGPRINT(RT_DEBUG_TRACE, ("===> ATECmdHandler()\n"));
508 ATEAsicSwitchChannel(pAd);
509 AsicLockChannel(pAd, pAd->ate.Channel);
513 // read MAC_SYS_CTRL and backup MAC_SYS_CTRL value.
514 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
516 // Default value in BBP R22 is 0x0.
519 // clean bit4 to stop continuous Tx production test.
520 MacData &= 0xFFFFFFEF;
522 if (!strcmp(arg, "ATESTART")) //Enter ATE mode and set Tx/Rx Idle
524 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: ATESTART\n"));
527 // check if we have removed the firmware
530 NICEraseFirmware(pAd);
533 atemode = pAd->ate.Mode;
534 pAd->ate.Mode = ATE_START;
535 // pAd->ate.TxDoneCount = pAd->ate.TxCount;
536 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
538 if (atemode & ATE_TXCARR)
540 // No Carrier Test set BBP R22 bit7=0, bit6=0, bit[5~0]=0x0
541 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
542 BbpData &= 0xFFFFFF00; //clear bit7, bit6, bit[5~0]
543 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
545 else if (atemode & ATE_TXCARRSUPP)
547 // No Cont. TX set BBP R22 bit7=0
548 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
549 BbpData &= ~(1 << 7); //set bit7=0
550 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
552 // No Carrier Suppression set BBP R24 bit0=0
553 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
554 BbpData &= 0xFFFFFFFE; //clear bit0
555 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
557 // We should free some resource which was allocated when ATE_TXFRAME , ATE_STOP, and ATE_TXCONT.
558 else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
560 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
562 if (atemode & ATE_TXCONT)
564 // No Cont. TX set BBP R22 bit7=0
565 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
566 BbpData &= ~(1 << 7); //set bit7=0
567 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
570 RtmpDmaEnable(pAd, 0);
571 for (i=0; i<TX_RING_SIZE; i++)
573 PNDIS_PACKET pPacket;
575 #ifndef RT_BIG_ENDIAN
576 pTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
578 pDestTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
581 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
584 pPacket = pTxRing->Cell[i].pNdisPacket;
587 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
588 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
590 //Always assign pNdisPacket as NULL after clear
591 pTxRing->Cell[i].pNdisPacket = NULL;
593 pPacket = pTxRing->Cell[i].pNextNdisPacket;
596 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
597 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
599 //Always assign pNextNdisPacket as NULL after clear
600 pTxRing->Cell[i].pNextNdisPacket = NULL;
602 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
603 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
607 RtmpDmaEnable(pAd, 1);
609 // reset Rx statistics.
610 pAd->ate.LastSNR0 = 0;
611 pAd->ate.LastSNR1 = 0;
612 pAd->ate.LastRssi0 = 0;
613 pAd->ate.LastRssi1 = 0;
614 pAd->ate.LastRssi2 = 0;
615 pAd->ate.AvgRssi0 = 0;
616 pAd->ate.AvgRssi1 = 0;
617 pAd->ate.AvgRssi2 = 0;
618 pAd->ate.AvgRssi0X8 = 0;
619 pAd->ate.AvgRssi1X8 = 0;
620 pAd->ate.AvgRssi2X8 = 0;
621 pAd->ate.NumOfAvgRssiSample = 0;
623 #ifdef RALINK_28xx_QA
625 pAd->ate.bQATxStart = FALSE;
626 pAd->ate.bQARxStart = FALSE;
631 pAd->ate.OtherData = 0;
633 pAd->ate.OtherCount = 0;
647 pAd->ate.TxDoneCount = 0;
648 pAd->ate.TxStatus = 0; // task Tx status // 0 --> task is idle, 1 --> task is running
649 #endif // RALINK_28xx_QA //
655 #ifdef CONFIG_STA_SUPPORT
657 // LinkDown() has "AsicDisableSync();" and "RTMP_BBP_IO_R/W8_BY_REG_ID();" inside.
659 // LinkDown(pAd, FALSE);
660 // AsicEnableBssSync(pAd);
662 netif_stop_queue(pAd->net_dev);
665 // If we skip "LinkDown()", we should disable protection
666 // to prevent from sending out RTS or CTS-to-self.
668 ATEDisableAsicProtect(pAd);
669 RTMPStationStop(pAd);
670 #endif // CONFIG_STA_SUPPORT //
673 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
675 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
678 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
680 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
682 else if (!strcmp(arg, "ATESTOP"))
684 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: ATESTOP\n"));
686 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
687 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData); // recover the MAC_SYS_CTRL register back.
690 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
691 Value &= (0xfffffff3);
692 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
695 RtmpDmaEnable(pAd, 0);
698 pAd->ate.bFWLoading = TRUE;
699 Status = NICLoadFirmware(pAd);
700 if (Status != NDIS_STATUS_SUCCESS)
702 ATEDBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
706 pAd->ate.Mode = ATE_STOP;
709 #ifdef CONFIG_STA_SUPPORT
711 // Even the firmware has been loaded,
712 // we still could use ATE_BBP_IO_READ8_BY_REG_ID().
713 // But this is not suggested.
716 #endif // CONFIG_STA_SUPPORT //
718 NICDisableInterrupt(pAd);
720 NICInitializeAdapter(pAd, TRUE);
723 // Reinitialize Rx Ring before Rx DMA is enabled.
724 // The nightmare of >>>RxCoherent<<< was gone !
725 for (index = 0; index < RX_RING_SIZE; index++)
727 pRxD = (PRXD_STRUC) pAd->RxRing.Cell[index].AllocVa;
731 // We should read EEPROM for all cases.
732 NICReadEEPROMParameters(pAd, NULL);
733 NICInitAsicFromEEPROM(pAd);
735 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
736 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
743 // These steps are only for APAutoSelectChannel().
746 //pAd->bStaFifoTest = TRUE;
747 pAd->int_enable_reg = ((DELAYINTMASK) | (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03);
748 pAd->int_disable_mask = 0;
749 pAd->int_pending = 0;
751 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff); // clear garbage interrupts
752 NICEnableInterrupt(pAd);
755 /*=========================================================================*/
756 /* restore RX_FILTR_CFG */
757 #ifdef CONFIG_STA_SUPPORT
758 /* restore RX_FILTR_CFG due to that QA maybe set it to 0x3 */
759 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);
760 #endif // CONFIG_STA_SUPPORT //
761 /*=========================================================================*/
764 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
766 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
768 // Enable Tx, Rx DMA.
769 RtmpDmaEnable(pAd, 1);
772 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
774 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
777 #ifdef CONFIG_STA_SUPPORT
778 RTMPStationStart(pAd);
779 #endif // CONFIG_STA_SUPPORT //
781 netif_start_queue(pAd->net_dev);
784 else if (!strcmp(arg, "TXCARR")) // Tx Carrier
786 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXCARR\n"));
787 pAd->ate.Mode |= ATE_TXCARR;
789 // QA has done the following steps if it is used.
790 if (pAd->ate.bQATxStart == FALSE)
795 // Carrier Test set BBP R22 bit7=1, bit6=1, bit[5~0]=0x01
796 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
797 BbpData &= 0xFFFFFF00; //clear bit7, bit6, bit[5~0]
798 BbpData |= 0x000000C1; //set bit7=1, bit6=1, bit[5~0]=0x01
799 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
801 // set MAC_SYS_CTRL(0x1004) Continuous Tx Production Test (bit4) = 1
802 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
803 Value = Value | 0x00000010;
804 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
807 else if (!strcmp(arg, "TXCONT")) // Tx Continue
809 if (pAd->ate.bQATxStart == TRUE)
811 /* set MAC_SYS_CTRL(0x1004) bit4(Continuous Tx Production Test)
812 and bit2(MAC TX enable) back to zero. */
813 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
814 MacData &= 0xFFFFFFEB;
815 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
817 // set BBP R22 bit7=0
818 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
819 BbpData &= 0xFFFFFF7F; //set bit7=0
820 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
824 ** Step 1: Send 50 packets first then wait for a moment.
825 ** Step 2: Send more 50 packet then start continue mode.
827 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXCONT\n"));
828 // Step 1: send 50 packets first.
829 pAd->ate.Mode |= ATE_TXCONT;
830 pAd->ate.TxCount = 50;
831 /* Do it after Tx/Rx DMA is aborted. */
832 // pAd->ate.TxDoneCount = 0;
838 RtmpDmaEnable(pAd, 0);
840 // Fix can't smooth kick
842 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * 0x10, &pTxRing->TxDmaIdx);
843 pTxRing->TxSwFreeIdx = pTxRing->TxDmaIdx;
844 pTxRing->TxCpuIdx = pTxRing->TxDmaIdx;
845 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * 0x10, pTxRing->TxCpuIdx);
848 pAd->ate.TxDoneCount = 0;
850 /* Only needed if we have to send some normal frames. */
853 for (i = 0; (i < TX_RING_SIZE-1) && (i < pAd->ate.TxCount); i++)
855 PNDIS_PACKET pPacket;
856 UINT32 TxIdx = pTxRing->TxCpuIdx;
858 #ifndef RT_BIG_ENDIAN
859 pTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
861 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
864 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
866 // Clean current cell.
867 pPacket = pTxRing->Cell[TxIdx].pNdisPacket;
870 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
871 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
873 //Always assign pNdisPacket as NULL after clear
874 pTxRing->Cell[TxIdx].pNdisPacket = NULL;
876 pPacket = pTxRing->Cell[TxIdx].pNextNdisPacket;
879 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
880 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
882 //Always assign pNextNdisPacket as NULL after clear
883 pTxRing->Cell[TxIdx].pNextNdisPacket = NULL;
886 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
887 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
890 if (ATESetUpFrame(pAd, TxIdx) != 0)
893 INC_RING_INDEX(pTxRing->TxCpuIdx, TX_RING_SIZE);
896 // Setup frame format.
897 ATESetUpFrame(pAd, pTxRing->TxCpuIdx);
900 RtmpDmaEnable(pAd, 1);
903 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
905 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
908 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
910 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
912 #ifdef RALINK_28xx_QA
913 if (pAd->ate.bQATxStart == TRUE)
915 pAd->ate.TxStatus = 1;
916 //pAd->ate.Repeat = 0;
918 #endif // RALINK_28xx_QA //
921 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * RINGREG_DIFF, pAd->TxRing[QID_AC_BE].TxCpuIdx);
926 // Step 2: send more 50 packets then start continue mode.
928 RtmpDmaEnable(pAd, 0);
930 // Cont. TX set BBP R22 bit7=1
931 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
932 BbpData |= 0x00000080; //set bit7=1
933 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
935 pAd->ate.TxCount = 50;
937 // Fix can't smooth kick
939 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * 0x10, &pTxRing->TxDmaIdx);
940 pTxRing->TxSwFreeIdx = pTxRing->TxDmaIdx;
941 pTxRing->TxCpuIdx = pTxRing->TxDmaIdx;
942 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * 0x10, pTxRing->TxCpuIdx);
945 pAd->ate.TxDoneCount = 0;
949 for (i = 0; (i < TX_RING_SIZE-1) && (i < pAd->ate.TxCount); i++)
951 PNDIS_PACKET pPacket;
952 UINT32 TxIdx = pTxRing->TxCpuIdx;
954 #ifndef RT_BIG_ENDIAN
955 pTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
957 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
960 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
962 // clean current cell.
963 pPacket = pTxRing->Cell[TxIdx].pNdisPacket;
966 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
967 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
969 //Always assign pNdisPacket as NULL after clear
970 pTxRing->Cell[TxIdx].pNdisPacket = NULL;
972 pPacket = pTxRing->Cell[TxIdx].pNextNdisPacket;
975 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
976 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
978 //Always assign pNextNdisPacket as NULL after clear
979 pTxRing->Cell[TxIdx].pNextNdisPacket = NULL;
982 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
983 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
986 if (ATESetUpFrame(pAd, TxIdx) != 0)
989 INC_RING_INDEX(pTxRing->TxCpuIdx, TX_RING_SIZE);
992 ATESetUpFrame(pAd, pTxRing->TxCpuIdx);
995 RtmpDmaEnable(pAd, 1);
998 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1000 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1003 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1005 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1007 #ifdef RALINK_28xx_QA
1008 if (pAd->ate.bQATxStart == TRUE)
1010 pAd->ate.TxStatus = 1;
1011 //pAd->ate.Repeat = 0;
1013 #endif // RALINK_28xx_QA //
1016 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * RINGREG_DIFF, pAd->TxRing[QID_AC_BE].TxCpuIdx);
1020 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
1021 MacData |= 0x00000010;
1022 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
1024 else if (!strcmp(arg, "TXFRAME")) // Tx Frames
1026 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXFRAME(Count=%d)\n", pAd->ate.TxCount));
1027 pAd->ate.Mode |= ATE_TXFRAME;
1028 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1032 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
1034 // Abort Tx, RX DMA.
1035 RtmpDmaEnable(pAd, 0);
1037 // Fix can't smooth kick
1039 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * 0x10, &pTxRing->TxDmaIdx);
1040 pTxRing->TxSwFreeIdx = pTxRing->TxDmaIdx;
1041 pTxRing->TxCpuIdx = pTxRing->TxDmaIdx;
1042 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * 0x10, pTxRing->TxCpuIdx);
1045 pAd->ate.TxDoneCount = 0;
1047 SetJapanFilter(pAd);
1049 for (i = 0; (i < TX_RING_SIZE-1) && (i < pAd->ate.TxCount); i++)
1051 PNDIS_PACKET pPacket;
1052 UINT32 TxIdx = pTxRing->TxCpuIdx;
1054 #ifndef RT_BIG_ENDIAN
1055 pTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
1057 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
1060 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1062 // Clean current cell.
1063 pPacket = pTxRing->Cell[TxIdx].pNdisPacket;
1066 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
1067 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1069 //Always assign pNdisPacket as NULL after clear
1070 pTxRing->Cell[TxIdx].pNdisPacket = NULL;
1072 pPacket = pTxRing->Cell[TxIdx].pNextNdisPacket;
1075 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
1076 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1078 //Always assign pNextNdisPacket as NULL after clear
1079 pTxRing->Cell[TxIdx].pNextNdisPacket = NULL;
1081 #ifdef RT_BIG_ENDIAN
1082 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1083 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
1086 if (ATESetUpFrame(pAd, TxIdx) != 0)
1089 INC_RING_INDEX(pTxRing->TxCpuIdx, TX_RING_SIZE);
1093 ATESetUpFrame(pAd, pTxRing->TxCpuIdx);
1095 // Start Tx, Rx DMA.
1096 RtmpDmaEnable(pAd, 1);
1099 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1101 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1102 #ifdef RALINK_28xx_QA
1103 // add this for LoopBack mode
1104 if (pAd->ate.bQARxStart == FALSE)
1107 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1109 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1112 if (pAd->ate.bQATxStart == TRUE)
1114 pAd->ate.TxStatus = 1;
1115 //pAd->ate.Repeat = 0;
1119 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1121 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1122 #endif // RALINK_28xx_QA //
1124 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * RINGREG_DIFF, &pAd->TxRing[QID_AC_BE].TxDmaIdx);
1126 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * RINGREG_DIFF, pAd->TxRing[QID_AC_BE].TxCpuIdx);
1128 pAd->RalinkCounters.KickTxCount++;
1130 #ifdef RALINK_28xx_QA
1131 else if (!strcmp(arg, "TXSTOP"))
1133 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXSTOP\n"));
1134 atemode = pAd->ate.Mode;
1135 pAd->ate.Mode &= ATE_TXSTOP;
1136 pAd->ate.bQATxStart = FALSE;
1137 // pAd->ate.TxDoneCount = pAd->ate.TxCount;
1139 if (atemode & ATE_TXCARR)
1141 // No Carrier Test set BBP R22 bit7=0, bit6=0, bit[5~0]=0x0
1142 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
1143 BbpData &= 0xFFFFFF00; //clear bit7, bit6, bit[5~0]
1144 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1146 else if (atemode & ATE_TXCARRSUPP)
1148 // No Cont. TX set BBP R22 bit7=0
1149 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
1150 BbpData &= ~(1 << 7); //set bit7=0
1151 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1153 // No Carrier Suppression set BBP R24 bit0=0
1154 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
1155 BbpData &= 0xFFFFFFFE; //clear bit0
1156 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
1158 // We should free some resource which allocate when ATE_TXFRAME , ATE_STOP, and ATE_TXCONT.
1159 else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
1162 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
1164 if (atemode & ATE_TXCONT)
1166 // No Cont. TX set BBP R22 bit7=0
1167 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
1168 BbpData &= ~(1 << 7); //set bit7=0
1169 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1172 // Abort Tx, Rx DMA.
1173 RtmpDmaEnable(pAd, 0);
1174 for (i=0; i<TX_RING_SIZE; i++)
1176 PNDIS_PACKET pPacket;
1178 #ifndef RT_BIG_ENDIAN
1179 pTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
1181 pDestTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
1184 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1187 pPacket = pTxRing->Cell[i].pNdisPacket;
1190 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
1191 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1193 //Always assign pNdisPacket as NULL after clear
1194 pTxRing->Cell[i].pNdisPacket = NULL;
1196 pPacket = pTxRing->Cell[i].pNextNdisPacket;
1199 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
1200 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1202 //Always assign pNextNdisPacket as NULL after clear
1203 pTxRing->Cell[i].pNextNdisPacket = NULL;
1204 #ifdef RT_BIG_ENDIAN
1205 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1206 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
1209 // Enable Tx, Rx DMA
1210 RtmpDmaEnable(pAd, 1);
1215 // pAd->ate.TxDoneCount = 0;
1216 pAd->ate.TxStatus = 0; // task Tx status // 0 --> task is idle, 1 --> task is running
1222 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1224 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1226 else if (!strcmp(arg, "RXSTOP"))
1228 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: RXSTOP\n"));
1229 atemode = pAd->ate.Mode;
1230 pAd->ate.Mode &= ATE_RXSTOP;
1231 pAd->ate.bQARxStart = FALSE;
1232 // pAd->ate.TxDoneCount = pAd->ate.TxCount;
1234 if (atemode & ATE_TXCARR)
1238 else if (atemode & ATE_TXCARRSUPP)
1243 // We should free some resource which was allocated when ATE_TXFRAME , ATE_STOP, and ATE_TXCONT.
1244 else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
1246 if (atemode & ATE_TXCONT)
1253 // pAd->ate.TxDoneCount = 0;
1254 // pAd->ate.TxStatus = 0; // task Tx status // 0 --> task is idle, 1 --> task is running
1260 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1262 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1264 #endif // RALINK_28xx_QA //
1265 else if (!strcmp(arg, "RXFRAME")) // Rx Frames
1267 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: RXFRAME\n"));
1269 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1270 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
1272 pAd->ate.Mode |= ATE_RXFRAME;
1274 // Disable Tx of MAC block.
1275 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1277 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1279 // Enable Rx of MAC block.
1280 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1282 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1286 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: Invalid arg!\n"));
1289 RTMPusecDelay(5000);
1291 ATEDBGPRINT(RT_DEBUG_TRACE, ("<=== ATECmdHandler()\n"));
1297 /*=======================End of RT2860=======================*/
1300 /*======================Start of RT2870======================*/
1306 IN PRTMP_ADAPTER pAd,
1309 if (ATECmdHandler(pAd, arg))
1311 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_Proc Success\n"));
1318 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_Proc Failed\n"));
1324 ==========================================================================
1326 Set ATE ADDR1=DA for TxFrame(AP : To DS = 0 ; From DS = 1)
1328 Set ATE ADDR3=DA for TxFrame(STA : To DS = 1 ; From DS = 0)
1331 TRUE if all parameters are OK, FALSE otherwise
1332 ==========================================================================
1334 INT Set_ATE_DA_Proc(
1335 IN PRTMP_ADAPTER pAd,
1341 if(strlen(arg) != 17) //Mac address acceptable format 01:02:03:04:05:06 length 17
1344 for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":"))
1346 if((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))) )
1347 return FALSE; //Invalid
1350 #ifdef CONFIG_STA_SUPPORT
1351 AtoH(value, &pAd->ate.Addr3[i++], 1);
1352 #endif // CONFIG_STA_SUPPORT //
1356 return FALSE; //Invalid
1359 #ifdef CONFIG_STA_SUPPORT
1360 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_DA_Proc (DA = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAd->ate.Addr3[0],
1361 pAd->ate.Addr3[1], pAd->ate.Addr3[2], pAd->ate.Addr3[3], pAd->ate.Addr3[4], pAd->ate.Addr3[5]));
1362 #endif // CONFIG_STA_SUPPORT //
1364 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_DA_Proc Success\n"));
1370 ==========================================================================
1372 Set ATE ADDR3=SA for TxFrame(AP : To DS = 0 ; From DS = 1)
1374 Set ATE ADDR2=SA for TxFrame(STA : To DS = 1 ; From DS = 0)
1377 TRUE if all parameters are OK, FALSE otherwise
1378 ==========================================================================
1380 INT Set_ATE_SA_Proc(
1381 IN PRTMP_ADAPTER pAd,
1387 if(strlen(arg) != 17) //Mac address acceptable format 01:02:03:04:05:06 length 17
1390 for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":"))
1392 if((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))) )
1393 return FALSE; //Invalid
1396 #ifdef CONFIG_STA_SUPPORT
1397 AtoH(value, &pAd->ate.Addr2[i++], 1);
1398 #endif // CONFIG_STA_SUPPORT //
1402 return FALSE; //Invalid
1405 #ifdef CONFIG_STA_SUPPORT
1406 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_SA_Proc (SA = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAd->ate.Addr2[0],
1407 pAd->ate.Addr2[1], pAd->ate.Addr2[2], pAd->ate.Addr2[3], pAd->ate.Addr2[4], pAd->ate.Addr2[5]));
1408 #endif // CONFIG_STA_SUPPORT //
1410 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_SA_Proc Success\n"));
1416 ==========================================================================
1418 Set ATE ADDR2=BSSID for TxFrame(AP : To DS = 0 ; From DS = 1)
1420 Set ATE ADDR1=BSSID for TxFrame(STA : To DS = 1 ; From DS = 0)
1423 TRUE if all parameters are OK, FALSE otherwise
1424 ==========================================================================
1426 INT Set_ATE_BSSID_Proc(
1427 IN PRTMP_ADAPTER pAd,
1433 if(strlen(arg) != 17) //Mac address acceptable format 01:02:03:04:05:06 length 17
1436 for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":"))
1438 if((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))) )
1439 return FALSE; //Invalid
1442 #ifdef CONFIG_STA_SUPPORT
1443 AtoH(value, &pAd->ate.Addr1[i++], 1);
1444 #endif // CONFIG_STA_SUPPORT //
1448 return FALSE; //Invalid
1451 #ifdef CONFIG_STA_SUPPORT
1452 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_BSSID_Proc (BSSID = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAd->ate.Addr1[0],
1453 pAd->ate.Addr1[1], pAd->ate.Addr1[2], pAd->ate.Addr1[3], pAd->ate.Addr1[4], pAd->ate.Addr1[5]));
1454 #endif // CONFIG_STA_SUPPORT //
1456 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_BSSID_Proc Success\n"));
1462 ==========================================================================
1467 TRUE if all parameters are OK, FALSE otherwise
1468 ==========================================================================
1470 INT Set_ATE_CHANNEL_Proc(
1471 IN PRTMP_ADAPTER pAd,
1476 channel = simple_strtol(arg, 0, 10);
1478 if ((channel < 1) || (channel > 216))// to allow A band channel : ((channel < 1) || (channel > 14))
1480 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_CHANNEL_Proc::Out of range, it should be in range of 1~14.\n"));
1483 pAd->ate.Channel = channel;
1485 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_CHANNEL_Proc (ATE Channel = %d)\n", pAd->ate.Channel));
1486 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_CHANNEL_Proc Success\n"));
1493 ==========================================================================
1498 TRUE if all parameters are OK, FALSE otherwise
1499 ==========================================================================
1501 INT Set_ATE_TX_POWER0_Proc(
1502 IN PRTMP_ADAPTER pAd,
1507 TxPower = simple_strtol(arg, 0, 10);
1509 if (pAd->ate.Channel <= 14)
1511 if ((TxPower > 31) || (TxPower < 0))
1513 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER0_Proc::Out of range (Value=%d)\n", TxPower));
1519 if ((TxPower > 15) || (TxPower < -7))
1521 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER0_Proc::Out of range (Value=%d)\n", TxPower));
1526 pAd->ate.TxPower0 = TxPower;
1527 ATETxPwrHandler(pAd, 0);
1528 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_POWER0_Proc Success\n"));
1535 ==========================================================================
1540 TRUE if all parameters are OK, FALSE otherwise
1541 ==========================================================================
1543 INT Set_ATE_TX_POWER1_Proc(
1544 IN PRTMP_ADAPTER pAd,
1549 TxPower = simple_strtol(arg, 0, 10);
1551 if (pAd->ate.Channel <= 14)
1553 if ((TxPower > 31) || (TxPower < 0))
1555 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER1_Proc::Out of range (Value=%d)\n", TxPower));
1561 if ((TxPower > 15) || (TxPower < -7))
1563 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER1_Proc::Out of range (Value=%d)\n", TxPower));
1568 pAd->ate.TxPower1 = TxPower;
1569 ATETxPwrHandler(pAd, 1);
1570 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_POWER1_Proc Success\n"));
1577 ==========================================================================
1582 TRUE if all parameters are OK, FALSE otherwise
1583 ==========================================================================
1585 INT Set_ATE_TX_Antenna_Proc(
1586 IN PRTMP_ADAPTER pAd,
1591 value = simple_strtol(arg, 0, 10);
1593 if ((value > 2) || (value < 0))
1595 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_Antenna_Proc::Out of range (Value=%d)\n", value));
1599 pAd->ate.TxAntennaSel = value;
1601 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_Antenna_Proc (Antenna = %d)\n", pAd->ate.TxAntennaSel));
1602 ATEDBGPRINT(RT_DEBUG_TRACE,("Ralink: Set_ATE_TX_Antenna_Proc Success\n"));
1609 ==========================================================================
1614 TRUE if all parameters are OK, FALSE otherwise
1615 ==========================================================================
1617 INT Set_ATE_RX_Antenna_Proc(
1618 IN PRTMP_ADAPTER pAd,
1623 value = simple_strtol(arg, 0, 10);
1625 if ((value > 3) || (value < 0))
1627 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_RX_Antenna_Proc::Out of range (Value=%d)\n", value));
1631 pAd->ate.RxAntennaSel = value;
1633 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_RX_Antenna_Proc (Antenna = %d)\n", pAd->ate.RxAntennaSel));
1634 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_RX_Antenna_Proc Success\n"));
1641 ==========================================================================
1643 Set ATE RF frequence offset
1646 TRUE if all parameters are OK, FALSE otherwise
1647 ==========================================================================
1649 INT Set_ATE_TX_FREQOFFSET_Proc(
1650 IN PRTMP_ADAPTER pAd,
1656 RFFreqOffset = simple_strtol(arg, 0, 10);
1658 if(RFFreqOffset >= 64)
1660 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_FREQOFFSET_Proc::Out of range, it should be in range of 0~63.\n"));
1664 pAd->ate.RFFreqOffset = RFFreqOffset;
1665 R4 = pAd->ate.RFFreqOffset << 15; // shift TX power control to correct RF register bit position
1666 R4 |= (pAd->LatchRfRegs.R4 & ((~0x001f8000)));
1667 pAd->LatchRfRegs.R4 = R4;
1671 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_FREQOFFSET_Proc (RFFreqOffset = %d)\n", pAd->ate.RFFreqOffset));
1672 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_FREQOFFSET_Proc Success\n"));
1679 ==========================================================================
1684 TRUE if all parameters are OK, FALSE otherwise
1685 ==========================================================================
1687 INT Set_ATE_TX_BW_Proc(
1688 IN PRTMP_ADAPTER pAd,
1695 BBPCurrentBW = simple_strtol(arg, 0, 10);
1697 if(BBPCurrentBW == 0)
1698 pAd->ate.TxWI.BW = BW_20;
1700 pAd->ate.TxWI.BW = BW_40;
1702 if(pAd->ate.TxWI.BW == BW_20)
1704 if(pAd->ate.Channel <= 14)
1708 if (pAd->Tx20MPwrCfgGBand[i] != 0xffffffff)
1710 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx20MPwrCfgGBand[i]);
1711 RTMPusecDelay(5000);
1719 if (pAd->Tx20MPwrCfgABand[i] != 0xffffffff)
1721 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx20MPwrCfgABand[i]);
1722 RTMPusecDelay(5000);
1727 //Set BBP R4 bit[4:3]=0:0
1728 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
1730 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
1734 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
1736 //to improve Rx sensitivity.
1738 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
1741 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
1744 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
1747 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
1749 // If Channel=14, Bandwidth=20M and Mode=CCK, Set BBP R4 bit5=1
1750 // (Japan filter coefficients)
1751 // This segment of code will only works when ATETXMODE and ATECHANNEL
1752 // were set to MODE_CCK and 14 respectively before ATETXBW is set to 0.
1753 //=====================================================================
1754 if (pAd->ate.Channel == 14)
1756 int TxMode = pAd->ate.TxWI.PHYMODE;
1757 if (TxMode == MODE_CCK)
1759 // when Channel==14 && Mode==CCK && BandWidth==20M, BBP R4 bit5=1
1760 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
1761 value |= 0x20; //set bit5=1
1762 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
1766 //=====================================================================
1767 // If bandwidth != 40M, RF Reg4 bit 21 = 0.
1768 pAd->LatchRfRegs.R4 &= ~0x00200000;
1771 else if(pAd->ate.TxWI.BW == BW_40)
1773 if(pAd->ate.Channel <= 14)
1777 if (pAd->Tx40MPwrCfgGBand[i] != 0xffffffff)
1779 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx40MPwrCfgGBand[i]);
1780 RTMPusecDelay(5000);
1788 if (pAd->Tx40MPwrCfgABand[i] != 0xffffffff)
1790 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx40MPwrCfgABand[i]);
1791 RTMPusecDelay(5000);
1794 #ifdef DOT11_N_SUPPORT
1795 if ((pAd->ate.TxWI.PHYMODE >= MODE_HTMIX) && (pAd->ate.TxWI.MCS == 7))
1798 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R67, value);
1800 #endif // DOT11_N_SUPPORT //
1803 //Set BBP R4 bit[4:3]=1:0
1804 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
1807 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
1811 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
1813 //to improve Rx sensitivity.
1815 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
1818 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
1821 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
1824 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
1826 // If bandwidth = 40M, set RF Reg4 bit 21 = 1.
1827 pAd->LatchRfRegs.R4 |= 0x00200000;
1831 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_BW_Proc (BBPCurrentBW = %d)\n", pAd->ate.TxWI.BW));
1832 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_BW_Proc Success\n"));
1839 ==========================================================================
1841 Set ATE Tx frame length
1844 TRUE if all parameters are OK, FALSE otherwise
1845 ==========================================================================
1847 INT Set_ATE_TX_LENGTH_Proc(
1848 IN PRTMP_ADAPTER pAd,
1851 pAd->ate.TxLength = simple_strtol(arg, 0, 10);
1853 if((pAd->ate.TxLength < 24) || (pAd->ate.TxLength > (MAX_FRAME_SIZE - 34/* == 2312 */)))
1855 pAd->ate.TxLength = (MAX_FRAME_SIZE - 34/* == 2312 */);
1856 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_LENGTH_Proc::Out of range, it should be in range of 24~%d.\n", (MAX_FRAME_SIZE - 34/* == 2312 */)));
1860 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_LENGTH_Proc (TxLength = %d)\n", pAd->ate.TxLength));
1861 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_LENGTH_Proc Success\n"));
1868 ==========================================================================
1870 Set ATE Tx frame count
1873 TRUE if all parameters are OK, FALSE otherwise
1874 ==========================================================================
1876 INT Set_ATE_TX_COUNT_Proc(
1877 IN PRTMP_ADAPTER pAd,
1880 pAd->ate.TxCount = simple_strtol(arg, 0, 10);
1882 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_COUNT_Proc (TxCount = %d)\n", pAd->ate.TxCount));
1883 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_COUNT_Proc Success\n"));
1890 ==========================================================================
1892 Set ATE Tx frame MCS
1895 TRUE if all parameters are OK, FALSE otherwise
1896 ==========================================================================
1898 INT Set_ATE_TX_MCS_Proc(
1899 IN PRTMP_ADAPTER pAd,
1905 MCS = simple_strtol(arg, 0, 10);
1906 result = CheckMCSValid(pAd->ate.TxWI.PHYMODE, MCS);
1910 pAd->ate.TxWI.MCS = (UCHAR)MCS;
1914 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_MCS_Proc::Out of range, refer to rate table.\n"));
1918 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_MCS_Proc (MCS = %d)\n", pAd->ate.TxWI.MCS));
1919 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_MCS_Proc Success\n"));
1926 ==========================================================================
1928 Set ATE Tx frame Mode
1932 3: MODE_HTGREENFIELD
1935 TRUE if all parameters are OK, FALSE otherwise
1936 ==========================================================================
1938 INT Set_ATE_TX_MODE_Proc(
1939 IN PRTMP_ADAPTER pAd,
1942 pAd->ate.TxWI.PHYMODE = simple_strtol(arg, 0, 10);
1944 if(pAd->ate.TxWI.PHYMODE > 3)
1946 pAd->ate.TxWI.PHYMODE = 0;
1947 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_MODE_Proc::Out of range. it should be in range of 0~3\n"));
1948 ATEDBGPRINT(RT_DEBUG_ERROR, ("0: CCK, 1: OFDM, 2: HT_MIX, 3: HT_GREEN_FIELD.\n"));
1952 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_MODE_Proc (TxMode = %d)\n", pAd->ate.TxWI.PHYMODE));
1953 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_MODE_Proc Success\n"));
1960 ==========================================================================
1965 TRUE if all parameters are OK, FALSE otherwise
1966 ==========================================================================
1968 INT Set_ATE_TX_GI_Proc(
1969 IN PRTMP_ADAPTER pAd,
1972 pAd->ate.TxWI.ShortGI = simple_strtol(arg, 0, 10);
1974 if(pAd->ate.TxWI.ShortGI > 1)
1976 pAd->ate.TxWI.ShortGI = 0;
1977 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_GI_Proc::Out of range\n"));
1981 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_GI_Proc (GI = %d)\n", pAd->ate.TxWI.ShortGI));
1982 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_GI_Proc Success\n"));
1989 ==========================================================================
1991 ==========================================================================
1993 INT Set_ATE_RX_FER_Proc(
1994 IN PRTMP_ADAPTER pAd,
1997 pAd->ate.bRxFer = simple_strtol(arg, 0, 10);
1999 if (pAd->ate.bRxFer == 1)
2001 pAd->ate.RxCntPerSec = 0;
2002 pAd->ate.RxTotalCnt = 0;
2005 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_RX_FER_Proc (bRxFer = %d)\n", pAd->ate.bRxFer));
2006 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_RX_FER_Proc Success\n"));
2012 INT Set_ATE_Read_RF_Proc(
2013 IN PRTMP_ADAPTER pAd,
2016 ate_print(KERN_EMERG "R1 = %lx\n", pAd->LatchRfRegs.R1);
2017 ate_print(KERN_EMERG "R2 = %lx\n", pAd->LatchRfRegs.R2);
2018 ate_print(KERN_EMERG "R3 = %lx\n", pAd->LatchRfRegs.R3);
2019 ate_print(KERN_EMERG "R4 = %lx\n", pAd->LatchRfRegs.R4);
2024 INT Set_ATE_Write_RF1_Proc(
2025 IN PRTMP_ADAPTER pAd,
2028 UINT32 value = simple_strtol(arg, 0, 16);
2030 pAd->LatchRfRegs.R1 = value;
2036 INT Set_ATE_Write_RF2_Proc(
2037 IN PRTMP_ADAPTER pAd,
2040 UINT32 value = simple_strtol(arg, 0, 16);
2042 pAd->LatchRfRegs.R2 = value;
2048 INT Set_ATE_Write_RF3_Proc(
2049 IN PRTMP_ADAPTER pAd,
2052 UINT32 value = simple_strtol(arg, 0, 16);
2054 pAd->LatchRfRegs.R3 = value;
2060 INT Set_ATE_Write_RF4_Proc(
2061 IN PRTMP_ADAPTER pAd,
2064 UINT32 value = simple_strtol(arg, 0, 16);
2066 pAd->LatchRfRegs.R4 = value;
2073 ==========================================================================
2075 Load and Write EEPROM from a binary file prepared in advance.
2078 TRUE if all parameters are OK, FALSE otherwise
2079 ==========================================================================
2082 INT Set_ATE_Load_E2P_Proc(
2083 IN PRTMP_ADAPTER pAd,
2086 BOOLEAN ret = FALSE;
2087 PUCHAR src = EEPROM_BIN_FILE_NAME;
2089 INT32 retval, orgfsuid, orgfsgid;
2091 USHORT WriteEEPROM[(EEPROM_SIZE/2)];
2092 UINT32 FileLength = 0;
2093 UINT32 value = simple_strtol(arg, 0, 10);
2095 ATEDBGPRINT(RT_DEBUG_ERROR, ("===> %s (value=%d)\n\n", __func__, value));
2099 /* zero the e2p buffer */
2100 NdisZeroMemory((PUCHAR)WriteEEPROM, EEPROM_SIZE);
2102 /* save uid and gid used for filesystem access.
2103 ** set user and group to 0 (root)
2105 orgfsuid = current->fsuid;
2106 orgfsgid = current->fsgid;
2108 current->fsuid = current->fsgid = 0;
2114 /* open the bin file */
2115 srcf = filp_open(src, O_RDONLY, 0);
2119 ate_print("%s - Error %ld opening %s\n", __func__, -PTR_ERR(srcf), src);
2123 /* the object must have a read method */
2124 if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2126 ate_print("%s - %s does not have a read method\n", __func__, src);
2130 /* read the firmware from the file *.bin */
2131 FileLength = srcf->f_op->read(srcf,
2132 (PUCHAR)WriteEEPROM,
2136 if (FileLength != EEPROM_SIZE)
2138 ate_print("%s: error file length (=%d) in e2p.bin\n",
2139 __func__, FileLength);
2144 /* write the content of .bin file to EEPROM */
2145 rt_ee_write_all(pAd, WriteEEPROM);
2151 /* close firmware file */
2158 retval = filp_close(srcf, NULL);
2161 ATEDBGPRINT(RT_DEBUG_ERROR, ("--> Error %d closing %s\n", -retval, src));
2168 current->fsuid = orgfsuid;
2169 current->fsgid = orgfsgid;
2171 ATEDBGPRINT(RT_DEBUG_ERROR, ("<=== %s (ret=%d)\n", __func__, ret));
2177 INT Set_ATE_Load_E2P_Proc(
2178 IN PRTMP_ADAPTER pAd,
2181 USHORT WriteEEPROM[(EEPROM_SIZE/2)];
2182 struct iwreq *wrq = (struct iwreq *)arg;
2184 ATEDBGPRINT(RT_DEBUG_TRACE, ("===> %s (wrq->u.data.length = %d)\n\n", __func__, wrq->u.data.length));
2186 if (wrq->u.data.length != EEPROM_SIZE)
2188 ate_print("%s: error length (=%d) from host\n",
2189 __func__, wrq->u.data.length);
2192 else/* (wrq->u.data.length == EEPROM_SIZE) */
2194 /* zero the e2p buffer */
2195 NdisZeroMemory((PUCHAR)WriteEEPROM, EEPROM_SIZE);
2197 /* fill the local buffer */
2198 NdisMoveMemory((PUCHAR)WriteEEPROM, wrq->u.data.pointer, wrq->u.data.length);
2202 /* write the content of .bin file to EEPROM */
2203 rt_ee_write_all(pAd, WriteEEPROM);
2208 ATEDBGPRINT(RT_DEBUG_TRACE, ("<=== %s\n", __func__));
2215 INT Set_ATE_Read_E2P_Proc(
2216 IN PRTMP_ADAPTER pAd,
2219 USHORT buffer[EEPROM_SIZE/2];
2223 rt_ee_read_all(pAd, (USHORT *)buffer);
2225 for (i = 0; i < (EEPROM_SIZE/2); i++)
2227 ate_print("%4.4x ", *p);
2228 if (((i+1) % 16) == 0)
2235 INT Set_ATE_Show_Proc(
2236 IN PRTMP_ADAPTER pAd,
2239 ate_print("Mode=%d\n", pAd->ate.Mode);
2240 ate_print("TxPower0=%d\n", pAd->ate.TxPower0);
2241 ate_print("TxPower1=%d\n", pAd->ate.TxPower1);
2242 ate_print("TxAntennaSel=%d\n", pAd->ate.TxAntennaSel);
2243 ate_print("RxAntennaSel=%d\n", pAd->ate.RxAntennaSel);
2244 ate_print("BBPCurrentBW=%d\n", pAd->ate.TxWI.BW);
2245 ate_print("GI=%d\n", pAd->ate.TxWI.ShortGI);
2246 ate_print("MCS=%d\n", pAd->ate.TxWI.MCS);
2247 ate_print("TxMode=%d\n", pAd->ate.TxWI.PHYMODE);
2248 ate_print("Addr1=%02x:%02x:%02x:%02x:%02x:%02x\n",
2249 pAd->ate.Addr1[0], pAd->ate.Addr1[1], pAd->ate.Addr1[2], pAd->ate.Addr1[3], pAd->ate.Addr1[4], pAd->ate.Addr1[5]);
2250 ate_print("Addr2=%02x:%02x:%02x:%02x:%02x:%02x\n",
2251 pAd->ate.Addr2[0], pAd->ate.Addr2[1], pAd->ate.Addr2[2], pAd->ate.Addr2[3], pAd->ate.Addr2[4], pAd->ate.Addr2[5]);
2252 ate_print("Addr3=%02x:%02x:%02x:%02x:%02x:%02x\n",
2253 pAd->ate.Addr3[0], pAd->ate.Addr3[1], pAd->ate.Addr3[2], pAd->ate.Addr3[3], pAd->ate.Addr3[4], pAd->ate.Addr3[5]);
2254 ate_print("Channel=%d\n", pAd->ate.Channel);
2255 ate_print("TxLength=%d\n", pAd->ate.TxLength);
2256 ate_print("TxCount=%u\n", pAd->ate.TxCount);
2257 ate_print("RFFreqOffset=%d\n", pAd->ate.RFFreqOffset);
2258 ate_print(KERN_EMERG "Set_ATE_Show_Proc Success\n");
2262 INT Set_ATE_Help_Proc(
2263 IN PRTMP_ADAPTER pAd,
2266 ate_print("ATE=ATESTART, ATESTOP, TXCONT, TXCARR, TXFRAME, RXFRAME\n");
2267 ate_print("ATEDA\n");
2268 ate_print("ATESA\n");
2269 ate_print("ATEBSSID\n");
2270 ate_print("ATECHANNEL, range:0~14(unless A band !)\n");
2271 ate_print("ATETXPOW0, set power level of antenna 1.\n");
2272 ate_print("ATETXPOW1, set power level of antenna 2.\n");
2273 ate_print("ATETXANT, set TX antenna. 0:all, 1:antenna one, 2:antenna two.\n");
2274 ate_print("ATERXANT, set RX antenna.0:all, 1:antenna one, 2:antenna two, 3:antenna three.\n");
2275 ate_print("ATETXFREQOFFSET, set frequency offset, range 0~63\n");
2276 ate_print("ATETXBW, set BandWidth, 0:20MHz, 1:40MHz.\n");
2277 ate_print("ATETXLEN, set Frame length, range 24~%d\n", (MAX_FRAME_SIZE - 34/* == 2312 */));
2278 ate_print("ATETXCNT, set how many frame going to transmit.\n");
2279 ate_print("ATETXMCS, set MCS, reference to rate table.\n");
2280 ate_print("ATETXMODE, set Mode 0:CCK, 1:OFDM, 2:HT-Mix, 3:GreenField, reference to rate table.\n");
2281 ate_print("ATETXGI, set GI interval, 0:Long, 1:Short\n");
2282 ate_print("ATERXFER, 0:disable Rx Frame error rate. 1:enable Rx Frame error rate.\n");
2283 ate_print("ATERRF, show all RF registers.\n");
2284 ate_print("ATEWRF1, set RF1 register.\n");
2285 ate_print("ATEWRF2, set RF2 register.\n");
2286 ate_print("ATEWRF3, set RF3 register.\n");
2287 ate_print("ATEWRF4, set RF4 register.\n");
2288 ate_print("ATELDE2P, load EEPROM from .bin file.\n");
2289 ate_print("ATERE2P, display all EEPROM content.\n");
2290 ate_print("ATESHOW, display all parameters of ATE.\n");
2291 ate_print("ATEHELP, online help.\n");
2297 ==========================================================================
2300 AsicSwitchChannel() dedicated for ATE.
2302 ==========================================================================
2304 VOID ATEAsicSwitchChannel(
2305 IN PRTMP_ADAPTER pAd)
2307 UINT32 R2 = 0, R3 = DEFAULT_RF_TX_POWER, R4 = 0, Value = 0;
2308 CHAR TxPwer = 0, TxPwer2 = 0;
2309 UCHAR index, BbpValue = 0, R66 = 0x30;
2310 RTMP_RF_REGS *RFRegTable;
2313 #ifdef RALINK_28xx_QA
2314 if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
2316 if (pAd->ate.Channel != pAd->LatchRfRegs.Channel)
2318 pAd->ate.Channel = pAd->LatchRfRegs.Channel;
2323 #endif // RALINK_28xx_QA //
2324 Channel = pAd->ate.Channel;
2327 AsicAntennaSelect(pAd, Channel);
2329 // fill Tx power value
2330 TxPwer = pAd->ate.TxPower0;
2331 TxPwer2 = pAd->ate.TxPower1;
2333 RFRegTable = RF2850RegTable;
2335 switch (pAd->RfIcType)
2337 /* But only 2850 and 2750 support 5.5GHz band... */
2343 for (index = 0; index < NUM_OF_2850_CHNL; index++)
2345 if (Channel == RFRegTable[index].Channel)
2347 R2 = RFRegTable[index].R2;
2348 if (pAd->Antenna.field.TxPath == 1)
2350 R2 |= 0x4000; // If TXpath is 1, bit 14 = 1;
2353 if (pAd->Antenna.field.RxPath == 2)
2355 switch (pAd->ate.RxAntennaSel)
2359 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2362 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2366 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2369 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2373 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2375 /* Only enable two Antenna to receive. */
2377 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2381 else if (pAd->Antenna.field.RxPath == 1)
2383 R2 |= 0x20040; // write 1 to off RxPath
2386 if (pAd->Antenna.field.TxPath == 2)
2388 if (pAd->ate.TxAntennaSel == 1)
2390 R2 |= 0x4000; // If TX Antenna select is 1 , bit 14 = 1; Disable Ant 2
2391 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
2392 BbpValue &= 0xE7; //11100111B
2393 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
2395 else if (pAd->ate.TxAntennaSel == 2)
2397 R2 |= 0x8000; // If TX Antenna select is 2 , bit 15 = 1; Disable Ant 1
2398 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
2401 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
2405 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
2408 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
2411 if (pAd->Antenna.field.RxPath == 3)
2413 switch (pAd->ate.RxAntennaSel)
2417 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2420 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2424 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2427 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2431 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2434 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2437 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2440 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2447 // initialize R3, R4
2448 R3 = (RFRegTable[index].R3 & 0xffffc1ff);
2449 R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15);
2451 // According the Rory's suggestion to solve the middle range issue.
2452 // 5.5G band power range: 0xF9~0X0F, TX0 Reg3 bit9/TX1 Reg4 bit6="0" means the TX power reduce 7dB
2454 if ((TxPwer >= -7) && (TxPwer < 0))
2456 TxPwer = (7+TxPwer);
2457 TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
2458 R3 |= (TxPwer << 10);
2459 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer=%d \n", TxPwer));
2463 TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
2464 R3 |= (TxPwer << 10) | (1 << 9);
2468 if ((TxPwer2 >= -7) && (TxPwer2 < 0))
2470 TxPwer2 = (7+TxPwer2);
2471 TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
2472 R4 |= (TxPwer2 << 7);
2473 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer2=%d \n", TxPwer2));
2477 TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
2478 R4 |= (TxPwer2 << 7) | (1 << 6);
2483 R3 = (RFRegTable[index].R3 & 0xffffc1ff) | (TxPwer << 9); // set TX power0
2484 R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15) | (TxPwer2 <<6);// Set freq offset & TxPwr1
2487 // Based on BBP current mode before changing RF channel.
2488 if (pAd->ate.TxWI.BW == BW_40)
2494 pAd->LatchRfRegs.Channel = Channel;
2495 pAd->LatchRfRegs.R1 = RFRegTable[index].R1;
2496 pAd->LatchRfRegs.R2 = R2;
2497 pAd->LatchRfRegs.R3 = R3;
2498 pAd->LatchRfRegs.R4 = R4;
2511 // Change BBP setting during switch from a->g, g->a
2514 ULONG TxPinCfg = 0x00050F0A;// 2007.10.09 by Brian : 0x0005050A ==> 0x00050F0A
2516 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
2517 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
2518 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
2520 /* For 1T/2R chip only... */
2521 if (pAd->NicConfig2.field.ExternalLNAForG)
2523 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
2527 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
2530 // According the Rory's suggestion to solve the middle range issue.
2531 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R86, &BbpValue);
2532 ASSERT((BbpValue == 0x00));
2533 if ((BbpValue != 0x00))
2535 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x00);
2538 // 5.5GHz band selection PIN, bit1 and bit2 are complement
2539 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
2542 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
2544 // Turn off unused PA or LNA when only 1T or 1R.
2545 if (pAd->Antenna.field.TxPath == 1)
2547 TxPinCfg &= 0xFFFFFFF3;
2549 if (pAd->Antenna.field.RxPath == 1)
2551 TxPinCfg &= 0xFFFFF3FF;
2554 RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
2558 ULONG TxPinCfg = 0x00050F05;//2007.10.09 by Brian : 0x00050505 ==> 0x00050F05
2560 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
2561 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
2562 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
2563 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0xF2);
2565 // According the Rory's suggestion to solve the middle range issue.
2566 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R86, &BbpValue);
2567 ASSERT((BbpValue == 0x00));
2568 if ((BbpValue != 0x00))
2570 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x00);
2572 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R91, &BbpValue);
2573 ASSERT((BbpValue == 0x04));
2575 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R92, &BbpValue);
2576 ASSERT((BbpValue == 0x00));
2578 // 5.5GHz band selection PIN, bit1 and bit2 are complement
2579 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
2582 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
2584 // Turn off unused PA or LNA when only 1T or 1R.
2585 if (pAd->Antenna.field.TxPath == 1)
2587 TxPinCfg &= 0xFFFFFFF3;
2589 if (pAd->Antenna.field.RxPath == 1)
2591 TxPinCfg &= 0xFFFFF3FF;
2594 RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
2597 // R66 should be set according to Channel and use 20MHz when scanning
2601 R66 = 0x2E + GET_LNA_GAIN(pAd);
2602 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
2607 if (pAd->ate.TxWI.BW == BW_20)
2609 R66 = (UCHAR)(0x32 + (GET_LNA_GAIN(pAd)*5)/3);
2610 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
2614 R66 = (UCHAR)(0x3A + (GET_LNA_GAIN(pAd)*5)/3);
2615 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
2620 // On 11A, We should delay and wait RF/BBP to be stable
2621 // and the appropriate time should be 1000 micro seconds
2622 // 2005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.
2624 RTMPusecDelay(1000);
2628 // When 5.5GHz band the LSB of TxPwr will be used to reduced 7dB or not.
2629 ATEDBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, %dT) to , R1=0x%08lx, R2=0x%08lx, R3=0x%08lx, R4=0x%08lx\n",
2632 pAd->Antenna.field.TxPath,
2633 pAd->LatchRfRegs.R1,
2634 pAd->LatchRfRegs.R2,
2635 pAd->LatchRfRegs.R3,
2636 pAd->LatchRfRegs.R4));
2640 ATEDBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%u, Pwr1=%u, %dT) to , R1=0x%08lx, R2=0x%08lx, R3=0x%08lx, R4=0x%08lx\n",
2643 (R3 & 0x00003e00) >> 9,
2644 (R4 & 0x000007c0) >> 6,
2645 pAd->Antenna.field.TxPath,
2646 pAd->LatchRfRegs.R1,
2647 pAd->LatchRfRegs.R2,
2648 pAd->LatchRfRegs.R3,
2649 pAd->LatchRfRegs.R4));
2654 // In fact, no one will call this routine so far !
2657 ==========================================================================
2659 Gives CCK TX rate 2 more dB TX power.
2660 This routine works only in ATE mode.
2662 calculate desired Tx power in RF R3.Tx0~5, should consider -
2663 0. if current radio is a noisy environment (pAd->DrsCounters.fNoisyEnvironment)
2664 1. TxPowerPercentage
2665 2. auto calibration based on TSSI feedback
2666 3. extra 2 db for CCK
2667 4. -10 db upon very-short distance (AvgRSSI >= -40db) to AP
2669 NOTE: Since this routine requires the value of (pAd->DrsCounters.fNoisyEnvironment),
2670 it should be called AFTER MlmeDynamicTxRateSwitching()
2671 ==========================================================================
2673 VOID ATEAsicAdjustTxPower(
2674 IN PRTMP_ADAPTER pAd)
2678 BOOLEAN bAutoTxAgc = FALSE;
2679 UCHAR TssiRef, *pTssiMinusBoundary, *pTssiPlusBoundary, TxAgcStep;
2680 UCHAR BbpR49 = 0, idx;
2681 PCHAR pTxAgcCompensate;
2685 /* no one calls this procedure so far */
2686 if (pAd->ate.TxWI.BW == BW_40)
2688 if (pAd->ate.Channel > 14)
2690 TxPwr[0] = pAd->Tx40MPwrCfgABand[0];
2691 TxPwr[1] = pAd->Tx40MPwrCfgABand[1];
2692 TxPwr[2] = pAd->Tx40MPwrCfgABand[2];
2693 TxPwr[3] = pAd->Tx40MPwrCfgABand[3];
2694 TxPwr[4] = pAd->Tx40MPwrCfgABand[4];
2698 TxPwr[0] = pAd->Tx40MPwrCfgGBand[0];
2699 TxPwr[1] = pAd->Tx40MPwrCfgGBand[1];
2700 TxPwr[2] = pAd->Tx40MPwrCfgGBand[2];
2701 TxPwr[3] = pAd->Tx40MPwrCfgGBand[3];
2702 TxPwr[4] = pAd->Tx40MPwrCfgGBand[4];
2707 if (pAd->ate.Channel > 14)
2709 TxPwr[0] = pAd->Tx20MPwrCfgABand[0];
2710 TxPwr[1] = pAd->Tx20MPwrCfgABand[1];
2711 TxPwr[2] = pAd->Tx20MPwrCfgABand[2];
2712 TxPwr[3] = pAd->Tx20MPwrCfgABand[3];
2713 TxPwr[4] = pAd->Tx20MPwrCfgABand[4];
2717 TxPwr[0] = pAd->Tx20MPwrCfgGBand[0];
2718 TxPwr[1] = pAd->Tx20MPwrCfgGBand[1];
2719 TxPwr[2] = pAd->Tx20MPwrCfgGBand[2];
2720 TxPwr[3] = pAd->Tx20MPwrCfgGBand[3];
2721 TxPwr[4] = pAd->Tx20MPwrCfgGBand[4];
2725 // TX power compensation for temperature variation based on TSSI.
2726 // Do it per 4 seconds.
2727 if (pAd->Mlme.OneSecPeriodicRound % 4 == 0)
2729 if (pAd->ate.Channel <= 14)
2732 bAutoTxAgc = pAd->bAutoTxAgcG;
2733 TssiRef = pAd->TssiRefG;
2734 pTssiMinusBoundary = &pAd->TssiMinusBoundaryG[0];
2735 pTssiPlusBoundary = &pAd->TssiPlusBoundaryG[0];
2736 TxAgcStep = pAd->TxAgcStepG;
2737 pTxAgcCompensate = &pAd->TxAgcCompensateG;
2742 bAutoTxAgc = pAd->bAutoTxAgcA;
2743 TssiRef = pAd->TssiRefA;
2744 pTssiMinusBoundary = &pAd->TssiMinusBoundaryA[0];
2745 pTssiPlusBoundary = &pAd->TssiPlusBoundaryA[0];
2746 TxAgcStep = pAd->TxAgcStepA;
2747 pTxAgcCompensate = &pAd->TxAgcCompensateA;
2752 /* BbpR49 is unsigned char */
2753 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49);
2755 /* (p) TssiPlusBoundaryG[0] = 0 = (m) TssiMinusBoundaryG[0] */
2756 /* compensate: +4 +3 +2 +1 0 -1 -2 -3 -4 * steps */
2757 /* step value is defined in pAd->TxAgcStepG for tx power value */
2759 /* [4]+1+[4] p4 p3 p2 p1 o1 m1 m2 m3 m4 */
2760 /* ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
2761 above value are examined in mass factory production */
2762 /* [4] [3] [2] [1] [0] [1] [2] [3] [4] */
2764 /* plus is 0x10 ~ 0x40, minus is 0x60 ~ 0x90 */
2765 /* if value is between p1 ~ o1 or o1 ~ s1, no need to adjust tx power */
2766 /* if value is 0x65, tx power will be -= TxAgcStep*(2-1) */
2768 if (BbpR49 > pTssiMinusBoundary[1])
2770 // Reading is larger than the reference value.
2771 // Check for how large we need to decrease the Tx power.
2772 for (idx = 1; idx < 5; idx++)
2774 if (BbpR49 <= pTssiMinusBoundary[idx]) // Found the range
2777 // The index is the step we should decrease, idx = 0 means there is nothing to compensate
2778 // if (R3 > (ULONG) (TxAgcStep * (idx-1)))
2779 *pTxAgcCompensate = -(TxAgcStep * (idx-1));
2781 // *pTxAgcCompensate = -((UCHAR)R3);
2783 DeltaPwr += (*pTxAgcCompensate);
2784 ATEDBGPRINT(RT_DEBUG_TRACE, ("-- Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = -%d\n",
2785 BbpR49, TssiRef, TxAgcStep, idx-1));
2787 else if (BbpR49 < pTssiPlusBoundary[1])
2789 // Reading is smaller than the reference value
2790 // check for how large we need to increase the Tx power
2791 for (idx = 1; idx < 5; idx++)
2793 if (BbpR49 >= pTssiPlusBoundary[idx]) // Found the range
2796 // The index is the step we should increase, idx = 0 means there is nothing to compensate
2797 *pTxAgcCompensate = TxAgcStep * (idx-1);
2798 DeltaPwr += (*pTxAgcCompensate);
2799 ATEDBGPRINT(RT_DEBUG_TRACE, ("++ Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
2800 BbpR49, TssiRef, TxAgcStep, idx-1));
2804 *pTxAgcCompensate = 0;
2805 ATEDBGPRINT(RT_DEBUG_TRACE, (" Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
2806 BbpR49, TssiRef, TxAgcStep, 0));
2812 if (pAd->ate.Channel <= 14)
2814 bAutoTxAgc = pAd->bAutoTxAgcG;
2815 pTxAgcCompensate = &pAd->TxAgcCompensateG;
2819 bAutoTxAgc = pAd->bAutoTxAgcA;
2820 pTxAgcCompensate = &pAd->TxAgcCompensateA;
2824 DeltaPwr += (*pTxAgcCompensate);
2827 /* calculate delta power based on the percentage specified from UI */
2828 // E2PROM setting is calibrated for maximum TX power (i.e. 100%)
2829 // We lower TX power here according to the percentage specified from UI
2830 if (pAd->CommonCfg.TxPowerPercentage == 0xffffffff) // AUTO TX POWER control
2832 else if (pAd->CommonCfg.TxPowerPercentage > 90) // 91 ~ 100% & AUTO, treat as 100% in terms of mW
2834 else if (pAd->CommonCfg.TxPowerPercentage > 60) // 61 ~ 90%, treat as 75% in terms of mW
2838 else if (pAd->CommonCfg.TxPowerPercentage > 30) // 31 ~ 60%, treat as 50% in terms of mW
2842 else if (pAd->CommonCfg.TxPowerPercentage > 15) // 16 ~ 30%, treat as 25% in terms of mW
2846 else if (pAd->CommonCfg.TxPowerPercentage > 9) // 10 ~ 15%, treat as 12.5% in terms of mW
2850 else // 0 ~ 9 %, treat as MIN(~3%) in terms of mW
2855 /* reset different new tx power for different TX rate */
2858 if (TxPwr[i] != 0xffffffff)
2862 Value = (CHAR)((TxPwr[i] >> j*4) & 0x0F); /* 0 ~ 15 */
2864 if ((Value + DeltaPwr) < 0)
2866 Value = 0; /* min */
2868 else if ((Value + DeltaPwr) > 0xF)
2870 Value = 0xF; /* max */
2874 Value += DeltaPwr; /* temperature compensation */
2877 /* fill new value to CSR offset */
2878 TxPwr[i] = (TxPwr[i] & ~(0x0000000F << j*4)) | (Value << j*4);
2881 /* write tx power value to CSR */
2882 /* TX_PWR_CFG_0 (8 tx rate) for TX power for OFDM 12M/18M
2883 TX power for OFDM 6M/9M
2884 TX power for CCK5.5M/11M
2885 TX power for CCK1M/2M */
2886 /* TX_PWR_CFG_1 ~ TX_PWR_CFG_4 */
2887 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, TxPwr[i]);
2896 ========================================================================
2897 Routine Description:
2898 Write TxWI for ATE mode.
2902 ========================================================================
2904 static VOID ATEWriteTxWI(
2905 IN PRTMP_ADAPTER pAd,
2906 IN PTXWI_STRUC pOutTxWI,
2909 IN BOOLEAN InsTimestamp,
2912 IN BOOLEAN NSeq, // HW new a sequence.
2921 IN HTTRANSMIT_SETTING *pTransmit)
2927 // Always use Long preamble before verifiation short preamble functionality works well.
2928 // Todo: remove the following line if short preamble functionality works
2930 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);
2931 NdisZeroMemory(&TxWI, TXWI_SIZE);
2936 pTxWI->CFACK = CFACK;
2937 pTxWI->TS= InsTimestamp;
2938 pTxWI->AMPDU = AMPDU;
2940 pTxWI->txop= Txopmode;
2943 // John tune the performace with Intel Client in 20 MHz performance
2947 pTxWI->BAWinSize = BASize;
2948 pTxWI->WirelessCliID = WCID;
2949 pTxWI->MPDUtotalByteCount = Length;
2950 pTxWI->PacketId = PID;
2952 // If CCK or OFDM, BW must be 20
2953 pTxWI->BW = (pTransmit->field.MODE <= MODE_OFDM) ? (BW_20) : (pTransmit->field.BW);
2954 pTxWI->ShortGI = pTransmit->field.ShortGI;
2955 pTxWI->STBC = pTransmit->field.STBC;
2957 pTxWI->MCS = pTransmit->field.MCS;
2958 pTxWI->PHYMODE = pTransmit->field.MODE;
2959 pTxWI->CFACK = CfAck;
2961 pTxWI->MpduDensity = 0;
2963 pTxWI->PacketId = pTxWI->MCS;
2964 NdisMoveMemory(pOutTxWI, &TxWI, sizeof(TXWI_STRUC));
2970 ========================================================================
2972 Routine Description:
2973 Disable protection for ATE.
2974 ========================================================================
2976 VOID ATEDisableAsicProtect(
2977 IN PRTMP_ADAPTER pAd)
2979 PROT_CFG_STRUC ProtCfg, ProtCfg4;
2985 // Config ASIC RTS threshold register
2986 RTMP_IO_READ32(pAd, TX_RTS_CFG, &MacReg);
2987 MacReg &= 0xFF0000FF;
2988 MacReg |= (pAd->CommonCfg.RtsThreshold << 8);
2989 RTMP_IO_WRITE32(pAd, TX_RTS_CFG, MacReg);
2991 // Initial common protection settings
2992 RTMPZeroMemory(Protect, sizeof(Protect));
2995 ProtCfg.field.TxopAllowGF40 = 1;
2996 ProtCfg.field.TxopAllowGF20 = 1;
2997 ProtCfg.field.TxopAllowMM40 = 1;
2998 ProtCfg.field.TxopAllowMM20 = 1;
2999 ProtCfg.field.TxopAllowOfdm = 1;
3000 ProtCfg.field.TxopAllowCck = 1;
3001 ProtCfg.field.RTSThEn = 1;
3002 ProtCfg.field.ProtectNav = ASIC_SHORTNAV;
3004 // Handle legacy(B/G) protection
3005 ProtCfg.field.ProtectRate = pAd->CommonCfg.RtsRate;
3006 ProtCfg.field.ProtectCtrl = 0;
3007 Protect[0] = ProtCfg.word;
3008 Protect[1] = ProtCfg.word;
3011 // 1.All STAs in the BSS are 20/40 MHz HT
3012 // 2. in ai 20/40MHz BSS
3013 // 3. all STAs are 20MHz in a 20MHz BSS
3014 // Pure HT. no protection.
3018 // PROT_TXOP(25:20) -- 010111
3019 // PROT_NAV(19:18) -- 01 (Short NAV protection)
3020 // PROT_CTRL(17:16) -- 00 (None)
3021 // PROT_RATE(15:0) -- 0x4004 (OFDM 24M)
3022 Protect[2] = 0x01744004;
3026 // PROT_TXOP(25:20) -- 111111
3027 // PROT_NAV(19:18) -- 01 (Short NAV protection)
3028 // PROT_CTRL(17:16) -- 00 (None)
3029 // PROT_RATE(15:0) -- 0x4084 (duplicate OFDM 24M)
3030 Protect[3] = 0x03f44084;
3034 // PROT_TXOP(25:20) -- 010111
3035 // PROT_NAV(19:18) -- 01 (Short NAV protection)
3036 // PROT_CTRL(17:16) -- 00 (None)
3037 // PROT_RATE(15:0) -- 0x4004 (OFDM 24M)
3038 Protect[4] = 0x01744004;
3042 // PROT_TXOP(25:20) -- 111111
3043 // PROT_NAV(19:18) -- 01 (Short NAV protection)
3044 // PROT_CTRL(17:16) -- 00 (None)
3045 // PROT_RATE(15:0) -- 0x4084 (duplicate OFDM 24M)
3046 Protect[5] = 0x03f44084;
3048 pAd->CommonCfg.IOTestParm.bRTSLongProtOn = FALSE;
3050 offset = CCK_PROT_CFG;
3051 for (i = 0;i < 6;i++)
3052 RTMP_IO_WRITE32(pAd, offset + i*4, Protect[i]);
3057 /* There are two ways to convert Rssi */
3060 // The way used with GET_LNA_GAIN().
3062 CHAR ATEConvertToRssi(
3063 IN PRTMP_ADAPTER pAd,
3065 IN UCHAR RssiNumber)
3067 UCHAR RssiOffset, LNAGain;
3069 // Rssi equals to zero should be an invalid value
3073 LNAGain = GET_LNA_GAIN(pAd);
3074 if (pAd->LatchRfRegs.Channel > 14)
3076 if (RssiNumber == 0)
3077 RssiOffset = pAd->ARssiOffset0;
3078 else if (RssiNumber == 1)
3079 RssiOffset = pAd->ARssiOffset1;
3081 RssiOffset = pAd->ARssiOffset2;
3085 if (RssiNumber == 0)
3086 RssiOffset = pAd->BGRssiOffset0;
3087 else if (RssiNumber == 1)
3088 RssiOffset = pAd->BGRssiOffset1;
3090 RssiOffset = pAd->BGRssiOffset2;
3093 return (-12 - RssiOffset - LNAGain - Rssi);
3097 // The way originally used in ATE of rt2860ap.
3099 CHAR ATEConvertToRssi(
3100 IN PRTMP_ADAPTER pAd,
3102 IN UCHAR RssiNumber)
3104 UCHAR RssiOffset, LNAGain;
3106 // Rssi equals to zero should be an invalid value
3110 if (pAd->LatchRfRegs.Channel > 14)
3112 LNAGain = pAd->ALNAGain;
3113 if (RssiNumber == 0)
3114 RssiOffset = pAd->ARssiOffset0;
3115 else if (RssiNumber == 1)
3116 RssiOffset = pAd->ARssiOffset1;
3118 RssiOffset = pAd->ARssiOffset2;
3122 LNAGain = pAd->BLNAGain;
3123 if (RssiNumber == 0)
3124 RssiOffset = pAd->BGRssiOffset0;
3125 else if (RssiNumber == 1)
3126 RssiOffset = pAd->BGRssiOffset1;
3128 RssiOffset = pAd->BGRssiOffset2;
3131 return (-32 - RssiOffset + LNAGain - Rssi);
3133 #endif /* end of #if 1 */
3136 ========================================================================
3138 Routine Description:
3139 Set Japan filter coefficients if needed.
3141 This routine should only be called when
3142 entering TXFRAME mode or TXCONT mode.
3144 ========================================================================
3146 static VOID SetJapanFilter(
3147 IN PRTMP_ADAPTER pAd)
3152 // If Channel=14 and Bandwidth=20M and Mode=CCK, set BBP R4 bit5=1
3153 // (Japan Tx filter coefficients)when (TXFRAME or TXCONT).
3155 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BbpData);
3157 if ((pAd->ate.TxWI.PHYMODE == MODE_CCK) && (pAd->ate.Channel == 14) && (pAd->ate.TxWI.BW == BW_20))
3159 BbpData |= 0x20; // turn on
3160 ATEDBGPRINT(RT_DEBUG_TRACE, ("SetJapanFilter!!!\n"));
3164 BbpData &= 0xdf; // turn off
3165 ATEDBGPRINT(RT_DEBUG_TRACE, ("ClearJapanFilter!!!\n"));
3168 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BbpData);
3172 IN PRTMP_ADAPTER pAd,
3173 IN PRXWI_STRUC pRxWI)
3175 /* There are two ways to collect RSSI. */
3177 //pAd->LastRxRate = (USHORT)((pRxWI->MCS) + (pRxWI->BW <<7) + (pRxWI->ShortGI <<8)+ (pRxWI->PHYMODE <<14)) ;
3178 if (pRxWI->RSSI0 != 0)
3180 pAd->ate.LastRssi0 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI0, RSSI_0);
3181 pAd->ate.AvgRssi0X8 = (pAd->ate.AvgRssi0X8 - pAd->ate.AvgRssi0) + pAd->ate.LastRssi0;
3182 pAd->ate.AvgRssi0 = pAd->ate.AvgRssi0X8 >> 3;
3184 if (pRxWI->RSSI1 != 0)
3186 pAd->ate.LastRssi1 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI1, RSSI_1);
3187 pAd->ate.AvgRssi1X8 = (pAd->ate.AvgRssi1X8 - pAd->ate.AvgRssi1) + pAd->ate.LastRssi1;
3188 pAd->ate.AvgRssi1 = pAd->ate.AvgRssi1X8 >> 3;
3190 if (pRxWI->RSSI2 != 0)
3192 pAd->ate.LastRssi2 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI2, RSSI_2);
3193 pAd->ate.AvgRssi2X8 = (pAd->ate.AvgRssi2X8 - pAd->ate.AvgRssi2) + pAd->ate.LastRssi2;
3194 pAd->ate.AvgRssi2 = pAd->ate.AvgRssi2X8 >> 3;
3197 pAd->ate.LastSNR0 = (CHAR)(pRxWI->SNR0);// CHAR ==> UCHAR ?
3198 pAd->ate.LastSNR1 = (CHAR)(pRxWI->SNR1);// CHAR ==> UCHAR ?
3200 pAd->ate.NumOfAvgRssiSample ++;
3202 pAd->ate.LastSNR0 = (CHAR)(pRxWI->SNR0);
3203 pAd->ate.LastSNR1 = (CHAR)(pRxWI->SNR1);
3204 pAd->ate.RxCntPerSec++;
3205 pAd->ate.LastRssi0 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI0, RSSI_0);
3206 pAd->ate.LastRssi1 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI1, RSSI_1);
3207 pAd->ate.LastRssi2 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI2, RSSI_2);
3208 pAd->ate.AvgRssi0X8 = (pAd->ate.AvgRssi0X8 - pAd->ate.AvgRssi0) + pAd->ate.LastRssi0;
3209 pAd->ate.AvgRssi0 = pAd->ate.AvgRssi0X8 >> 3;
3210 pAd->ate.AvgRssi1X8 = (pAd->ate.AvgRssi1X8 - pAd->ate.AvgRssi1) + pAd->ate.LastRssi1;
3211 pAd->ate.AvgRssi1 = pAd->ate.AvgRssi1X8 >> 3;
3212 pAd->ate.AvgRssi2X8 = (pAd->ate.AvgRssi2X8 - pAd->ate.AvgRssi2) + pAd->ate.LastRssi2;
3213 pAd->ate.AvgRssi2 = pAd->ate.AvgRssi2X8 >> 3;
3214 pAd->ate.NumOfAvgRssiSample ++;
3218 #ifdef CONFIG_STA_SUPPORT
3219 VOID RTMPStationStop(
3220 IN PRTMP_ADAPTER pAd)
3222 // BOOLEAN Cancelled;
3224 ATEDBGPRINT(RT_DEBUG_TRACE, ("==> RTMPStationStop\n"));
3227 RTMPCancelTimer(&pAd->MlmeAux.AssocTimer, &Cancelled);
3228 RTMPCancelTimer(&pAd->MlmeAux.ReassocTimer, &Cancelled);
3229 RTMPCancelTimer(&pAd->MlmeAux.DisassocTimer, &Cancelled);
3230 RTMPCancelTimer(&pAd->MlmeAux.AuthTimer, &Cancelled);
3231 RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer, &Cancelled);
3232 RTMPCancelTimer(&pAd->MlmeAux.ScanTimer, &Cancelled);
3234 // For rx statistics, we need to keep this timer running.
3235 // RTMPCancelTimer(&pAd->Mlme.PeriodicTimer, &Cancelled);
3237 ATEDBGPRINT(RT_DEBUG_TRACE, ("<== RTMPStationStop\n"));
3240 VOID RTMPStationStart(
3241 IN PRTMP_ADAPTER pAd)
3243 ATEDBGPRINT(RT_DEBUG_TRACE, ("==> RTMPStationStart\n"));
3244 epAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
3246 // We did not cancel this timer when entering ATE mode.
3248 // RTMPSetTimer(&pAd->Mlme.PeriodicTimer, MLME_TASK_EXEC_INTV);
3249 ATEDBGPRINT(RT_DEBUG_TRACE, ("<== RTMPStationStart\n"));
3251 #endif // CONFIG_STA_SUPPORT //
3254 ==========================================================================
3258 This routine should only be used in ATE mode.
3259 ==========================================================================
3261 static INT ATESetUpFrame(
3262 IN PRTMP_ADAPTER pAd,
3267 #ifdef RT_BIG_ENDIAN
3268 PTXD_STRUC pDestTxD;
3271 PNDIS_PACKET pPacket;
3274 NDIS_PHYSICAL_ADDRESS AllocPa;
3275 HTTRANSMIT_SETTING TxHTPhyMode;
3277 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
3278 PTXWI_STRUC pTxWI = (PTXWI_STRUC) pTxRing->Cell[TxIdx].DmaBuf.AllocVa;
3279 PUCHAR pDMAHeaderBufVA = (PUCHAR) pTxRing->Cell[TxIdx].DmaBuf.AllocVa;
3281 #ifdef RALINK_28xx_QA
3282 PHEADER_802_11 pHeader80211;
3283 #endif // RALINK_28xx_QA //
3285 if (pAd->ate.bQATxStart == TRUE)
3287 // always use QID_AC_BE and FIFO_EDCA
3290 TxHTPhyMode.field.BW = pAd->ate.TxWI.BW;
3291 TxHTPhyMode.field.ShortGI = pAd->ate.TxWI.ShortGI;
3292 TxHTPhyMode.field.STBC = 0;
3293 TxHTPhyMode.field.MCS = pAd->ate.TxWI.MCS;
3294 TxHTPhyMode.field.MODE = pAd->ate.TxWI.PHYMODE;
3295 ATEWriteTxWI(pAd, pTxWI, pAd->ate.TxWI.FRAG, pAd->ate.TxWI.CFACK, pAd->ate.TxWI.TS, pAd->ate.TxWI.AMPDU, pAd->ate.TxWI.ACK, pAd->ate.TxWI.NSEQ,
3296 pAd->ate.TxWI.BAWinSize, 0, pAd->ate.TxWI.MPDUtotalByteCount, pAd->ate.TxWI.PacketId, 0, 0, pAd->ate.TxWI.txop/*IFS_HTTXOP*/, pAd->ate.TxWI.CFACK/*FALSE*/, &TxHTPhyMode);
3300 TxHTPhyMode.field.BW = pAd->ate.TxWI.BW;
3301 TxHTPhyMode.field.ShortGI = pAd->ate.TxWI.ShortGI;
3302 TxHTPhyMode.field.STBC = 0;
3303 TxHTPhyMode.field.MCS = pAd->ate.TxWI.MCS;
3304 TxHTPhyMode.field.MODE = pAd->ate.TxWI.PHYMODE;
3305 ATEWriteTxWI(pAd, pTxWI, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE,
3306 4, 0, pAd->ate.TxLength, 0, 0, 0, IFS_HTTXOP, FALSE, &TxHTPhyMode);
3309 // fill 802.11 header.
3310 #ifdef RALINK_28xx_QA
3311 if (pAd->ate.bQATxStart == TRUE)
3313 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE, pAd->ate.Header, pAd->ate.HLen);
3316 #endif // RALINK_28xx_QA //
3318 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE, TemplateFrame, LENGTH_802_11);
3319 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE+4, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3320 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE+10, pAd->ate.Addr2, ETH_LENGTH_OF_ADDRESS);
3321 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE+16, pAd->ate.Addr3, ETH_LENGTH_OF_ADDRESS);
3324 #ifdef RT_BIG_ENDIAN
3325 RTMPFrameEndianChange(pAd, (((PUCHAR)pDMAHeaderBufVA)+TXWI_SIZE), DIR_READ, FALSE);
3326 #endif // RT_BIG_ENDIAN //
3328 /* alloc buffer for payload */
3329 #ifdef RALINK_28xx_QA
3330 if (pAd->ate.bQATxStart == TRUE)
3332 /* Why not use RTMP_AllocateTxPacketBuffer() instead of RTMP_AllocateRxPacketBuffer()? */
3333 pPacket = RTMP_AllocateRxPacketBuffer(pAd, pAd->ate.DLen + 0x100, FALSE, &AllocVa, &AllocPa);
3336 #endif // RALINK_28xx_QA //
3338 /* Why not use RTMP_AllocateTxPacketBuffer() instead of RTMP_AllocateRxPacketBuffer()? */
3339 pPacket = RTMP_AllocateRxPacketBuffer(pAd, pAd->ate.TxLength, FALSE, &AllocVa, &AllocPa);
3342 if (pPacket == NULL)
3344 pAd->ate.TxCount = 0;
3345 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s fail to alloc packet space.\n", __func__));
3348 pTxRing->Cell[TxIdx].pNextNdisPacket = pPacket;
3350 pDest = (PUCHAR) AllocVa;
3352 #ifdef RALINK_28xx_QA
3353 if (pAd->ate.bQATxStart == TRUE)
3355 RTPKT_TO_OSPKT(pPacket)->len = pAd->ate.DLen;
3358 #endif // RALINK_28xx_QA //
3360 RTPKT_TO_OSPKT(pPacket)->len = pAd->ate.TxLength - LENGTH_802_11;
3363 // Prepare frame payload
3364 #ifdef RALINK_28xx_QA
3365 if (pAd->ate.bQATxStart == TRUE)
3368 if ((pAd->ate.PLen != 0))
3372 for (j = 0; j < pAd->ate.DLen; j+=pAd->ate.PLen)
3374 memcpy(RTPKT_TO_OSPKT(pPacket)->data + j, pAd->ate.Pattern, pAd->ate.PLen);
3379 #endif // RALINK_28xx_QA //
3381 for(j = 0; j < RTPKT_TO_OSPKT(pPacket)->len; j++)
3386 // build Tx Descriptor
3388 #ifndef RT_BIG_ENDIAN
3389 pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
3391 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
3394 #endif // !RT_BIG_ENDIAN //
3396 #ifdef RALINK_28xx_QA
3397 if (pAd->ate.bQATxStart == TRUE)
3400 NdisZeroMemory(pTxD, TXD_SIZE);
3401 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
3403 pTxD->SDPtr0 = RTMP_GetPhysicalAddressLow(pTxRing->Cell[TxIdx].DmaBuf.AllocPa);
3404 pTxD->SDLen0 = TXWI_SIZE + pAd->ate.HLen;
3406 pTxD->SDPtr1 = AllocPa;
3407 pTxD->SDLen1 = RTPKT_TO_OSPKT(pPacket)->len;
3410 pDest = (PUCHAR)pTxWI;
3412 pHeader80211 = (PHEADER_802_11)pDest;
3414 // modify sequence number....
3415 if (pAd->ate.TxDoneCount == 0)
3417 pAd->ate.seq = pHeader80211->Sequence;
3420 pHeader80211->Sequence = ++pAd->ate.seq;
3423 #endif // RALINK_28xx_QA //
3425 NdisZeroMemory(pTxD, TXD_SIZE);
3426 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
3428 pTxD->SDPtr0 = RTMP_GetPhysicalAddressLow (pTxRing->Cell[TxIdx].DmaBuf.AllocPa);
3429 pTxD->SDLen0 = TXWI_SIZE + LENGTH_802_11;
3431 pTxD->SDPtr1 = AllocPa;
3432 pTxD->SDLen1 = RTPKT_TO_OSPKT(pPacket)->len;
3436 #ifdef RT_BIG_ENDIAN
3437 RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
3438 RTMPFrameEndianChange(pAd, (((PUCHAR)pDMAHeaderBufVA)+TXWI_SIZE), DIR_WRITE, FALSE);
3439 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
3440 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
3441 #endif // RT_BIG_ENDIAN //
3446 /*=======================End of RT2860=======================*/
3449 VOID rt_ee_read_all(PRTMP_ADAPTER pAd, USHORT *Data)
3454 for (i = 0 ; i < EEPROM_SIZE/2 ; )
3456 /* "value" is expecially for some compilers... */
3457 RT28xx_EEPROM_READ16(pAd, i*2, value);
3463 VOID rt_ee_write_all(PRTMP_ADAPTER pAd, USHORT *Data)
3468 for (i = 0 ; i < EEPROM_SIZE/2 ; )
3470 /* "value" is expecially for some compilers... */
3472 RT28xx_EEPROM_WRITE16(pAd, i*2, value);
3476 #ifdef RALINK_28xx_QA
3477 VOID ATE_QA_Statistics(
3478 IN PRTMP_ADAPTER pAd,
3479 IN PRXWI_STRUC pRxWI,
3480 IN PRT28XX_RXD_STRUC pRxD,
3481 IN PHEADER_802_11 pHeader)
3483 // update counter first
3484 if (pHeader != NULL)
3486 if (pHeader->FC.Type == BTYPE_DATA)
3491 pAd->ate.OtherData++;
3493 else if (pHeader->FC.Type == BTYPE_MGMT)
3495 if (pHeader->FC.SubType == SUBTYPE_BEACON)
3498 pAd->ate.OtherCount++;
3500 else if (pHeader->FC.Type == BTYPE_CNTL)
3502 pAd->ate.OtherCount++;
3505 pAd->ate.RSSI0 = pRxWI->RSSI0;
3506 pAd->ate.RSSI1 = pRxWI->RSSI1;
3507 pAd->ate.RSSI2 = pRxWI->RSSI2;
3508 pAd->ate.SNR0 = pRxWI->SNR0;
3509 pAd->ate.SNR1 = pRxWI->SNR1;
3512 /* command id with Cmd Type == 0x0008(for 28xx)/0x0005(for iNIC) */
3513 #define RACFG_CMD_RF_WRITE_ALL 0x0000
3514 #define RACFG_CMD_E2PROM_READ16 0x0001
3515 #define RACFG_CMD_E2PROM_WRITE16 0x0002
3516 #define RACFG_CMD_E2PROM_READ_ALL 0x0003
3517 #define RACFG_CMD_E2PROM_WRITE_ALL 0x0004
3518 #define RACFG_CMD_IO_READ 0x0005
3519 #define RACFG_CMD_IO_WRITE 0x0006
3520 #define RACFG_CMD_IO_READ_BULK 0x0007
3521 #define RACFG_CMD_BBP_READ8 0x0008
3522 #define RACFG_CMD_BBP_WRITE8 0x0009
3523 #define RACFG_CMD_BBP_READ_ALL 0x000a
3524 #define RACFG_CMD_GET_COUNTER 0x000b
3525 #define RACFG_CMD_CLEAR_COUNTER 0x000c
3527 #define RACFG_CMD_RSV1 0x000d
3528 #define RACFG_CMD_RSV2 0x000e
3529 #define RACFG_CMD_RSV3 0x000f
3531 #define RACFG_CMD_TX_START 0x0010
3532 #define RACFG_CMD_GET_TX_STATUS 0x0011
3533 #define RACFG_CMD_TX_STOP 0x0012
3534 #define RACFG_CMD_RX_START 0x0013
3535 #define RACFG_CMD_RX_STOP 0x0014
3536 #define RACFG_CMD_GET_NOISE_LEVEL 0x0015
3538 #define RACFG_CMD_ATE_START 0x0080
3539 #define RACFG_CMD_ATE_STOP 0x0081
3541 #define RACFG_CMD_ATE_START_TX_CARRIER 0x0100
3542 #define RACFG_CMD_ATE_START_TX_CONT 0x0101
3543 #define RACFG_CMD_ATE_START_TX_FRAME 0x0102
3544 #define RACFG_CMD_ATE_SET_BW 0x0103
3545 #define RACFG_CMD_ATE_SET_TX_POWER0 0x0104
3546 #define RACFG_CMD_ATE_SET_TX_POWER1 0x0105
3547 #define RACFG_CMD_ATE_SET_FREQ_OFFSET 0x0106
3548 #define RACFG_CMD_ATE_GET_STATISTICS 0x0107
3549 #define RACFG_CMD_ATE_RESET_COUNTER 0x0108
3550 #define RACFG_CMD_ATE_SEL_TX_ANTENNA 0x0109
3551 #define RACFG_CMD_ATE_SEL_RX_ANTENNA 0x010a
3552 #define RACFG_CMD_ATE_SET_PREAMBLE 0x010b
3553 #define RACFG_CMD_ATE_SET_CHANNEL 0x010c
3554 #define RACFG_CMD_ATE_SET_ADDR1 0x010d
3555 #define RACFG_CMD_ATE_SET_ADDR2 0x010e
3556 #define RACFG_CMD_ATE_SET_ADDR3 0x010f
3557 #define RACFG_CMD_ATE_SET_RATE 0x0110
3558 #define RACFG_CMD_ATE_SET_TX_FRAME_LEN 0x0111
3559 #define RACFG_CMD_ATE_SET_TX_FRAME_COUNT 0x0112
3560 #define RACFG_CMD_ATE_START_RX_FRAME 0x0113
3561 #define RACFG_CMD_ATE_E2PROM_READ_BULK 0x0114
3562 #define RACFG_CMD_ATE_E2PROM_WRITE_BULK 0x0115
3563 #define RACFG_CMD_ATE_IO_WRITE_BULK 0x0116
3564 #define RACFG_CMD_ATE_BBP_READ_BULK 0x0117
3565 #define RACFG_CMD_ATE_BBP_WRITE_BULK 0x0118
3566 #define RACFG_CMD_ATE_RF_READ_BULK 0x0119
3567 #define RACFG_CMD_ATE_RF_WRITE_BULK 0x011a
3571 #define A2Hex(_X, _p) \
3576 while (((*p >= 'a') && (*p <= 'f')) || ((*p >= 'A') && (*p <= 'F')) || ((*p >= '0') && (*p <= '9'))) \
3578 if ((*p >= 'a') && (*p <= 'f')) \
3579 _X = _X * 16 + *p - 87; \
3580 else if ((*p >= 'A') && (*p <= 'F')) \
3581 _X = _X * 16 + *p - 55; \
3582 else if ((*p >= '0') && (*p <= '9')) \
3583 _X = _X * 16 + *p - 48; \
3589 static VOID memcpy_exl(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len);
3590 static VOID memcpy_exs(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len);
3591 static VOID RTMP_IO_READ_BULK(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, UINT32 len);
3594 int ate_copy_to_user(
3599 memmove(payload, msg, len);
3604 #define copy_to_user(x,y,z) ate_copy_to_user((PUCHAR)x, (PUCHAR)y, z)
3607 #define LEN_OF_ARG 16
3610 IN PRTMP_ADAPTER pAdapter,
3611 IN struct iwreq *wrq)
3613 unsigned short Command_Id;
3614 struct ate_racfghdr *pRaCfg;
3615 INT Status = NDIS_STATUS_SUCCESS;
3619 if((pRaCfg = kmalloc(sizeof(struct ate_racfghdr), GFP_KERNEL)) == NULL)
3625 NdisZeroMemory(pRaCfg, sizeof(struct ate_racfghdr));
3627 if (copy_from_user((PUCHAR)pRaCfg, wrq->u.data.pointer, wrq->u.data.length))
3635 Command_Id = ntohs(pRaCfg->command_id);
3637 ATEDBGPRINT(RT_DEBUG_TRACE,("\n%s: Command_Id = 0x%04x !\n", __func__, Command_Id));
3641 // We will get this command when QA starts.
3642 case RACFG_CMD_ATE_START:
3644 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START\n"));
3646 // prepare feedback as soon as we can to avoid QA timeout.
3647 pRaCfg->length = htons(2);
3648 pRaCfg->status = htons(0);
3650 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3651 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3652 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3654 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3656 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3658 ATEDBGPRINT(RT_DEBUG_TRACE, ("copy_to_user() fail in case RACFG_CMD_ATE_START\n"));
3663 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START is done !\n"));
3665 Set_ATE_Proc(pAdapter, "ATESTART");
3669 // We will get this command either QA is closed or ated is killed by user.
3670 case RACFG_CMD_ATE_STOP:
3676 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_STOP\n"));
3678 // Distinguish this command came from QA(via ated)
3679 // or ate daemon according to the existence of pid in payload.
3680 // No need to prepare feedback if this cmd came directly from ate daemon.
3681 pRaCfg->length = ntohs(pRaCfg->length);
3683 if (pRaCfg->length == sizeof(pAdapter->ate.AtePid))
3685 // This command came from QA.
3686 // Get the pid of ATE daemon.
3687 memcpy((UCHAR *)&pAdapter->ate.AtePid,
3688 (&pRaCfg->data[0]) - 2/* == &(pRaCfg->status) */,
3689 sizeof(pAdapter->ate.AtePid));
3691 // prepare feedback as soon as we can to avoid QA timeout.
3692 pRaCfg->length = htons(2);
3693 pRaCfg->status = htons(0);
3695 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3696 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3697 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3699 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3701 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3703 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_STOP\n"));
3708 // kill ATE daemon when leaving ATE mode.
3709 // We must kill ATE daemon first before setting ATESTOP,
3710 // or Microsoft will report sth. wrong.
3712 ret = KILL_THREAD_PID(pAdapter->ate.AtePid, SIGTERM, 1);
3715 ATEDBGPRINT(RT_DEBUG_ERROR, ("%s: unable to signal thread\n", pAdapter->net_dev->name));
3720 // AP might have in ATE_STOP mode due to cmd from QA.
3721 if (ATE_ON(pAdapter))
3723 // Someone has killed ate daemon while QA GUI is still open.
3724 Set_ATE_Proc(pAdapter, "ATESTOP");
3725 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_AP_START is done !\n"));
3730 case RACFG_CMD_RF_WRITE_ALL:
3732 UINT32 R1, R2, R3, R4;
3735 memcpy(&R1, pRaCfg->data-2, 4);
3736 memcpy(&R2, pRaCfg->data+2, 4);
3737 memcpy(&R3, pRaCfg->data+6, 4);
3738 memcpy(&R4, pRaCfg->data+10, 4);
3739 memcpy(&channel, pRaCfg->data+14, 2);
3741 pAdapter->LatchRfRegs.R1 = ntohl(R1);
3742 pAdapter->LatchRfRegs.R2 = ntohl(R2);
3743 pAdapter->LatchRfRegs.R3 = ntohl(R3);
3744 pAdapter->LatchRfRegs.R4 = ntohl(R4);
3745 pAdapter->LatchRfRegs.Channel = ntohs(channel);
3747 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R1);
3748 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R2);
3749 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R3);
3750 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R4);
3753 pRaCfg->length = htons(2);
3754 pRaCfg->status = htons(0);
3756 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3757 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3758 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3760 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3761 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3763 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RF_WRITE_ALL\n"));
3768 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RF_WRITE_ALL is done !\n"));
3773 case RACFG_CMD_E2PROM_READ16:
3775 USHORT offset, value, tmp;
3777 offset = ntohs(pRaCfg->status);
3778 /* "tmp" is expecially for some compilers... */
3779 RT28xx_EEPROM_READ16(pAdapter, offset, tmp);
3781 value = htons(value);
3783 ATEDBGPRINT(RT_DEBUG_TRACE,("EEPROM Read offset = 0x%04x, value = 0x%04x\n", offset, value));
3786 pRaCfg->length = htons(4);
3787 pRaCfg->status = htons(0);
3788 memcpy(pRaCfg->data, &value, 2);
3790 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3791 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3792 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3794 ATEDBGPRINT(RT_DEBUG_TRACE, ("sizeof(struct ate_racfghdr) = %d\n", sizeof(struct ate_racfghdr)));
3795 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3797 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3799 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_READ16\n"));
3804 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_E2PROM_READ16 is done !\n"));
3809 case RACFG_CMD_E2PROM_WRITE16:
3811 USHORT offset, value;
3813 offset = ntohs(pRaCfg->status);
3814 memcpy(&value, pRaCfg->data, 2);
3815 value = ntohs(value);
3816 RT28xx_EEPROM_WRITE16(pAdapter, offset, value);
3819 pRaCfg->length = htons(2);
3820 pRaCfg->status = htons(0);
3821 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3822 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3823 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3825 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3827 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_WRITE16\n"));
3832 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_E2PROM_WRITE16 is done !\n"));
3837 case RACFG_CMD_E2PROM_READ_ALL:
3839 USHORT buffer[EEPROM_SIZE/2];
3841 rt_ee_read_all(pAdapter,(USHORT *)buffer);
3842 memcpy_exs(pAdapter, pRaCfg->data, (UCHAR *)buffer, EEPROM_SIZE);
3845 pRaCfg->length = htons(2+EEPROM_SIZE);
3846 pRaCfg->status = htons(0);
3847 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3848 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3849 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3851 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3853 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_READ_ALL\n"));
3858 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_E2PROM_READ_ALL is done !\n"));
3863 case RACFG_CMD_E2PROM_WRITE_ALL:
3865 USHORT buffer[EEPROM_SIZE/2];
3867 NdisZeroMemory((UCHAR *)buffer, EEPROM_SIZE);
3868 memcpy_exs(pAdapter, (UCHAR *)buffer, (UCHAR *)&pRaCfg->status, EEPROM_SIZE);
3869 rt_ee_write_all(pAdapter,(USHORT *)buffer);
3872 pRaCfg->length = htons(2);
3873 pRaCfg->status = htons(0);
3874 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3875 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3876 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3878 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3880 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_WRITE_ALL\n"));
3885 ATEDBGPRINT(RT_DEBUG_ERROR, ("RACFG_CMD_E2PROM_WRITE_ALL is done !\n"));
3891 case RACFG_CMD_IO_READ:
3896 memcpy(&offset, &pRaCfg->status, 4);
3897 offset = ntohl(offset);
3899 // We do not need the base address.
3900 // So just extract the offset out.
3901 offset &= 0x0000FFFF;
3902 RTMP_IO_READ32(pAdapter, offset, &value);
3903 value = htonl(value);
3906 pRaCfg->length = htons(6);
3907 pRaCfg->status = htons(0);
3908 memcpy(pRaCfg->data, &value, 4);
3910 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3911 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3912 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3914 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3916 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_IO_READ\n"));
3921 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_IO_READ is done !\n"));
3926 case RACFG_CMD_IO_WRITE:
3928 UINT32 offset, value;
3930 memcpy(&offset, pRaCfg->data-2, 4);
3931 memcpy(&value, pRaCfg->data+2, 4);
3933 offset = ntohl(offset);
3935 // We do not need the base address.
3936 // So just extract out the offset.
3937 offset &= 0x0000FFFF;
3938 value = ntohl(value);
3939 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_IO_WRITE: offset = %x, value = %x\n", offset, value));
3940 RTMP_IO_WRITE32(pAdapter, offset, value);
3943 pRaCfg->length = htons(2);
3944 pRaCfg->status = htons(0);
3945 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3946 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3947 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3949 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3951 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_IO_WRITE\n"));
3956 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_IO_WRITE is done !\n"));
3961 case RACFG_CMD_IO_READ_BULK:
3966 memcpy(&offset, &pRaCfg->status, 4);
3967 offset = ntohl(offset);
3969 // We do not need the base address.
3970 // So just extract the offset.
3971 offset &= 0x0000FFFF;
3972 memcpy(&len, pRaCfg->data+2, 2);
3977 ATEDBGPRINT(RT_DEBUG_TRACE,("len is too large, make it smaller\n"));
3978 pRaCfg->length = htons(2);
3979 pRaCfg->status = htons(1);
3983 RTMP_IO_READ_BULK(pAdapter, pRaCfg->data, (UCHAR *)offset, len*4);// unit in four bytes
3986 pRaCfg->length = htons(2+len*4);// unit in four bytes
3987 pRaCfg->status = htons(0);
3988 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3989 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3990 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3992 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3994 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_IO_READ_BULK\n"));
3999 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_IO_READ_BULK is done !\n"));
4004 case RACFG_CMD_BBP_READ8:
4010 offset = ntohs(pRaCfg->status);
4012 if (ATE_ON(pAdapter))
4014 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, offset, &value);
4018 RTMP_BBP_IO_READ8_BY_REG_ID(pAdapter, offset, &value);
4021 pRaCfg->length = htons(3);
4022 pRaCfg->status = htons(0);
4023 pRaCfg->data[0] = value;
4025 ATEDBGPRINT(RT_DEBUG_TRACE,("BBP value = %x\n", value));
4027 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4028 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4029 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4031 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4033 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_BBP_READ8\n"));
4038 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_BBP_READ8 is done !\n"));
4042 case RACFG_CMD_BBP_WRITE8:
4047 offset = ntohs(pRaCfg->status);
4048 memcpy(&value, pRaCfg->data, 1);
4050 if (ATE_ON(pAdapter))
4052 ATE_BBP_IO_WRITE8_BY_REG_ID(pAdapter, offset, value);
4056 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAdapter, offset, value);
4059 if ((offset == BBP_R1) || (offset == BBP_R3))
4061 SyncTxRxConfig(pAdapter, offset, value);
4065 pRaCfg->length = htons(2);
4066 pRaCfg->status = htons(0);
4067 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4068 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4069 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4071 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4073 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_BBP_WRITE8\n"));
4078 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_BBP_WRITE8 is done !\n"));
4083 case RACFG_CMD_BBP_READ_ALL:
4087 for (j = 0; j < 137; j++)
4089 pRaCfg->data[j] = 0;
4091 if (ATE_ON(pAdapter))
4093 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j]);
4097 RTMP_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j]);
4102 pRaCfg->length = htons(2+137);
4103 pRaCfg->status = htons(0);
4105 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4106 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4107 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4109 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4111 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_BBP_READ_ALL\n"));
4116 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_BBP_READ_ALL is done !\n"));
4122 case RACFG_CMD_ATE_E2PROM_READ_BULK:
4126 USHORT buffer[EEPROM_SIZE/2];
4128 offset = ntohs(pRaCfg->status);
4129 memcpy(&len, pRaCfg->data, 2);
4132 rt_ee_read_all(pAdapter,(USHORT *)buffer);
4133 if (offset + len <= EEPROM_SIZE)
4134 memcpy_exs(pAdapter, pRaCfg->data, (UCHAR *)buffer+offset, len);
4136 ATEDBGPRINT(RT_DEBUG_ERROR, ("exceed EEPROM size\n"));
4139 pRaCfg->length = htons(2+len);
4140 pRaCfg->status = htons(0);
4141 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4142 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4143 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4145 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4147 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_E2PROM_READ_BULK\n"));
4152 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_E2PROM_READ_BULK is done !\n"));
4158 case RACFG_CMD_ATE_E2PROM_WRITE_BULK:
4162 USHORT buffer[EEPROM_SIZE/2];
4164 offset = ntohs(pRaCfg->status);
4165 memcpy(&len, pRaCfg->data, 2);
4168 rt_ee_read_all(pAdapter,(USHORT *)buffer);
4169 memcpy_exs(pAdapter, (UCHAR *)buffer + offset, (UCHAR *)pRaCfg->data + 2, len);
4170 rt_ee_write_all(pAdapter,(USHORT *)buffer);
4173 pRaCfg->length = htons(2);
4174 pRaCfg->status = htons(0);
4175 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4176 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4177 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4178 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4180 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_E2PROM_WRITE_BULK\n"));
4185 ATEDBGPRINT(RT_DEBUG_ERROR, ("RACFG_CMD_ATE_E2PROM_WRITE_BULK is done !\n"));
4191 case RACFG_CMD_ATE_IO_WRITE_BULK:
4193 UINT32 offset, i, value;
4196 memcpy(&offset, &pRaCfg->status, 4);
4197 offset = ntohl(offset);
4198 memcpy(&len, pRaCfg->data+2, 2);
4201 for (i = 0; i < len; i += 4)
4203 memcpy_exl(pAdapter, (UCHAR *)&value, pRaCfg->data+4+i, 4);
4204 printk("Write %x %x\n", offset + i, value);
4205 RTMP_IO_WRITE32(pAdapter, (offset +i) & 0xffff, value);
4209 pRaCfg->length = htons(2);
4210 pRaCfg->status = htons(0);
4211 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4212 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4213 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4214 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4216 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_IO_WRITE_BULK\n"));
4221 ATEDBGPRINT(RT_DEBUG_ERROR, ("RACFG_CMD_ATE_IO_WRITE_BULK is done !\n"));
4227 case RACFG_CMD_ATE_BBP_READ_BULK:
4233 offset = ntohs(pRaCfg->status);
4234 memcpy(&len, pRaCfg->data, 2);
4238 for (j = offset; j < (offset+len); j++)
4240 pRaCfg->data[j - offset] = 0;
4242 if (pAdapter->ate.Mode == ATE_STOP)
4244 RTMP_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j - offset]);
4248 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j - offset]);
4253 pRaCfg->length = htons(2+len);
4254 pRaCfg->status = htons(0);
4255 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4256 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4257 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4259 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4261 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_BBP_READ_BULK\n"));
4266 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_BBP_READ_BULK is done !\n"));
4272 case RACFG_CMD_ATE_BBP_WRITE_BULK:
4279 offset = ntohs(pRaCfg->status);
4280 memcpy(&len, pRaCfg->data, 2);
4283 for (j = offset; j < (offset+len); j++)
4285 value = pRaCfg->data + 2 + (j - offset);
4286 if (pAdapter->ate.Mode == ATE_STOP)
4288 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAdapter, j, *value);
4292 ATE_BBP_IO_WRITE8_BY_REG_ID(pAdapter, j, *value);
4297 pRaCfg->length = htons(2);
4298 pRaCfg->status = htons(0);
4299 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4300 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4301 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4303 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4305 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_BBP_WRITE_BULK\n"));
4310 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_BBP_WRITE_BULK is done !\n"));
4315 #ifdef CONFIG_RALINK_RT3052
4316 case RACFG_CMD_ATE_RF_READ_BULK:
4322 offset = ntohs(pRaCfg->status);
4323 memcpy(&len, pRaCfg->data, 2);
4326 for (j = offset; j < (offset+len); j++)
4328 pRaCfg->data[j - offset] = 0;
4329 RT30xxReadRFRegister(pAdapter, j, &pRaCfg->data[j - offset]);
4333 pRaCfg->length = htons(2+len);
4334 pRaCfg->status = htons(0);
4335 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4336 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4337 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4339 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4341 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_RF_READ_BULK\n"));
4346 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_RF_READ_BULK is done !\n"));
4352 case RACFG_CMD_ATE_RF_WRITE_BULK:
4359 offset = ntohs(pRaCfg->status);
4360 memcpy(&len, pRaCfg->data, 2);
4363 for (j = offset; j < (offset+len); j++)
4365 value = pRaCfg->data + 2 + (j - offset);
4366 RT30xxWriteRFRegister(pAdapter, j, *value);
4370 pRaCfg->length = htons(2);
4371 pRaCfg->status = htons(0);
4372 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4373 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4374 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4376 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4378 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_RF_WRITE_BULK\n"));
4383 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_RF_WRITE_BULK is done !\n"));
4391 case RACFG_CMD_GET_NOISE_LEVEL:
4394 INT32 buffer[3][10];/* 3 : RxPath ; 10 : no. of per rssi samples */
4396 channel = (ntohs(pRaCfg->status) & 0x00FF);
4397 CalNoiseLevel(pAdapter, channel, buffer);
4398 memcpy_exl(pAdapter, (UCHAR *)pRaCfg->data, (UCHAR *)&(buffer[0][0]), (sizeof(INT32)*3*10));
4401 pRaCfg->length = htons(2 + (sizeof(INT32)*3*10));
4402 pRaCfg->status = htons(0);
4403 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4404 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4405 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4407 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4409 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_GET_NOISE_LEVEL\n"));
4414 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_GET_NOISE_LEVEL is done !\n"));
4419 case RACFG_CMD_GET_COUNTER:
4421 memcpy_exl(pAdapter, &pRaCfg->data[0], (UCHAR *)&pAdapter->ate.U2M, 4);
4422 memcpy_exl(pAdapter, &pRaCfg->data[4], (UCHAR *)&pAdapter->ate.OtherData, 4);
4423 memcpy_exl(pAdapter, &pRaCfg->data[8], (UCHAR *)&pAdapter->ate.Beacon, 4);
4424 memcpy_exl(pAdapter, &pRaCfg->data[12], (UCHAR *)&pAdapter->ate.OtherCount, 4);
4425 memcpy_exl(pAdapter, &pRaCfg->data[16], (UCHAR *)&pAdapter->ate.TxAc0, 4);
4426 memcpy_exl(pAdapter, &pRaCfg->data[20], (UCHAR *)&pAdapter->ate.TxAc1, 4);
4427 memcpy_exl(pAdapter, &pRaCfg->data[24], (UCHAR *)&pAdapter->ate.TxAc2, 4);
4428 memcpy_exl(pAdapter, &pRaCfg->data[28], (UCHAR *)&pAdapter->ate.TxAc3, 4);
4429 memcpy_exl(pAdapter, &pRaCfg->data[32], (UCHAR *)&pAdapter->ate.TxHCCA, 4);
4430 memcpy_exl(pAdapter, &pRaCfg->data[36], (UCHAR *)&pAdapter->ate.TxMgmt, 4);
4431 memcpy_exl(pAdapter, &pRaCfg->data[40], (UCHAR *)&pAdapter->ate.RSSI0, 4);
4432 memcpy_exl(pAdapter, &pRaCfg->data[44], (UCHAR *)&pAdapter->ate.RSSI1, 4);
4433 memcpy_exl(pAdapter, &pRaCfg->data[48], (UCHAR *)&pAdapter->ate.RSSI2, 4);
4434 memcpy_exl(pAdapter, &pRaCfg->data[52], (UCHAR *)&pAdapter->ate.SNR0, 4);
4435 memcpy_exl(pAdapter, &pRaCfg->data[56], (UCHAR *)&pAdapter->ate.SNR1, 4);
4437 pRaCfg->length = htons(2+60);
4438 pRaCfg->status = htons(0);
4439 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4440 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4441 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4443 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4445 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_GET_COUNTER\n"));
4450 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_GET_COUNTER is done !\n"));
4455 case RACFG_CMD_CLEAR_COUNTER:
4457 pAdapter->ate.U2M = 0;
4458 pAdapter->ate.OtherData = 0;
4459 pAdapter->ate.Beacon = 0;
4460 pAdapter->ate.OtherCount = 0;
4461 pAdapter->ate.TxAc0 = 0;
4462 pAdapter->ate.TxAc1 = 0;
4463 pAdapter->ate.TxAc2 = 0;
4464 pAdapter->ate.TxAc3 = 0;
4465 pAdapter->ate.TxHCCA = 0;
4466 pAdapter->ate.TxMgmt = 0;
4467 pAdapter->ate.TxDoneCount = 0;
4469 pRaCfg->length = htons(2);
4470 pRaCfg->status = htons(0);
4472 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4473 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4474 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4476 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4478 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_CLEAR_COUNTER\n"));
4483 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_CLEAR_COUNTER is done !\n"));
4489 case RACFG_CMD_TX_START:
4493 UCHAR Bbp22Value = 0, Bbp24Value = 0;
4495 if ((pAdapter->ate.TxStatus != 0) && (pAdapter->ate.Mode & ATE_TXFRAME))
4497 ATEDBGPRINT(RT_DEBUG_TRACE,("Ate Tx is already running, to run next Tx, you must stop it first\n"));
4499 goto TX_START_ERROR;
4501 else if ((pAdapter->ate.TxStatus != 0) && !(pAdapter->ate.Mode & ATE_TXFRAME))
4505 while ((i++ < 10) && (pAdapter->ate.TxStatus != 0))
4507 RTMPusecDelay(5000);
4511 pAdapter->ate.TxStatus = 0;
4512 pAdapter->ate.TxDoneCount = 0;
4513 //pAdapter->ate.Repeat = 0;
4514 pAdapter->ate.bQATxStart = FALSE;
4517 // If pRaCfg->length == 0, this "RACFG_CMD_TX_START" is for Carrier test or Carrier Suppression.
4518 if (ntohs(pRaCfg->length) != 0)
4522 NdisMoveMemory(&pAdapter->ate.TxWI, pRaCfg->data + 2, 16);
4523 #ifdef RT_BIG_ENDIAN
4524 RTMPWIEndianChange((PUCHAR)&pAdapter->ate.TxWI, TYPE_TXWI);
4525 #endif // RT_BIG_ENDIAN //
4527 NdisMoveMemory(&pAdapter->ate.TxCount, pRaCfg->data + 18, 4);
4528 pAdapter->ate.TxCount = ntohl(pAdapter->ate.TxCount);
4530 p = (USHORT *)(&pRaCfg->data[22]);
4531 //p = pRaCfg->data + 22;
4532 // always use QID_AC_BE
4533 pAdapter->ate.QID = 0;
4534 p = (USHORT *)(&pRaCfg->data[24]);
4535 //p = pRaCfg->data + 24;
4536 pAdapter->ate.HLen = ntohs(*p);
4538 if (pAdapter->ate.HLen > 32)
4540 ATEDBGPRINT(RT_DEBUG_ERROR,("pAdapter->ate.HLen > 32\n"));
4542 goto TX_START_ERROR;
4545 NdisMoveMemory(&pAdapter->ate.Header, pRaCfg->data + 26, pAdapter->ate.HLen);
4548 pAdapter->ate.PLen = ntohs(pRaCfg->length) - (pAdapter->ate.HLen + 28);
4550 if (pAdapter->ate.PLen > 32)
4552 ATEDBGPRINT(RT_DEBUG_ERROR,("pAdapter->ate.PLen > 32\n"));
4554 goto TX_START_ERROR;
4557 NdisMoveMemory(&pAdapter->ate.Pattern, pRaCfg->data + 26 + pAdapter->ate.HLen, pAdapter->ate.PLen);
4558 pAdapter->ate.DLen = pAdapter->ate.TxWI.MPDUtotalByteCount - pAdapter->ate.HLen;
4561 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, BBP_R22, &Bbp22Value);
4567 if (pAdapter->ate.TxCount == 0)
4569 pAdapter->ate.TxCount = 0xFFFFFFFF;
4571 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXFRAME\n"));
4572 pAdapter->ate.bQATxStart = TRUE;
4573 Set_ATE_Proc(pAdapter, "TXFRAME");
4577 case BBP22_TXCONT_OR_CARRSUPP:
4579 ATEDBGPRINT(RT_DEBUG_TRACE,("BBP22_TXCONT_OR_CARRSUPP\n"));
4580 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, 24, &Bbp24Value);
4586 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXCONT\n"));
4587 pAdapter->ate.bQATxStart = TRUE;
4588 Set_ATE_Proc(pAdapter, "TXCONT");
4592 case BBP24_CARRSUPP:
4594 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXCARRSUPP\n"));
4595 pAdapter->ate.bQATxStart = TRUE;
4596 pAdapter->ate.Mode |= ATE_TXCARRSUPP;
4602 ATEDBGPRINT(RT_DEBUG_ERROR,("Unknown Start TX subtype !"));
4611 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXCARR\n"));
4612 pAdapter->ate.bQATxStart = TRUE;
4613 Set_ATE_Proc(pAdapter, "TXCARR");
4619 ATEDBGPRINT(RT_DEBUG_ERROR,("Unknown Start TX subtype !"));
4624 if (pAdapter->ate.bQATxStart == TRUE)
4627 pRaCfg->length = htons(2);
4628 pRaCfg->status = htons(0);
4630 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4631 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4632 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4634 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4636 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() was failed in case RACFG_CMD_TX_START\n"));
4641 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_TX_START is done !\n"));
4648 pRaCfg->length = htons(2);
4649 pRaCfg->status = htons(err);
4651 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4652 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4653 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4654 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4656 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_TX_START\n"));
4661 ATEDBGPRINT(RT_DEBUG_TRACE, ("feedback of TX_START_ERROR is done !\n"));
4666 case RACFG_CMD_GET_TX_STATUS:
4671 pRaCfg->length = htons(6);
4672 pRaCfg->status = htons(0);
4673 count = htonl(pAdapter->ate.TxDoneCount);
4674 NdisMoveMemory(pRaCfg->data, &count, 4);
4675 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4676 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4677 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4679 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4681 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_GET_TX_STATUS\n"));
4686 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_GET_TX_STATUS is done !\n"));
4691 case RACFG_CMD_TX_STOP:
4693 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_TX_STOP\n"));
4695 Set_ATE_Proc(pAdapter, "TXSTOP");
4698 pRaCfg->length = htons(2);
4699 pRaCfg->status = htons(0);
4700 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4701 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4702 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4704 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4706 ATEDBGPRINT(RT_DEBUG_TRACE, ("copy_to_user() fail in case RACFG_CMD_TX_STOP\n"));
4711 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_TX_STOP is done !\n"));
4716 case RACFG_CMD_RX_START:
4718 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_START\n"));
4720 pAdapter->ate.bQARxStart = TRUE;
4721 Set_ATE_Proc(pAdapter, "RXFRAME");
4724 pRaCfg->length = htons(2);
4725 pRaCfg->status = htons(0);
4726 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4727 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4728 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4730 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4732 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RX_START\n"));
4737 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RX_START is done !\n"));
4742 case RACFG_CMD_RX_STOP:
4744 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_STOP\n"));
4746 Set_ATE_Proc(pAdapter, "RXSTOP");
4749 pRaCfg->length = htons(2);
4750 pRaCfg->status = htons(0);
4751 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4752 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4753 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4755 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4757 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RX_STOP\n"));
4762 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RX_STOP is done !\n"));
4767 /* The following cases are for new ATE GUI(not QA). */
4768 /*==================================================*/
4769 case RACFG_CMD_ATE_START_TX_CARRIER:
4771 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_CARRIER\n"));
4773 Set_ATE_Proc(pAdapter, "TXCARR");
4775 pRaCfg->length = htons(2);
4776 pRaCfg->status = htons(0);
4778 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4779 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4780 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4782 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
4784 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4786 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_START_TX_CARRIER\n"));
4791 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START_TX_CARRIER is done !\n"));
4796 case RACFG_CMD_ATE_START_TX_CONT:
4798 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_CONT\n"));
4800 Set_ATE_Proc(pAdapter, "TXCONT");
4802 pRaCfg->length = htons(2);
4803 pRaCfg->status = htons(0);
4805 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4806 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4807 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4809 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
4811 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4813 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_START_TX_CONT\n"));
4818 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START_TX_CONT is done !\n"));
4823 case RACFG_CMD_ATE_START_TX_FRAME:
4825 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_FRAME\n"));
4827 Set_ATE_Proc(pAdapter, "TXFRAME");
4829 pRaCfg->length = htons(2);
4830 pRaCfg->status = htons(0);
4832 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4833 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4834 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4836 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
4838 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4840 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_START_TX_FRAME\n"));
4845 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START_TX_FRAME is done !\n"));
4850 case RACFG_CMD_ATE_SET_BW:
4853 UCHAR str[LEN_OF_ARG];
4855 NdisZeroMemory(str, LEN_OF_ARG);
4857 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_BW\n"));
4859 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4860 value = ntohs(value);
4861 sprintf((PCHAR)str, "%d", value);
4863 Set_ATE_TX_BW_Proc(pAdapter, str);
4866 pRaCfg->length = htons(2);
4867 pRaCfg->status = htons(0);
4868 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4869 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4870 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4872 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4874 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_BW\n"));
4879 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_BW is done !\n"));
4884 case RACFG_CMD_ATE_SET_TX_POWER0:
4887 UCHAR str[LEN_OF_ARG];
4889 NdisZeroMemory(str, LEN_OF_ARG);
4891 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_POWER0\n"));
4893 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4894 value = ntohs(value);
4895 sprintf((PCHAR)str, "%d", value);
4896 Set_ATE_TX_POWER0_Proc(pAdapter, str);
4899 pRaCfg->length = htons(2);
4900 pRaCfg->status = htons(0);
4901 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4902 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4903 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4905 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4907 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_POWER0\n"));
4912 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_POWER0 is done !\n"));
4917 case RACFG_CMD_ATE_SET_TX_POWER1:
4920 UCHAR str[LEN_OF_ARG];
4922 NdisZeroMemory(str, LEN_OF_ARG);
4924 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_POWER1\n"));
4926 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4927 value = ntohs(value);
4928 sprintf((PCHAR)str, "%d", value);
4929 Set_ATE_TX_POWER1_Proc(pAdapter, str);
4932 pRaCfg->length = htons(2);
4933 pRaCfg->status = htons(0);
4934 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4935 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4936 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4938 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4940 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_POWER1\n"));
4945 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_POWER1 is done !\n"));
4950 case RACFG_CMD_ATE_SET_FREQ_OFFSET:
4953 UCHAR str[LEN_OF_ARG];
4955 NdisZeroMemory(str, LEN_OF_ARG);
4957 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_FREQ_OFFSET\n"));
4959 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4960 value = ntohs(value);
4961 sprintf((PCHAR)str, "%d", value);
4962 Set_ATE_TX_FREQOFFSET_Proc(pAdapter, str);
4965 pRaCfg->length = htons(2);
4966 pRaCfg->status = htons(0);
4967 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4968 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4969 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4971 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4973 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_FREQ_OFFSET\n"));
4978 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_FREQ_OFFSET is done !\n"));
4983 case RACFG_CMD_ATE_GET_STATISTICS:
4985 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_GET_STATISTICS\n"));
4987 memcpy_exl(pAdapter, &pRaCfg->data[0], (UCHAR *)&pAdapter->ate.TxDoneCount, 4);
4988 memcpy_exl(pAdapter, &pRaCfg->data[4], (UCHAR *)&pAdapter->WlanCounters.RetryCount.u.LowPart, 4);
4989 memcpy_exl(pAdapter, &pRaCfg->data[8], (UCHAR *)&pAdapter->WlanCounters.FailedCount.u.LowPart, 4);
4990 memcpy_exl(pAdapter, &pRaCfg->data[12], (UCHAR *)&pAdapter->WlanCounters.RTSSuccessCount.u.LowPart, 4);
4991 memcpy_exl(pAdapter, &pRaCfg->data[16], (UCHAR *)&pAdapter->WlanCounters.RTSFailureCount.u.LowPart, 4);
4992 memcpy_exl(pAdapter, &pRaCfg->data[20], (UCHAR *)&pAdapter->WlanCounters.ReceivedFragmentCount.QuadPart, 4);
4993 memcpy_exl(pAdapter, &pRaCfg->data[24], (UCHAR *)&pAdapter->WlanCounters.FCSErrorCount.u.LowPart, 4);
4994 memcpy_exl(pAdapter, &pRaCfg->data[28], (UCHAR *)&pAdapter->Counters8023.RxNoBuffer, 4);
4995 memcpy_exl(pAdapter, &pRaCfg->data[32], (UCHAR *)&pAdapter->WlanCounters.FrameDuplicateCount.u.LowPart, 4);
4996 memcpy_exl(pAdapter, &pRaCfg->data[36], (UCHAR *)&pAdapter->RalinkCounters.OneSecFalseCCACnt, 4);
4998 if (pAdapter->ate.RxAntennaSel == 0)
5004 RSSI0 = (INT32)(pAdapter->ate.LastRssi0 - pAdapter->BbpRssiToDbmDelta);
5005 RSSI1 = (INT32)(pAdapter->ate.LastRssi1 - pAdapter->BbpRssiToDbmDelta);
5006 RSSI2 = (INT32)(pAdapter->ate.LastRssi2 - pAdapter->BbpRssiToDbmDelta);
5007 memcpy_exl(pAdapter, &pRaCfg->data[40], (UCHAR *)&RSSI0, 4);
5008 memcpy_exl(pAdapter, &pRaCfg->data[44], (UCHAR *)&RSSI1, 4);
5009 memcpy_exl(pAdapter, &pRaCfg->data[48], (UCHAR *)&RSSI2, 4);
5010 pRaCfg->length = htons(2+52);
5016 RSSI0 = (INT32)(pAdapter->ate.LastRssi0 - pAdapter->BbpRssiToDbmDelta);
5017 memcpy_exl(pAdapter, &pRaCfg->data[40], (UCHAR *)&RSSI0, 4);
5018 pRaCfg->length = htons(2+44);
5020 pRaCfg->status = htons(0);
5021 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5022 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5023 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5025 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5027 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_GET_STATISTICS\n"));
5032 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_GET_STATISTICS is done !\n"));
5037 case RACFG_CMD_ATE_RESET_COUNTER:
5040 UCHAR str[LEN_OF_ARG];
5042 NdisZeroMemory(str, LEN_OF_ARG);
5044 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_RESET_COUNTER\n"));
5046 sprintf((PCHAR)str, "%d", value);
5047 Set_ResetStatCounter_Proc(pAdapter, str);
5049 pAdapter->ate.TxDoneCount = 0;
5051 pRaCfg->length = htons(2);
5052 pRaCfg->status = htons(0);
5054 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5055 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5056 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5058 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5060 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_RESET_COUNTER\n"));
5065 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_RESET_COUNTER is done !\n"));
5071 case RACFG_CMD_ATE_SEL_TX_ANTENNA:
5074 UCHAR str[LEN_OF_ARG];
5076 NdisZeroMemory(str, LEN_OF_ARG);
5078 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SEL_TX_ANTENNA\n"));
5080 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5081 value = ntohs(value);
5082 sprintf((PCHAR)str, "%d", value);
5083 Set_ATE_TX_Antenna_Proc(pAdapter, str);
5086 pRaCfg->length = htons(2);
5087 pRaCfg->status = htons(0);
5088 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5089 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5090 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5092 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5094 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SEL_TX_ANTENNA\n"));
5099 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SEL_TX_ANTENNA is done !\n"));
5104 case RACFG_CMD_ATE_SEL_RX_ANTENNA:
5107 UCHAR str[LEN_OF_ARG];
5109 NdisZeroMemory(str, LEN_OF_ARG);
5111 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SEL_RX_ANTENNA\n"));
5113 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5114 value = ntohs(value);
5115 sprintf((PCHAR)str, "%d", value);
5116 Set_ATE_RX_Antenna_Proc(pAdapter, str);
5119 pRaCfg->length = htons(2);
5120 pRaCfg->status = htons(0);
5121 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5122 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5123 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5125 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5127 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SEL_RX_ANTENNA\n"));
5132 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SEL_RX_ANTENNA is done !\n"));
5137 case RACFG_CMD_ATE_SET_PREAMBLE:
5140 UCHAR str[LEN_OF_ARG];
5142 NdisZeroMemory(str, LEN_OF_ARG);
5144 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_PREAMBLE\n"));
5146 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5147 value = ntohs(value);
5148 sprintf((PCHAR)str, "%d", value);
5149 Set_ATE_TX_MODE_Proc(pAdapter, str);
5152 pRaCfg->length = htons(2);
5153 pRaCfg->status = htons(0);
5154 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5155 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5156 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5158 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5160 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_PREAMBLE\n"));
5165 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_PREAMBLE is done !\n"));
5170 case RACFG_CMD_ATE_SET_CHANNEL:
5173 UCHAR str[LEN_OF_ARG];
5175 NdisZeroMemory(str, LEN_OF_ARG);
5177 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_CHANNEL\n"));
5179 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5180 value = ntohs(value);
5181 sprintf((PCHAR)str, "%d", value);
5182 Set_ATE_CHANNEL_Proc(pAdapter, str);
5185 pRaCfg->length = htons(2);
5186 pRaCfg->status = htons(0);
5187 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5188 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5189 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5191 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5193 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_CHANNEL\n"));
5198 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_CHANNEL is done !\n"));
5203 case RACFG_CMD_ATE_SET_ADDR1:
5205 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR1\n"));
5207 // Addr is an array of UCHAR,
5208 // so no need to perform endian swap.
5209 memcpy(pAdapter->ate.Addr1, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
5212 pRaCfg->length = htons(2);
5213 pRaCfg->status = htons(0);
5214 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5215 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5216 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5218 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5220 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_ADDR1\n"));
5225 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_ADDR1 is done !\n (ADDR1 = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAdapter->ate.Addr1[0],
5226 pAdapter->ate.Addr1[1], pAdapter->ate.Addr1[2], pAdapter->ate.Addr1[3], pAdapter->ate.Addr1[4], pAdapter->ate.Addr1[5]));
5231 case RACFG_CMD_ATE_SET_ADDR2:
5233 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR2\n"));
5235 // Addr is an array of UCHAR,
5236 // so no need to perform endian swap.
5237 memcpy(pAdapter->ate.Addr2, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
5240 pRaCfg->length = htons(2);
5241 pRaCfg->status = htons(0);
5242 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5243 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5244 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5246 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5248 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_ADDR2\n"));
5253 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_ADDR2 is done !\n (ADDR2 = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAdapter->ate.Addr2[0],
5254 pAdapter->ate.Addr2[1], pAdapter->ate.Addr2[2], pAdapter->ate.Addr2[3], pAdapter->ate.Addr2[4], pAdapter->ate.Addr2[5]));
5259 case RACFG_CMD_ATE_SET_ADDR3:
5261 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR3\n"));
5263 // Addr is an array of UCHAR,
5264 // so no need to perform endian swap.
5265 memcpy(pAdapter->ate.Addr3, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
5268 pRaCfg->length = htons(2);
5269 pRaCfg->status = htons(0);
5270 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5271 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5272 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5274 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5276 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_ADDR3\n"));
5281 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_ADDR3 is done !\n (ADDR3 = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAdapter->ate.Addr3[0],
5282 pAdapter->ate.Addr3[1], pAdapter->ate.Addr3[2], pAdapter->ate.Addr3[3], pAdapter->ate.Addr3[4], pAdapter->ate.Addr3[5]));
5287 case RACFG_CMD_ATE_SET_RATE:
5290 UCHAR str[LEN_OF_ARG];
5292 NdisZeroMemory(str, LEN_OF_ARG);
5294 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_RATE\n"));
5296 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5297 value = ntohs(value);
5298 sprintf((PCHAR)str, "%d", value);
5299 Set_ATE_TX_MCS_Proc(pAdapter, str);
5302 pRaCfg->length = htons(2);
5303 pRaCfg->status = htons(0);
5304 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5305 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5306 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5308 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5310 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_RATE\n"));
5315 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_RATE is done !\n"));
5320 case RACFG_CMD_ATE_SET_TX_FRAME_LEN:
5323 UCHAR str[LEN_OF_ARG];
5325 NdisZeroMemory(str, LEN_OF_ARG);
5327 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_FRAME_LEN\n"));
5329 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5330 value = ntohs(value);
5331 sprintf((PCHAR)str, "%d", value);
5332 Set_ATE_TX_LENGTH_Proc(pAdapter, str);
5335 pRaCfg->length = htons(2);
5336 pRaCfg->status = htons(0);
5337 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5338 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5339 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5341 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5343 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_FRAME_LEN\n"));
5348 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_FRAME_LEN is done !\n"));
5353 case RACFG_CMD_ATE_SET_TX_FRAME_COUNT:
5356 UCHAR str[LEN_OF_ARG];
5358 NdisZeroMemory(str, LEN_OF_ARG);
5360 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_FRAME_COUNT\n"));
5362 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5363 value = ntohs(value);
5364 /* TX_FRAME_COUNT == 0 means tx infinitely */
5367 /* Use TxCount = 0xFFFFFFFF to approximate the infinity. */
5368 pAdapter->ate.TxCount = 0xFFFFFFFF;
5369 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_COUNT_Proc (TxCount = %d)\n", pAdapter->ate.TxCount));
5370 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_COUNT_Proc Success\n"));
5376 sprintf((PCHAR)str, "%d", value);
5377 Set_ATE_TX_COUNT_Proc(pAdapter, str);
5381 pRaCfg->length = htons(2);
5382 pRaCfg->status = htons(0);
5383 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5384 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5385 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5387 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5389 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_FRAME_COUNT\n"));
5394 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_FRAME_COUNT is done !\n"));
5399 case RACFG_CMD_ATE_START_RX_FRAME:
5401 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_START\n"));
5403 Set_ATE_Proc(pAdapter, "RXFRAME");
5406 pRaCfg->length = htons(2);
5407 pRaCfg->status = htons(0);
5408 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5409 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5410 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5412 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5414 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RX_START\n"));
5419 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RX_START is done !\n"));
5426 ASSERT(pRaCfg != NULL);
5434 VOID BubbleSort(INT32 n, INT32 a[])
5438 for (k = n-1; k>0; k--)
5440 for (j = 0; j<k; j++)
5452 VOID CalNoiseLevel(PRTMP_ADAPTER pAd, UCHAR channel, INT32 RSSI[3][10])
5454 INT32 RSSI0, RSSI1, RSSI2;
5455 CHAR Rssi0Offset, Rssi1Offset, Rssi2Offset;
5456 UCHAR BbpR50Rssi0 = 0, BbpR51Rssi1 = 0, BbpR52Rssi2 = 0;
5457 UCHAR Org_BBP66value = 0, Org_BBP69value = 0, Org_BBP70value = 0, data = 0;
5458 USHORT LNA_Gain = 0;
5460 UCHAR Org_Channel = pAd->ate.Channel;
5461 USHORT GainValue = 0, OffsetValue = 0;
5463 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66, &Org_BBP66value);
5464 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R69, &Org_BBP69value);
5465 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R70, &Org_BBP70value);
5467 //**********************************************************************
5468 // Read the value of LNA gain and Rssi offset
5469 //**********************************************************************
5470 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, GainValue);
5475 LNA_Gain = GainValue & 0x00FF;
5477 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, OffsetValue);
5478 Rssi0Offset = OffsetValue & 0x00FF;
5479 Rssi1Offset = (OffsetValue & 0xFF00) >> 8;
5480 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_BG_OFFSET + 2)/* 0x48 */, OffsetValue);
5481 Rssi2Offset = OffsetValue & 0x00FF;
5485 LNA_Gain = (GainValue & 0xFF00) >> 8;
5487 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, OffsetValue);
5488 Rssi0Offset = OffsetValue & 0x00FF;
5489 Rssi1Offset = (OffsetValue & 0xFF00) >> 8;
5490 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET + 2)/* 0x4C */, OffsetValue);
5491 Rssi2Offset = OffsetValue & 0x00FF;
5493 //**********************************************************************
5495 pAd->ate.Channel = channel;
5496 ATEAsicSwitchChannel(pAd);
5500 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, data);
5502 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, data);
5504 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, data);
5508 pAd->ate.bQARxStart = TRUE;
5509 Set_ATE_Proc(pAd, "RXFRAME");
5513 for (j = 0; j < 10; j++)
5515 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R50, &BbpR50Rssi0);
5516 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R51, &BbpR51Rssi1);
5517 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R52, &BbpR52Rssi2);
5522 if (BbpR50Rssi0 == 0)
5528 RSSI0 = (INT32)(-12 - BbpR50Rssi0 - LNA_Gain - Rssi0Offset);
5532 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5535 if (BbpR51Rssi1 == 0)
5541 RSSI1 = (INT32)(-12 - BbpR51Rssi1 - LNA_Gain - Rssi1Offset);
5546 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5549 if (BbpR52Rssi2 == 0)
5552 RSSI2 = (INT32)(-12 - BbpR52Rssi2 - LNA_Gain - Rssi2Offset);
5559 Set_ATE_Proc(pAd, "RXSTOP");
5563 #if 0// Debug Message................
5564 ate_print("\n**********************************************************\n");
5565 ate_print("Noise Level: Channel %d\n", channel);
5566 ate_print("RSSI0 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5567 RSSI[0][0], RSSI[0][1], RSSI[0][2],
5568 RSSI[0][3], RSSI[0][4], RSSI[0][5],
5569 RSSI[0][6], RSSI[0][7], RSSI[0][8],
5571 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5573 ate_print("RSSI1 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5574 RSSI[1][0], RSSI[1][1], RSSI[1][2],
5575 RSSI[1][3], RSSI[1][4], RSSI[1][5],
5576 RSSI[1][6], RSSI[1][7], RSSI[1][8],
5579 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5581 ate_print("RSSI2 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5582 RSSI[2][0], RSSI[2][1], RSSI[2][2],
5583 RSSI[2][3], RSSI[2][4], RSSI[2][5],
5584 RSSI[2][6], RSSI[2][7], RSSI[2][8],
5588 BubbleSort(10, RSSI[0]); // 1R
5590 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5592 BubbleSort(10, RSSI[1]);
5595 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5597 BubbleSort(10, RSSI[2]);
5600 #if 0// Debug Message................
5601 ate_print("\nAfter Sorting....Channel %d\n", channel);
5602 ate_print("RSSI0 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5603 RSSI[0][0], RSSI[0][1], RSSI[0][2],
5604 RSSI[0][3], RSSI[0][4], RSSI[0][5],
5605 RSSI[0][6], RSSI[0][7], RSSI[0][8],
5607 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5609 ate_print("RSSI1 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5610 RSSI[1][0], RSSI[1][1], RSSI[1][2],
5611 RSSI[1][3], RSSI[1][4], RSSI[1][5],
5612 RSSI[1][6], RSSI[1][7], RSSI[1][8],
5615 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5617 ate_print("RSSI2 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5618 RSSI[2][0], RSSI[2][1], RSSI[2][2],
5619 RSSI[2][3], RSSI[2][4], RSSI[2][5],
5620 RSSI[2][6], RSSI[2][7], RSSI[2][8],
5623 ate_print("**********************************************************\n");
5627 pAd->ate.Channel = Org_Channel;
5628 ATEAsicSwitchChannel(pAd);
5630 // Restore original value
5631 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, Org_BBP66value);
5632 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, Org_BBP69value);
5633 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, Org_BBP70value);
5638 BOOLEAN SyncTxRxConfig(PRTMP_ADAPTER pAd, USHORT offset, UCHAR value)
5640 UCHAR tmp = 0, bbp_data = 0;
5644 ATE_BBP_IO_READ8_BY_REG_ID(pAd, offset, &bbp_data);
5648 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, offset, &bbp_data);
5652 ASSERT(bbp_data == value);
5657 /* Need to sync. tx configuration with legacy ATE. */
5658 tmp = (bbp_data & ((1 << 4) | (1 << 3))/* 0x18 */) >> 3;
5661 /* The BBP R1 bit[4:3] = 2 :: Both DACs will be used by QA. */
5664 pAd->ate.TxAntennaSel = 0;
5666 /* The BBP R1 bit[4:3] = 0 :: DAC 0 will be used by QA. */
5669 pAd->ate.TxAntennaSel = 1;
5671 /* The BBP R1 bit[4:3] = 1 :: DAC 1 will be used by QA. */
5674 pAd->ate.TxAntennaSel = 2;
5677 DBGPRINT(RT_DEBUG_TRACE, ("%s -- Sth. wrong! : return FALSE; \n", __func__));
5680 break;/* case BBP_R1 */
5683 /* Need to sync. rx configuration with legacy ATE. */
5684 tmp = (bbp_data & ((1 << 1) | (1 << 0))/* 0x03 */);
5687 /* The BBP R3 bit[1:0] = 3 :: All ADCs will be used by QA. */
5690 pAd->ate.RxAntennaSel = 0;
5692 /* The BBP R3 bit[1:0] = 0 :: ADC 0 will be used by QA, */
5693 /* unless the BBP R3 bit[4:3] = 2 */
5696 pAd->ate.RxAntennaSel = 1;
5697 tmp = ((bbp_data & ((1 << 4) | (1 << 3))/* 0x03 */) >> 3);
5700 /* Default : All ADCs will be used by QA */
5701 pAd->ate.RxAntennaSel = 0;
5704 /* The BBP R3 bit[1:0] = 1 :: ADC 1 will be used by QA. */
5707 pAd->ate.RxAntennaSel = 2;
5709 /* The BBP R3 bit[1:0] = 2 :: ADC 2 will be used by QA. */
5712 pAd->ate.RxAntennaSel = 3;
5715 DBGPRINT(RT_DEBUG_ERROR, ("%s -- Impossible! : return FALSE; \n", __func__));
5718 break;/* case BBP_R3 */
5721 DBGPRINT(RT_DEBUG_ERROR, ("%s -- Sth. wrong! : return FALSE; \n", __func__));
5728 static VOID memcpy_exl(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len)
5735 pDst = (ULONG *) dst;
5736 pSrc = (ULONG *) src;
5738 for (i = 0 ; i < (len/4); i++)
5740 /* For alignment issue, we need a variable "Value". */
5741 memmove(&Value, pSrc, 4);
5742 Value = htonl(Value);
5743 memmove(pDst, &Value, 4);
5749 /* wish that it will never reach here */
5750 memmove(&Value, pSrc, (len % 4));
5751 Value = htonl(Value);
5752 memmove(pDst, &Value, (len % 4));
5756 static VOID memcpy_exs(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len)
5764 for (i = 0; i < (len/2); i++)
5766 memmove(pDst, pSrc, 2);
5767 *((USHORT *)pDst) = htons(*((USHORT *)pDst));
5774 memmove(pDst, pSrc, 1);
5778 static VOID RTMP_IO_READ_BULK(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, UINT32 len)
5781 UINT32 *pDst, *pSrc;
5783 pDst = (UINT32 *) dst;
5784 pSrc = (UINT32 *) src;
5786 for (i = 0 ; i < (len/4); i++)
5788 RTMP_IO_READ32(pAd, (ULONG)pSrc, &Value);
5789 Value = htonl(Value);
5790 memmove(pDst, &Value, 4);
5799 /* These work only when RALINK_ATE is defined */
5800 INT Set_TxStart_Proc(
5801 IN PRTMP_ADAPTER pAd,
5804 ULONG value = simple_strtol(arg, 0, 10);
5805 UCHAR buffer[26] = {0x88, 0x02, 0x2c, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x00, 0x55, 0x44, 0x33, 0x22, 0x11, 0xc0, 0x22, 0x00, 0x00};
5808 if (pAd->ate.TxStatus != 0)
5811 pAd->ate.TxInfo = 0x04000000;
5812 bzero(&pAd->ate.TxWI, sizeof(TXWI_STRUC));
5813 pAd->ate.TxWI.PHYMODE = 0;// MODE_CCK
5814 pAd->ate.TxWI.MPDUtotalByteCount = 1226;
5815 pAd->ate.TxWI.MCS = 3;
5816 //pAd->ate.Mode = ATE_START;
5817 pAd->ate.Mode |= ATE_TXFRAME;
5818 pAd->ate.TxCount = value;
5822 pAd->ate.DLen = 1200;
5823 memcpy(pAd->ate.Header, buffer, 26);
5824 pAd->ate.bQATxStart = TRUE;
5825 //pObj = (POS_COOKIE) pAd->OS_Cookie;
5826 //tasklet_hi_schedule(&pObj->AteTxTask);
5829 #endif /* end of #if 0 */
5831 INT Set_TxStop_Proc(
5832 IN PRTMP_ADAPTER pAd,
5835 ATEDBGPRINT(RT_DEBUG_TRACE,("Set_TxStop_Proc\n"));
5837 if (Set_ATE_Proc(pAd, "TXSTOP"))
5847 INT Set_RxStop_Proc(
5848 IN PRTMP_ADAPTER pAd,
5851 ATEDBGPRINT(RT_DEBUG_TRACE,("Set_RxStop_Proc\n"));
5853 if (Set_ATE_Proc(pAd, "RXSTOP"))
5864 INT Set_EEWrite_Proc(
5865 IN PRTMP_ADAPTER pAd,
5868 USHORT offset = 0, value;
5871 while((*p2 != ':') && (*p2 != '\0'))
5879 A2Hex(value, p2+ 1);
5886 if (offset >= EEPROM_SIZE)
5888 ate_print("Offset can not exceed EEPROM_SIZE( == 0x%04x)\n", EEPROM_SIZE);
5892 RTMP_EEPROM_WRITE16(pAd, offset, value);
5897 INT Set_BBPRead_Proc(
5898 IN PRTMP_ADAPTER pAd,
5901 UCHAR value = 0, offset;
5907 ATE_BBP_IO_READ8_BY_REG_ID(pAd, offset, &value);
5911 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, offset, &value);
5914 ate_print("%x\n", value);
5920 INT Set_BBPWrite_Proc(
5921 IN PRTMP_ADAPTER pAd,
5928 while((*p2 != ':') && (*p2 != '\0'))
5936 A2Hex(value, p2+ 1);
5945 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, offset, value);
5949 RTNP_BBP_IO_WRITE8_BY_REG_ID(pAd, offset, value);
5955 INT Set_RFWrite_Proc(
5956 IN PRTMP_ADAPTER pAd,
5960 ULONG R1, R2, R3, R4;
5964 while((*p2 != ':') && (*p2 != '\0'))
5974 while((*p3 != ':') && (*p3 != '\0'))
5984 while((*p4 != ':') && (*p4 != '\0'))
5998 RTMP_RF_IO_WRITE32(pAd, R1);
5999 RTMP_RF_IO_WRITE32(pAd, R2);
6000 RTMP_RF_IO_WRITE32(pAd, R3);
6001 RTMP_RF_IO_WRITE32(pAd, R4);
6005 #endif // end of #if 0 //
6006 #endif // RALINK_28xx_QA //
6008 #endif // RALINK_ATE //