2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
23 static void force_interrupt(int irq);
24 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
25 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
27 int sn_force_interrupt_flag = 1;
28 extern int sn_ioif_inited;
29 struct list_head **sn_irq_lh;
30 static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
32 u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 struct sn_irq_info *sn_irq_info,
34 int req_irq, nasid_t req_nasid,
37 struct ia64_sal_retval ret_stuff;
41 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
42 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
43 (u64) local_widget, __pa(sn_irq_info), (u64) req_irq,
44 (u64) req_nasid, (u64) req_slice);
46 return ret_stuff.status;
49 void sn_intr_free(nasid_t local_nasid, int local_widget,
50 struct sn_irq_info *sn_irq_info)
52 struct ia64_sal_retval ret_stuff;
56 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
57 (u64) SAL_INTR_FREE, (u64) local_nasid,
58 (u64) local_widget, (u64) sn_irq_info->irq_irq,
59 (u64) sn_irq_info->irq_cookie, 0, 0);
62 static unsigned int sn_startup_irq(unsigned int irq)
67 static void sn_shutdown_irq(unsigned int irq)
71 static void sn_disable_irq(unsigned int irq)
75 static void sn_enable_irq(unsigned int irq)
79 static void sn_ack_irq(unsigned int irq)
81 u64 event_occurred, mask;
84 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
85 mask = event_occurred & SH_ALL_INT_MASK;
86 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
87 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
92 static void sn_end_irq(unsigned int irq)
98 if (ivec == SGI_UART_VECTOR) {
99 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
100 /* If the UART bit is set here, we may have received an
101 * interrupt from the UART that the driver missed. To
102 * make sure, we IPI ourselves to force us to look again.
104 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
105 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
109 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
110 if (sn_force_interrupt_flag)
111 force_interrupt(irq);
114 static void sn_irq_info_free(struct rcu_head *head);
116 struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
117 nasid_t nasid, int slice)
125 int local_widget, status;
127 struct sn_irq_info *new_irq_info;
128 struct sn_pcibus_provider *pci_provider;
130 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
131 if (new_irq_info == NULL)
134 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
136 bridge = (u64) new_irq_info->irq_bridge;
139 return NULL; /* irq is not a device interrupt */
142 local_nasid = NASID_GET(bridge);
145 local_widget = TIO_SWIN_WIDGETNUM(bridge);
147 local_widget = SWIN_WIDGETNUM(bridge);
149 vector = sn_irq_info->irq_irq;
150 /* Free the old PROM new_irq_info structure */
151 sn_intr_free(local_nasid, local_widget, new_irq_info);
152 unregister_intr_pda(new_irq_info);
154 /* allocate a new PROM new_irq_info struct */
155 status = sn_intr_alloc(local_nasid, local_widget,
156 new_irq_info, vector,
159 /* SAL call failed */
165 /* Update kernels new_irq_info with new target info */
166 cpuid = nasid_slice_to_cpuid(new_irq_info->irq_nasid,
167 new_irq_info->irq_slice);
168 new_irq_info->irq_cpuid = cpuid;
169 register_intr_pda(new_irq_info);
171 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
174 * If this represents a line interrupt, target it. If it's
175 * an msi (irq_int_bit < 0), it's already targeted.
177 if (new_irq_info->irq_int_bit >= 0 &&
178 pci_provider && pci_provider->target_interrupt)
179 (pci_provider->target_interrupt)(new_irq_info);
181 spin_lock(&sn_irq_info_lock);
182 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
183 spin_unlock(&sn_irq_info_lock);
184 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
187 cpuphys = cpu_physical_id(cpuid);
188 set_irq_affinity_info((vector & 0xff), cpuphys, 0);
194 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
196 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
200 nasid = cpuid_to_nasid(first_cpu(mask));
201 slice = cpuid_to_slice(first_cpu(mask));
203 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
204 sn_irq_lh[irq], list)
205 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
208 struct hw_interrupt_type irq_type_sn = {
210 .startup = sn_startup_irq,
211 .shutdown = sn_shutdown_irq,
212 .enable = sn_enable_irq,
213 .disable = sn_disable_irq,
216 .set_affinity = sn_set_affinity_irq
219 unsigned int sn_local_vector_to_irq(u8 vector)
221 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
224 void sn_irq_init(void)
227 irq_desc_t *base_desc = irq_desc;
229 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
230 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
232 for (i = 0; i < NR_IRQS; i++) {
233 if (base_desc[i].chip == &no_irq_type) {
234 base_desc[i].chip = &irq_type_sn;
239 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
241 int irq = sn_irq_info->irq_irq;
242 int cpu = sn_irq_info->irq_cpuid;
244 if (pdacpu(cpu)->sn_last_irq < irq) {
245 pdacpu(cpu)->sn_last_irq = irq;
248 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
249 pdacpu(cpu)->sn_first_irq = irq;
252 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
254 int irq = sn_irq_info->irq_irq;
255 int cpu = sn_irq_info->irq_cpuid;
256 struct sn_irq_info *tmp_irq_info;
260 if (pdacpu(cpu)->sn_last_irq == irq) {
262 for (i = pdacpu(cpu)->sn_last_irq - 1;
263 i && !foundmatch; i--) {
264 list_for_each_entry_rcu(tmp_irq_info,
267 if (tmp_irq_info->irq_cpuid == cpu) {
273 pdacpu(cpu)->sn_last_irq = i;
276 if (pdacpu(cpu)->sn_first_irq == irq) {
278 for (i = pdacpu(cpu)->sn_first_irq + 1;
279 i < NR_IRQS && !foundmatch; i++) {
280 list_for_each_entry_rcu(tmp_irq_info,
283 if (tmp_irq_info->irq_cpuid == cpu) {
289 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
294 static void sn_irq_info_free(struct rcu_head *head)
296 struct sn_irq_info *sn_irq_info;
298 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
302 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
304 nasid_t nasid = sn_irq_info->irq_nasid;
305 int slice = sn_irq_info->irq_slice;
306 int cpu = nasid_slice_to_cpuid(nasid, slice);
311 pci_dev_get(pci_dev);
312 sn_irq_info->irq_cpuid = cpu;
313 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
315 /* link it into the sn_irq[irq] list */
316 spin_lock(&sn_irq_info_lock);
317 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
318 reserve_irq_vector(sn_irq_info->irq_irq);
319 spin_unlock(&sn_irq_info_lock);
321 register_intr_pda(sn_irq_info);
323 cpuphys = cpu_physical_id(cpu);
324 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
328 void sn_irq_unfixup(struct pci_dev *pci_dev)
330 struct sn_irq_info *sn_irq_info;
332 /* Only cleanup IRQ stuff if this device has a host bus context */
333 if (!SN_PCIDEV_BUSSOFT(pci_dev))
336 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
339 if (!sn_irq_info->irq_irq) {
344 unregister_intr_pda(sn_irq_info);
345 spin_lock(&sn_irq_info_lock);
346 list_del_rcu(&sn_irq_info->list);
347 spin_unlock(&sn_irq_info_lock);
348 if (list_empty(sn_irq_lh[sn_irq_info->irq_irq]))
349 free_irq_vector(sn_irq_info->irq_irq);
350 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
351 pci_dev_put(pci_dev);
356 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
358 struct sn_pcibus_provider *pci_provider;
360 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
361 if (pci_provider && pci_provider->force_interrupt)
362 (*pci_provider->force_interrupt)(sn_irq_info);
365 static void force_interrupt(int irq)
367 struct sn_irq_info *sn_irq_info;
373 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
374 sn_call_force_intr_provider(sn_irq_info);
380 * Check for lost interrupts. If the PIC int_status reg. says that
381 * an interrupt has been sent, but not handled, and the interrupt
382 * is not pending in either the cpu irr regs or in the soft irr regs,
383 * and the interrupt is not in service, then the interrupt may have
384 * been lost. Force an interrupt on that pin. It is possible that
385 * the interrupt is in flight, so we may generate a spurious interrupt,
386 * but we should never miss a real lost interrupt.
388 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
391 struct pcidev_info *pcidev_info;
392 struct pcibus_info *pcibus_info;
395 * Bridge types attached to TIO (anything but PIC) do not need this WAR
396 * since they do not target Shub II interrupt registers. If that
397 * ever changes, this check needs to accomodate.
399 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
402 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
407 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
409 regval = pcireg_intr_status_get(pcibus_info);
411 if (!ia64_get_irr(irq_to_vector(irq))) {
412 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
414 if (sn_irq_info->irq_int_bit & regval &
415 sn_irq_info->irq_last_intr) {
416 regval &= ~(sn_irq_info->irq_int_bit & regval);
417 sn_call_force_intr_provider(sn_irq_info);
421 sn_irq_info->irq_last_intr = regval;
424 void sn_lb_int_war_check(void)
426 struct sn_irq_info *sn_irq_info;
429 if (!sn_ioif_inited || pda->sn_first_irq == 0)
433 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
434 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
435 sn_check_intr(i, sn_irq_info);
441 void __init sn_irq_lh_init(void)
445 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
447 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
449 for (i = 0; i < NR_IRQS; i++) {
450 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
452 panic("SN PCI INIT: Failed IRQ memory allocation\n");
454 INIT_LIST_HEAD(sn_irq_lh[i]);