git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/platforms/iseries/setup.c

   1 /*
   2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Description:
   6  *      Architecture- / platform-specific boot-time initialization code for
   7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
   8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   9  *      <dan@net4x.com>.
  10  *
  11  *      This program is free software; you can redistribute it and/or
  12  *      modify it under the terms of the GNU General Public License
  13  *      as published by the Free Software Foundation; either version
  14  *      2 of the License, or (at your option) any later version.
  15  */
  16
  17 #undef DEBUG
  18
  19 #include <linux/config.h>
  20 #include <linux/init.h>
  21 #include <linux/threads.h>
  22 #include <linux/smp.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/seq_file.h>
  27 #include <linux/kdev_t.h>
  28 #include <linux/major.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/kernel.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/machdep.h>
  34 #include <asm/page.h>
  35 #include <asm/mmu.h>
  36 #include <asm/pgtable.h>
  37 #include <asm/mmu_context.h>
  38 #include <asm/cputable.h>
  39 #include <asm/sections.h>
  40 #include <asm/iommu.h>
  41 #include <asm/firmware.h>
  42 #include <asm/system.h>
  43 #include <asm/time.h>
  44 #include <asm/paca.h>
  45 #include <asm/cache.h>
  46 #include <asm/sections.h>
  47 #include <asm/abs_addr.h>
  48 #include <asm/iseries/hv_lp_config.h>
  49 #include <asm/iseries/hv_call_event.h>
  50 #include <asm/iseries/hv_call_xm.h>
  51 #include <asm/iseries/it_lp_queue.h>
  52 #include <asm/iseries/mf.h>
  53 #include <asm/iseries/hv_lp_event.h>
  54 #include <asm/iseries/lpar_map.h>
  55
  56 #include "naca.h"
  57 #include "setup.h"
  58 #include "irq.h"
  59 #include "vpd_areas.h"
  60 #include "processor_vpd.h"
  61 #include "main_store.h"
  62 #include "call_sm.h"
  63 #include "call_hpt.h"
  64
  65 extern void hvlog(char *fmt, ...);
  66
  67 #ifdef DEBUG
  68 #define DBG(fmt...) hvlog(fmt)
  69 #else
  70 #define DBG(fmt...)
  71 #endif
  72
  73 /* Function Prototypes */
  74 static unsigned long build_iSeries_Memory_Map(void);
  75 static void iseries_shared_idle(void);
  76 static void iseries_dedicated_idle(void);
  77 #ifdef CONFIG_PCI
  78 extern void iSeries_pci_final_fixup(void);
  79 #else
  80 static void iSeries_pci_final_fixup(void) { }
  81 #endif
  82
  83 /* Global Variables */
  84 int piranha_simulator;
  85
  86 extern int rd_size;             /* Defined in drivers/block/rd.c */
  87 extern unsigned long embedded_sysmap_start;
  88 extern unsigned long embedded_sysmap_end;
  89
  90 extern unsigned long iSeries_recal_tb;
  91 extern unsigned long iSeries_recal_titan;
  92
  93 static int mf_initialized;
  94
  95 static unsigned long cmd_mem_limit;
  96
  97 struct MemoryBlock {
  98         unsigned long absStart;
  99         unsigned long absEnd;
 100         unsigned long logicalStart;
 101         unsigned long logicalEnd;
 102 };
 103
 104 /*
 105  * Process the main store vpd to determine where the holes in memory are
 106  * and return the number of physical blocks and fill in the array of
 107  * block data.
 108  */
 109 static unsigned long iSeries_process_Condor_mainstore_vpd(
 110                 struct MemoryBlock *mb_array, unsigned long max_entries)
 111 {
 112         unsigned long holeFirstChunk, holeSizeChunks;
 113         unsigned long numMemoryBlocks = 1;
 114         struct IoHriMainStoreSegment4 *msVpd =
 115                 (struct IoHriMainStoreSegment4 *)xMsVpd;
 116         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
 117         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
 118         unsigned long holeSize = holeEnd - holeStart;
 119
 120         printk("Mainstore_VPD: Condor\n");
 121         /*
 122          * Determine if absolute memory has any
 123          * holes so that we can interpret the
 124          * access map we get back from the hypervisor
 125          * correctly.
 126          */
 127         mb_array[0].logicalStart = 0;
 128         mb_array[0].logicalEnd = 0x100000000;
 129         mb_array[0].absStart = 0;
 130         mb_array[0].absEnd = 0x100000000;
 131
 132         if (holeSize) {
 133                 numMemoryBlocks = 2;
 134                 holeStart = holeStart & 0x000fffffffffffff;
 135                 holeStart = addr_to_chunk(holeStart);
 136                 holeFirstChunk = holeStart;
 137                 holeSize = addr_to_chunk(holeSize);
 138                 holeSizeChunks = holeSize;
 139                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
 140                                 holeFirstChunk, holeSizeChunks );
 141                 mb_array[0].logicalEnd = holeFirstChunk;
 142                 mb_array[0].absEnd = holeFirstChunk;
 143                 mb_array[1].logicalStart = holeFirstChunk;
 144                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
 145                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
 146                 mb_array[1].absEnd = 0x100000000;
 147         }
 148         return numMemoryBlocks;
 149 }
 150
 151 #define MaxSegmentAreas                 32
 152 #define MaxSegmentAdrRangeBlocks        128
 153 #define MaxAreaRangeBlocks              4
 154
 155 static unsigned long iSeries_process_Regatta_mainstore_vpd(
 156                 struct MemoryBlock *mb_array, unsigned long max_entries)
 157 {
 158         struct IoHriMainStoreSegment5 *msVpdP =
 159                 (struct IoHriMainStoreSegment5 *)xMsVpd;
 160         unsigned long numSegmentBlocks = 0;
 161         u32 existsBits = msVpdP->msAreaExists;
 162         unsigned long area_num;
 163
 164         printk("Mainstore_VPD: Regatta\n");
 165
 166         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
 167                 unsigned long numAreaBlocks;
 168                 struct IoHriMainStoreArea4 *currentArea;
 169
 170                 if (existsBits & 0x80000000) {
 171                         unsigned long block_num;
 172
 173                         currentArea = &msVpdP->msAreaArray[area_num];
 174                         numAreaBlocks = currentArea->numAdrRangeBlocks;
 175                         printk("ms_vpd: processing area %2ld  blocks=%ld",
 176                                         area_num, numAreaBlocks);
 177                         for (block_num = 0; block_num < numAreaBlocks;
 178                                         ++block_num ) {
 179                                 /* Process an address range block */
 180                                 struct MemoryBlock tempBlock;
 181                                 unsigned long i;
 182
 183                                 tempBlock.absStart =
 184                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
 185                                 tempBlock.absEnd =
 186                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
 187                                 tempBlock.logicalStart = 0;
 188                                 tempBlock.logicalEnd   = 0;
 189                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
 190                                                 block_num, tempBlock.absStart,
 191                                                 tempBlock.absEnd);
 192
 193                                 for (i = 0; i < numSegmentBlocks; ++i) {
 194                                         if (mb_array[i].absStart ==
 195                                                         tempBlock.absStart)
 196                                                 break;
 197                                 }
 198                                 if (i == numSegmentBlocks) {
 199                                         if (numSegmentBlocks == max_entries)
 200                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
 201                                         mb_array[numSegmentBlocks] = tempBlock;
 202                                         ++numSegmentBlocks;
 203                                 } else
 204                                         printk(" (duplicate)");
 205                         }
 206                         printk("\n");
 207                 }
 208                 existsBits <<= 1;
 209         }
 210         /* Now sort the blocks found into ascending sequence */
 211         if (numSegmentBlocks > 1) {
 212                 unsigned long m, n;
 213
 214                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
 215                         for (n = numSegmentBlocks - 1; m < n; --n) {
 216                                 if (mb_array[n].absStart <
 217                                                 mb_array[n-1].absStart) {
 218                                         struct MemoryBlock tempBlock;
 219
 220                                         tempBlock = mb_array[n];
 221                                         mb_array[n] = mb_array[n-1];
 222                                         mb_array[n-1] = tempBlock;
 223                                 }
 224                         }
 225                 }
 226         }
 227         /*
 228          * Assign "logical" addresses to each block.  These
 229          * addresses correspond to the hypervisor "bitmap" space.
 230          * Convert all addresses into units of 256K chunks.
 231          */
 232         {
 233         unsigned long i, nextBitmapAddress;
 234
 235         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
 236         nextBitmapAddress = 0;
 237         for (i = 0; i < numSegmentBlocks; ++i) {
 238                 unsigned long length = mb_array[i].absEnd -
 239                         mb_array[i].absStart;
 240
 241                 mb_array[i].logicalStart = nextBitmapAddress;
 242                 mb_array[i].logicalEnd = nextBitmapAddress + length;
 243                 nextBitmapAddress += length;
 244                 printk("          Bitmap range: %016lx - %016lx\n"
 245                                 "        Absolute range: %016lx - %016lx\n",
 246                                 mb_array[i].logicalStart,
 247                                 mb_array[i].logicalEnd,
 248                                 mb_array[i].absStart, mb_array[i].absEnd);
 249                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
 250                                 0x000fffffffffffff);
 251                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
 252                                 0x000fffffffffffff);
 253                 mb_array[i].logicalStart =
 254                         addr_to_chunk(mb_array[i].logicalStart);
 255                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
 256         }
 257         }
 258
 259         return numSegmentBlocks;
 260 }
 261
 262 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
 263                 unsigned long max_entries)
 264 {
 265         unsigned long i;
 266         unsigned long mem_blocks = 0;
 267
 268         if (cpu_has_feature(CPU_FTR_SLB))
 269                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
 270                                 max_entries);
 271         else
 272                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
 273                                 max_entries);
 274
 275         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
 276         for (i = 0; i < mem_blocks; ++i) {
 277                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
 278                        "                             abs chunks %016lx - %016lx\n",
 279                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
 280                         mb_array[i].absStart, mb_array[i].absEnd);
 281         }
 282         return mem_blocks;
 283 }
 284
 285 static void __init iSeries_get_cmdline(void)
 286 {
 287         char *p, *q;
 288
 289         /* copy the command line parameter from the primary VSP  */
 290         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
 291                         HvLpDma_Direction_RemoteToLocal);
 292
 293         p = cmd_line;
 294         q = cmd_line + 255;
 295         while(p < q) {
 296                 if (!*p || *p == '\n')
 297                         break;
 298                 ++p;
 299         }
 300         *p = 0;
 301 }
 302
 303 static void __init iSeries_init_early(void)
 304 {
 305         DBG(" -> iSeries_init_early()\n");
 306
 307         ppc64_firmware_features = FW_FEATURE_ISERIES;
 308
 309         ppc64_interrupt_controller = IC_ISERIES;
 310
 311 #if defined(CONFIG_BLK_DEV_INITRD)
 312         /*
 313          * If the init RAM disk has been configured and there is
 314          * a non-zero starting address for it, set it up
 315          */
 316         if (naca.xRamDisk) {
 317                 initrd_start = (unsigned long)__va(naca.xRamDisk);
 318                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
 319                 initrd_below_start_ok = 1;      // ramdisk in kernel space
 320                 ROOT_DEV = Root_RAM0;
 321                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
 322                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
 323         } else
 324 #endif /* CONFIG_BLK_DEV_INITRD */
 325         {
 326             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
 327         }
 328
 329         iSeries_recal_tb = get_tb();
 330         iSeries_recal_titan = HvCallXm_loadTod();
 331
 332         /*
 333          * Initialize the hash table management pointers
 334          */
 335         hpte_init_iSeries();
 336
 337         /*
 338          * Initialize the DMA/TCE management
 339          */
 340         iommu_init_early_iSeries();
 341
 342         /* Initialize machine-dependency vectors */
 343 #ifdef CONFIG_SMP
 344         smp_init_iSeries();
 345 #endif
 346         if (itLpNaca.xPirEnvironMode == 0)
 347                 piranha_simulator = 1;
 348
 349         /* Associate Lp Event Queue 0 with processor 0 */
 350         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
 351
 352         mf_init();
 353         mf_initialized = 1;
 354         mb();
 355
 356         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 357          * look sensible. If not, clear initrd reference.
 358          */
 359 #ifdef CONFIG_BLK_DEV_INITRD
 360         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
 361             initrd_end > initrd_start)
 362                 ROOT_DEV = Root_RAM0;
 363         else
 364                 initrd_start = initrd_end = 0;
 365 #endif /* CONFIG_BLK_DEV_INITRD */
 366
 367         DBG(" <- iSeries_init_early()\n");
 368 }
 369
 370 struct mschunks_map mschunks_map = {
 371         /* XXX We don't use these, but Piranha might need them. */
 372         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
 373         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
 374         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
 375 };
 376 EXPORT_SYMBOL(mschunks_map);
 377
 378 void mschunks_alloc(unsigned long num_chunks)
 379 {
 380         klimit = _ALIGN(klimit, sizeof(u32));
 381         mschunks_map.mapping = (u32 *)klimit;
 382         klimit += num_chunks * sizeof(u32);
 383         mschunks_map.num_chunks = num_chunks;
 384 }
 385
 386 /*
 387  * The iSeries may have very large memories ( > 128 GB ) and a partition
 388  * may get memory in "chunks" that may be anywhere in the 2**52 real
 389  * address space.  The chunks are 256K in size.  To map this to the
 390  * memory model Linux expects, the AS/400 specific code builds a
 391  * translation table to translate what Linux thinks are "physical"
 392  * addresses to the actual real addresses.  This allows us to make
 393  * it appear to Linux that we have contiguous memory starting at
 394  * physical address zero while in fact this could be far from the truth.
 395  * To avoid confusion, I'll let the words physical and/or real address
 396  * apply to the Linux addresses while I'll use "absolute address" to
 397  * refer to the actual hardware real address.
 398  *
 399  * build_iSeries_Memory_Map gets information from the Hypervisor and
 400  * looks at the Main Store VPD to determine the absolute addresses
 401  * of the memory that has been assigned to our partition and builds
 402  * a table used to translate Linux's physical addresses to these
 403  * absolute addresses.  Absolute addresses are needed when
 404  * communicating with the hypervisor (e.g. to build HPT entries)
 405  *
 406  * Returns the physical memory size
 407  */
 408
 409 static unsigned long __init build_iSeries_Memory_Map(void)
 410 {
 411         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
 412         u32 nextPhysChunk;
 413         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
 414         u32 totalChunks,moreChunks;
 415         u32 currChunk, thisChunk, absChunk;
 416         u32 currDword;
 417         u32 chunkBit;
 418         u64 map;
 419         struct MemoryBlock mb[32];
 420         unsigned long numMemoryBlocks, curBlock;
 421
 422         /* Chunk size on iSeries is 256K bytes */
 423         totalChunks = (u32)HvLpConfig_getMsChunks();
 424         mschunks_alloc(totalChunks);
 425
 426         /*
 427          * Get absolute address of our load area
 428          * and map it to physical address 0
 429          * This guarantees that the loadarea ends up at physical 0
 430          * otherwise, it might not be returned by PLIC as the first
 431          * chunks
 432          */
 433
 434         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
 435         loadAreaSize =  itLpNaca.xLoadAreaChunks;
 436
 437         /*
 438          * Only add the pages already mapped here.
 439          * Otherwise we might add the hpt pages
 440          * The rest of the pages of the load area
 441          * aren't in the HPT yet and can still
 442          * be assigned an arbitrary physical address
 443          */
 444         if ((loadAreaSize * 64) > HvPagesToMap)
 445                 loadAreaSize = HvPagesToMap / 64;
 446
 447         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
 448
 449         /*
 450          * TODO Do we need to do something if the HPT is in the 64MB load area?
 451          * This would be required if the itLpNaca.xLoadAreaChunks includes
 452          * the HPT size
 453          */
 454
 455         printk("Mapping load area - physical addr = 0000000000000000\n"
 456                 "                    absolute addr = %016lx\n",
 457                 chunk_to_addr(loadAreaFirstChunk));
 458         printk("Load area size %dK\n", loadAreaSize * 256);
 459
 460         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
 461                 mschunks_map.mapping[nextPhysChunk] =
 462                         loadAreaFirstChunk + nextPhysChunk;
 463
 464         /*
 465          * Get absolute address of our HPT and remember it so
 466          * we won't map it to any physical address
 467          */
 468         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
 469         hptSizePages = (u32)HvCallHpt_getHptPages();
 470         hptSizeChunks = hptSizePages >>
 471                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
 472         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
 473
 474         printk("HPT absolute addr = %016lx, size = %dK\n",
 475                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 476
 477         ppc64_pft_size = __ilog2(hptSizePages * HW_PAGE_SIZE);
 478
 479         /*
 480          * The actual hashed page table is in the hypervisor,
 481          * we have no direct access
 482          */
 483         htab_address = NULL;
 484
 485         /*
 486          * Determine if absolute memory has any
 487          * holes so that we can interpret the
 488          * access map we get back from the hypervisor
 489          * correctly.
 490          */
 491         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
 492
 493         /*
 494          * Process the main store access map from the hypervisor
 495          * to build up our physical -> absolute translation table
 496          */
 497         curBlock = 0;
 498         currChunk = 0;
 499         currDword = 0;
 500         moreChunks = totalChunks;
 501
 502         while (moreChunks) {
 503                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
 504                                 currDword);
 505                 thisChunk = currChunk;
 506                 while (map) {
 507                         chunkBit = map >> 63;
 508                         map <<= 1;
 509                         if (chunkBit) {
 510                                 --moreChunks;
 511                                 while (thisChunk >= mb[curBlock].logicalEnd) {
 512                                         ++curBlock;
 513                                         if (curBlock >= numMemoryBlocks)
 514                                                 panic("out of memory blocks");
 515                                 }
 516                                 if (thisChunk < mb[curBlock].logicalStart)
 517                                         panic("memory block error");
 518
 519                                 absChunk = mb[curBlock].absStart +
 520                                         (thisChunk - mb[curBlock].logicalStart);
 521                                 if (((absChunk < hptFirstChunk) ||
 522                                      (absChunk > hptLastChunk)) &&
 523                                     ((absChunk < loadAreaFirstChunk) ||
 524                                      (absChunk > loadAreaLastChunk))) {
 525                                         mschunks_map.mapping[nextPhysChunk] =
 526                                                 absChunk;
 527                                         ++nextPhysChunk;
 528                                 }
 529                         }
 530                         ++thisChunk;
 531                 }
 532                 ++currDword;
 533                 currChunk += 64;
 534         }
 535
 536         /*
 537          * main store size (in chunks) is
 538          *   totalChunks - hptSizeChunks
 539          * which should be equal to
 540          *   nextPhysChunk
 541          */
 542         return chunk_to_addr(nextPhysChunk);
 543 }
 544
 545 /*
 546  * Document me.
 547  */
 548 static void __init iSeries_setup_arch(void)
 549 {
 550         if (get_paca()->lppaca.shared_proc) {
 551                 ppc_md.idle_loop = iseries_shared_idle;
 552                 printk(KERN_INFO "Using shared processor idle loop\n");
 553         } else {
 554                 ppc_md.idle_loop = iseries_dedicated_idle;
 555                 printk(KERN_INFO "Using dedicated idle loop\n");
 556         }
 557
 558         /* Setup the Lp Event Queue */
 559         setup_hvlpevent_queue();
 560
 561         printk("Max  logical processors = %d\n",
 562                         itVpdAreas.xSlicMaxLogicalProcs);
 563         printk("Max physical processors = %d\n",
 564                         itVpdAreas.xSlicMaxPhysicalProcs);
 565 }
 566
 567 static void iSeries_show_cpuinfo(struct seq_file *m)
 568 {
 569         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 570 }
 571
 572 /*
 573  * Document me.
 574  * and Implement me.
 575  */
 576 static int iSeries_get_irq(struct pt_regs *regs)
 577 {
 578         /* -2 means ignore this interrupt */
 579         return -2;
 580 }
 581
 582 /*
 583  * Document me.
 584  */
 585 static void iSeries_restart(char *cmd)
 586 {
 587         mf_reboot();
 588 }
 589
 590 /*
 591  * Document me.
 592  */
 593 static void iSeries_power_off(void)
 594 {
 595         mf_power_off();
 596 }
 597
 598 /*
 599  * Document me.
 600  */
 601 static void iSeries_halt(void)
 602 {
 603         mf_power_off();
 604 }
 605
 606 static void __init iSeries_progress(char * st, unsigned short code)
 607 {
 608         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
 609         if (!piranha_simulator && mf_initialized) {
 610                 if (code != 0xffff)
 611                         mf_display_progress(code);
 612                 else
 613                         mf_clear_src();
 614         }
 615 }
 616
 617 static void __init iSeries_fixup_klimit(void)
 618 {
 619         /*
 620          * Change klimit to take into account any ram disk
 621          * that may be included
 622          */
 623         if (naca.xRamDisk)
 624                 klimit = KERNELBASE + (u64)naca.xRamDisk +
 625                         (naca.xRamDiskSize * HW_PAGE_SIZE);
 626         else {
 627                 /*
 628                  * No ram disk was included - check and see if there
 629                  * was an embedded system map.  Change klimit to take
 630                  * into account any embedded system map
 631                  */
 632                 if (embedded_sysmap_end)
 633                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
 634                                         0xfffffffffffff000);
 635         }
 636 }
 637
 638 static int __init iSeries_src_init(void)
 639 {
 640         /* clear the progress line */
 641         ppc_md.progress(" ", 0xffff);
 642         return 0;
 643 }
 644
 645 late_initcall(iSeries_src_init);
 646
 647 static inline void process_iSeries_events(void)
 648 {
 649         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
 650 }
 651
 652 static void yield_shared_processor(void)
 653 {
 654         unsigned long tb;
 655
 656         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
 657                                     HvCall_MaskLpEvent |
 658                                     HvCall_MaskLpProd |
 659                                     HvCall_MaskTimeout);
 660
 661         tb = get_tb();
 662         /* Compute future tb value when yield should expire */
 663         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
 664
 665         /*
 666          * The decrementer stops during the yield.  Force a fake decrementer
 667          * here and let the timer_interrupt code sort out the actual time.
 668          */
 669         get_paca()->lppaca.int_dword.fields.decr_int = 1;
 670         process_iSeries_events();
 671 }
 672
 673 static void iseries_shared_idle(void)
 674 {
 675         while (1) {
 676                 while (!need_resched() && !hvlpevent_is_pending()) {
 677                         local_irq_disable();
 678                         ppc64_runlatch_off();
 679
 680                         /* Recheck with irqs off */
 681                         if (!need_resched() && !hvlpevent_is_pending())
 682                                 yield_shared_processor();
 683
 684                         HMT_medium();
 685                         local_irq_enable();
 686                 }
 687
 688                 ppc64_runlatch_on();
 689
 690                 if (hvlpevent_is_pending())
 691                         process_iSeries_events();
 692
 693                 preempt_enable_no_resched();
 694                 schedule();
 695                 preempt_disable();
 696         }
 697 }
 698
 699 static void iseries_dedicated_idle(void)
 700 {
 701         set_thread_flag(TIF_POLLING_NRFLAG);
 702
 703         while (1) {
 704                 if (!need_resched()) {
 705                         while (!need_resched()) {
 706                                 ppc64_runlatch_off();
 707                                 HMT_low();
 708
 709                                 if (hvlpevent_is_pending()) {
 710                                         HMT_medium();
 711                                         ppc64_runlatch_on();
 712                                         process_iSeries_events();
 713                                 }
 714                         }
 715
 716                         HMT_medium();
 717                 }
 718
 719                 ppc64_runlatch_on();
 720                 preempt_enable_no_resched();
 721                 schedule();
 722                 preempt_disable();
 723         }
 724 }
 725
 726 #ifndef CONFIG_PCI
 727 void __init iSeries_init_IRQ(void) { }
 728 #endif
 729
 730 static int __init iseries_probe(int platform)
 731 {
 732         return PLATFORM_ISERIES_LPAR == platform;
 733 }
 734
 735 struct machdep_calls __initdata iseries_md = {
 736         .setup_arch     = iSeries_setup_arch,
 737         .show_cpuinfo   = iSeries_show_cpuinfo,
 738         .init_IRQ       = iSeries_init_IRQ,
 739         .get_irq        = iSeries_get_irq,
 740         .init_early     = iSeries_init_early,
 741         .pcibios_fixup  = iSeries_pci_final_fixup,
 742         .restart        = iSeries_restart,
 743         .power_off      = iSeries_power_off,
 744         .halt           = iSeries_halt,
 745         .get_boot_time  = iSeries_get_boot_time,
 746         .set_rtc_time   = iSeries_set_rtc_time,
 747         .get_rtc_time   = iSeries_get_rtc_time,
 748         .calibrate_decr = generic_calibrate_decr,
 749         .progress       = iSeries_progress,
 750         .probe          = iseries_probe,
 751         /* XXX Implement enable_pmcs for iSeries */
 752 };
 753
 754 struct blob {
 755         unsigned char data[PAGE_SIZE];
 756         unsigned long next;
 757 };
 758
 759 struct iseries_flat_dt {
 760         struct boot_param_header header;
 761         u64 reserve_map[2];
 762         struct blob dt;
 763         struct blob strings;
 764 };
 765
 766 struct iseries_flat_dt iseries_dt;
 767
 768 void dt_init(struct iseries_flat_dt *dt)
 769 {
 770         dt->header.off_mem_rsvmap =
 771                 offsetof(struct iseries_flat_dt, reserve_map);
 772         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
 773         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
 774         dt->header.totalsize = sizeof(struct iseries_flat_dt);
 775         dt->header.dt_strings_size = sizeof(struct blob);
 776
 777         /* There is no notion of hardware cpu id on iSeries */
 778         dt->header.boot_cpuid_phys = smp_processor_id();
 779
 780         dt->dt.next = (unsigned long)&dt->dt.data;
 781         dt->strings.next = (unsigned long)&dt->strings.data;
 782
 783         dt->header.magic = OF_DT_HEADER;
 784         dt->header.version = 0x10;
 785         dt->header.last_comp_version = 0x10;
 786
 787         dt->reserve_map[0] = 0;
 788         dt->reserve_map[1] = 0;
 789 }
 790
 791 void dt_check_blob(struct blob *b)
 792 {
 793         if (b->next >= (unsigned long)&b->next) {
 794                 DBG("Ran out of space in flat device tree blob!\n");
 795                 BUG();
 796         }
 797 }
 798
 799 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
 800 {
 801         *((u32*)dt->dt.next) = value;
 802         dt->dt.next += sizeof(u32);
 803
 804         dt_check_blob(&dt->dt);
 805 }
 806
 807 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
 808 {
 809         *((u64*)dt->dt.next) = value;
 810         dt->dt.next += sizeof(u64);
 811
 812         dt_check_blob(&dt->dt);
 813 }
 814
 815 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
 816 {
 817         unsigned long start = blob->next - (unsigned long)blob->data;
 818
 819         memcpy((char *)blob->next, data, len);
 820         blob->next = _ALIGN(blob->next + len, 4);
 821
 822         dt_check_blob(blob);
 823
 824         return start;
 825 }
 826
 827 void dt_start_node(struct iseries_flat_dt *dt, char *name)
 828 {
 829         dt_push_u32(dt, OF_DT_BEGIN_NODE);
 830         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
 831 }
 832
 833 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
 834
 835 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
 836 {
 837         unsigned long offset;
 838
 839         dt_push_u32(dt, OF_DT_PROP);
 840
 841         /* Length of the data */
 842         dt_push_u32(dt, len);
 843
 844         /* Put the property name in the string blob. */
 845         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
 846
 847         /* The offset of the properties name in the string blob. */
 848         dt_push_u32(dt, (u32)offset);
 849
 850         /* The actual data. */
 851         dt_push_bytes(&dt->dt, data, len);
 852 }
 853
 854 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
 855 {
 856         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
 857 }
 858
 859 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
 860 {
 861         dt_prop(dt, name, (char *)&data, sizeof(u32));
 862 }
 863
 864 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
 865 {
 866         dt_prop(dt, name, (char *)&data, sizeof(u64));
 867 }
 868
 869 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
 870 {
 871         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
 872 }
 873
 874 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
 875 {
 876         dt_prop(dt, name, NULL, 0);
 877 }
 878
 879 void dt_cpus(struct iseries_flat_dt *dt)
 880 {
 881         unsigned char buf[32];
 882         unsigned char *p;
 883         unsigned int i, index;
 884         struct IoHriProcessorVpd *d;
 885
 886         /* yuck */
 887         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
 888         p = strchr(buf, ' ');
 889         if (!p) p = buf + strlen(buf);
 890
 891         dt_start_node(dt, "cpus");
 892         dt_prop_u32(dt, "#address-cells", 1);
 893         dt_prop_u32(dt, "#size-cells", 0);
 894
 895         for (i = 0; i < NR_CPUS; i++) {
 896                 if (paca[i].lppaca.dyn_proc_status >= 2)
 897                         continue;
 898
 899                 snprintf(p, 32 - (p - buf), "@%d", i);
 900                 dt_start_node(dt, buf);
 901
 902                 dt_prop_str(dt, "device_type", "cpu");
 903
 904                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
 905                 d = &xIoHriProcessorVpd[index];
 906
 907                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
 908                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
 909
 910                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
 911                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
 912
 913                 /* magic conversions to Hz copied from old code */
 914                 dt_prop_u32(dt, "clock-frequency",
 915                         ((1UL << 34) * 1000000) / d->xProcFreq);
 916                 dt_prop_u32(dt, "timebase-frequency",
 917                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
 918
 919                 dt_prop_u32(dt, "reg", i);
 920
 921                 dt_end_node(dt);
 922         }
 923
 924         dt_end_node(dt);
 925 }
 926
 927 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
 928 {
 929         u64 tmp[2];
 930
 931         dt_init(dt);
 932
 933         dt_start_node(dt, "");
 934
 935         dt_prop_u32(dt, "#address-cells", 2);
 936         dt_prop_u32(dt, "#size-cells", 2);
 937
 938         /* /memory */
 939         dt_start_node(dt, "memory@0");
 940         dt_prop_str(dt, "name", "memory");
 941         dt_prop_str(dt, "device_type", "memory");
 942         tmp[0] = 0;
 943         tmp[1] = phys_mem_size;
 944         dt_prop_u64_list(dt, "reg", tmp, 2);
 945         dt_end_node(dt);
 946
 947         /* /chosen */
 948         dt_start_node(dt, "chosen");
 949         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
 950         if (cmd_mem_limit)
 951                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
 952         dt_end_node(dt);
 953
 954         dt_cpus(dt);
 955
 956         dt_end_node(dt);
 957
 958         dt_push_u32(dt, OF_DT_END);
 959 }
 960
 961 void * __init iSeries_early_setup(void)
 962 {
 963         unsigned long phys_mem_size;
 964
 965         iSeries_fixup_klimit();
 966
 967         /*
 968          * Initialize the table which translate Linux physical addresses to
 969          * AS/400 absolute addresses
 970          */
 971         phys_mem_size = build_iSeries_Memory_Map();
 972
 973         iSeries_get_cmdline();
 974
 975         /* Save unparsed command line copy for /proc/cmdline */
 976         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 977
 978         /* Parse early parameters, in particular mem=x */
 979         parse_early_param();
 980
 981         build_flat_dt(&iseries_dt, phys_mem_size);
 982
 983         return (void *) __pa(&iseries_dt);
 984 }
 985
 986 /*
 987  * On iSeries we just parse the mem=X option from the command line.
 988  * On pSeries it's a bit more complicated, see prom_init_mem()
 989  */
 990 static int __init early_parsemem(char *p)
 991 {
 992         if (p)
 993                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
 994         return 0;
 995 }
 996 early_param("mem", early_parsemem);