2 * linux/drivers/ide/pci/atiixp.c Version 0.02 Jun 16 2007
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
8 #include <linux/types.h>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/ioport.h>
12 #include <linux/pci.h>
13 #include <linux/hdreg.h>
14 #include <linux/ide.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
20 #define ATIIXP_IDE_PIO_TIMING 0x40
21 #define ATIIXP_IDE_MDMA_TIMING 0x44
22 #define ATIIXP_IDE_PIO_CONTROL 0x48
23 #define ATIIXP_IDE_PIO_MODE 0x4a
24 #define ATIIXP_IDE_UDMA_CONTROL 0x54
25 #define ATIIXP_IDE_UDMA_MODE 0x56
32 static atiixp_ide_timing pio_timing[] = {
40 static atiixp_ide_timing mdma_timing[] = {
46 static int save_mdma_mode[4];
48 static DEFINE_SPINLOCK(atiixp_lock);
51 * atiixp_dma_2_pio - return the PIO mode matching DMA
52 * @xfer_rate: transfer speed
54 * Returns the nearest equivalent PIO timing for the PIO or DMA
55 * mode requested by the controller.
58 static u8 atiixp_dma_2_pio(u8 xfer_rate) {
87 static void atiixp_dma_host_on(ide_drive_t *drive)
89 struct pci_dev *dev = drive->hwif->pci_dev;
93 spin_lock_irqsave(&atiixp_lock, flags);
95 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
96 if (save_mdma_mode[drive->dn])
97 tmp16 &= ~(1 << drive->dn);
99 tmp16 |= (1 << drive->dn);
100 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
102 spin_unlock_irqrestore(&atiixp_lock, flags);
104 ide_dma_host_on(drive);
107 static void atiixp_dma_host_off(ide_drive_t *drive)
109 struct pci_dev *dev = drive->hwif->pci_dev;
113 spin_lock_irqsave(&atiixp_lock, flags);
115 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
116 tmp16 &= ~(1 << drive->dn);
117 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
119 spin_unlock_irqrestore(&atiixp_lock, flags);
121 ide_dma_host_off(drive);
125 * atiixp_tune_pio - tune a drive attached to a ATIIXP
126 * @drive: drive to tune
127 * @pio: desired PIO mode
129 * Set the interface PIO mode.
132 static void atiixp_tune_pio(ide_drive_t *drive, u8 pio)
134 struct pci_dev *dev = drive->hwif->pci_dev;
136 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
140 spin_lock_irqsave(&atiixp_lock, flags);
142 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
143 pio_mode_data &= ~(0x07 << (drive->dn * 4));
144 pio_mode_data |= (pio << (drive->dn * 4));
145 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
147 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
148 pio_timing_data &= ~(0xff << timing_shift);
149 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
150 (pio_timing[pio].command_width << (timing_shift + 4));
151 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
153 spin_unlock_irqrestore(&atiixp_lock, flags);
156 static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
158 pio = ide_get_best_pio_mode(drive, pio, 4);
159 atiixp_tune_pio(drive, pio);
160 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
164 * atiixp_tune_chipset - tune a ATIIXP interface
165 * @drive: IDE drive to tune
166 * @speed: speed to configure
168 * Set a ATIIXP interface channel to the desired speeds. This involves
169 * requires the right timing data into the ATIIXP configuration space
170 * then setting the drive parameters appropriately
173 static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)
175 struct pci_dev *dev = drive->hwif->pci_dev;
177 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
182 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
183 atiixp_tune_pio(drive, speed - XFER_PIO_0);
184 return ide_config_drive_speed(drive, speed);
187 spin_lock_irqsave(&atiixp_lock, flags);
189 save_mdma_mode[drive->dn] = 0;
190 if (speed >= XFER_UDMA_0) {
191 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
192 tmp16 &= ~(0x07 << (drive->dn * 4));
193 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
194 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
196 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
197 save_mdma_mode[drive->dn] = speed;
198 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
199 tmp32 &= ~(0xff << timing_shift);
200 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
201 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
202 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
206 spin_unlock_irqrestore(&atiixp_lock, flags);
208 if (speed >= XFER_SW_DMA_0)
209 pio = atiixp_dma_2_pio(speed);
211 pio = speed - XFER_PIO_0;
213 atiixp_tune_pio(drive, pio);
215 return ide_config_drive_speed(drive, speed);
219 * atiixp_dma_check - set up an IDE device
220 * @drive: IDE drive to configure
222 * Set up the ATIIXP interface for the best available speed on this
223 * interface, preferring DMA to PIO.
226 static int atiixp_dma_check(ide_drive_t *drive)
228 drive->init_speed = 0;
230 if (ide_tune_dma(drive))
233 if (ide_use_fast_pio(drive))
234 atiixp_tuneproc(drive, 255);
240 * init_hwif_atiixp - fill in the hwif for the ATIIXP
241 * @hwif: IDE interface
243 * Set up the ide_hwif_t for the ATIIXP interface according to the
244 * capabilities of the hardware.
247 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
250 u8 ch = hwif->channel;
251 struct pci_dev *pdev = hwif->pci_dev;
254 hwif->irq = ch ? 15 : 14;
257 hwif->tuneproc = &atiixp_tuneproc;
258 hwif->speedproc = &atiixp_speedproc;
259 hwif->drives[0].autotune = 1;
260 hwif->drives[1].autotune = 1;
266 hwif->ultra_mask = 0x3f;
267 hwif->mwdma_mask = 0x06;
268 hwif->swdma_mask = 0x04;
270 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
272 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
273 hwif->cbl = ATA_CBL_PATA80;
275 hwif->cbl = ATA_CBL_PATA40;
277 hwif->dma_host_on = &atiixp_dma_host_on;
278 hwif->dma_host_off = &atiixp_dma_host_off;
279 hwif->ide_dma_check = &atiixp_dma_check;
283 hwif->drives[1].autodma = hwif->autodma;
284 hwif->drives[0].autodma = hwif->autodma;
288 static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
291 .init_hwif = init_hwif_atiixp,
293 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
294 .bootable = ON_BOARD,
295 .pio_mask = ATA_PIO4,
297 .name = "SB600_PATA",
298 .init_hwif = init_hwif_atiixp,
300 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
301 .bootable = ON_BOARD,
302 .host_flags = IDE_HFLAG_SINGLE,
303 .pio_mask = ATA_PIO4,
308 * atiixp_init_one - called when a ATIIXP is found
309 * @dev: the atiixp device
310 * @id: the matching pci id
312 * Called when the PCI registration layer (or the IDE initialization)
313 * finds a device matching our IDE device tables.
316 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
318 return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
321 static struct pci_device_id atiixp_pci_tbl[] = {
322 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
323 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
324 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
325 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
326 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
329 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
331 static struct pci_driver driver = {
332 .name = "ATIIXP_IDE",
333 .id_table = atiixp_pci_tbl,
334 .probe = atiixp_init_one,
337 static int __init atiixp_ide_init(void)
339 return ide_pci_register_driver(&driver);
342 module_init(atiixp_ide_init);
344 MODULE_AUTHOR("HUI YU");
345 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
346 MODULE_LICENSE("GPL");