Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-2.6-nmw
[linux-2.6] / arch / powerpc / platforms / celleb / setup.c
1 /*
2  * Celleb setup code
3  *
4  * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5  *
6  * This code is based on arch/powerpc/platforms/cell/setup.c:
7  *  Copyright (C) 1995  Linus Torvalds
8  *  Adapted from 'alpha' version by Gary Thomas
9  *  Modified by Cort Dougan (cort@cs.nmt.edu)
10  *  Modified by PPC64 Team, IBM Corp
11  *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License along
24  * with this program; if not, write to the Free Software Foundation, Inc.,
25  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26  */
27
28 #undef DEBUG
29
30 #include <linux/cpu.h>
31 #include <linux/sched.h>
32 #include <linux/kernel.h>
33 #include <linux/mm.h>
34 #include <linux/stddef.h>
35 #include <linux/unistd.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/delay.h>
39 #include <linux/irq.h>
40 #include <linux/seq_file.h>
41 #include <linux/root_dev.h>
42 #include <linux/console.h>
43
44 #include <asm/mmu.h>
45 #include <asm/processor.h>
46 #include <asm/io.h>
47 #include <asm/kexec.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/cputable.h>
51 #include <asm/irq.h>
52 #include <asm/spu_priv1.h>
53 #include <asm/firmware.h>
54 #include <asm/of_platform.h>
55
56 #include "interrupt.h"
57 #include "beat_wrapper.h"
58 #include "beat.h"
59 #include "pci.h"
60
61 static char celleb_machine_type[128] = "Celleb";
62
63 static void celleb_show_cpuinfo(struct seq_file *m)
64 {
65         struct device_node *root;
66         const char *model = "";
67
68         root = of_find_node_by_path("/");
69         if (root)
70                 model = of_get_property(root, "model", NULL);
71         /* using "CHRP" is to trick anaconda into installing FCx into Celleb */
72         seq_printf(m, "machine\t\t: %s %s\n", celleb_machine_type, model);
73         of_node_put(root);
74 }
75
76 static int __init celleb_machine_type_hack(char *ptr)
77 {
78         strncpy(celleb_machine_type, ptr, sizeof(celleb_machine_type));
79         celleb_machine_type[sizeof(celleb_machine_type)-1] = 0;
80         return 0;
81 }
82
83 __setup("celleb_machine_type_hack=", celleb_machine_type_hack);
84
85 static void celleb_progress(char *s, unsigned short hex)
86 {
87         printk("*** %04x : %s\n", hex, s ? s : "");
88 }
89
90 static void __init celleb_setup_arch(void)
91 {
92 #ifdef CONFIG_SPU_BASE
93         spu_priv1_ops = &spu_priv1_beat_ops;
94         spu_management_ops = &spu_management_of_ops;
95 #endif
96
97 #ifdef CONFIG_SMP
98         smp_init_celleb();
99 #endif
100
101         /* init to some ~sane value until calibrate_delay() runs */
102         loops_per_jiffy = 50000000;
103
104 #ifdef CONFIG_DUMMY_CONSOLE
105         conswitchp = &dummy_con;
106 #endif
107 }
108
109 static int __init celleb_probe(void)
110 {
111         unsigned long root = of_get_flat_dt_root();
112
113         if (!of_flat_dt_is_compatible(root, "Beat"))
114                 return 0;
115
116         powerpc_firmware_features |= FW_FEATURE_CELLEB_POSSIBLE;
117         hpte_init_beat_v3();
118         return 1;
119 }
120
121 static struct of_device_id celleb_bus_ids[] __initdata = {
122         { .type = "scc", },
123         { .type = "ioif", },    /* old style */
124         {},
125 };
126
127 static int __init celleb_publish_devices(void)
128 {
129         if (!machine_is(celleb))
130                 return 0;
131
132         /* Publish OF platform devices for southbridge IOs */
133         of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
134
135         celleb_pci_workaround_init();
136
137         return 0;
138 }
139 device_initcall(celleb_publish_devices);
140
141 define_machine(celleb) {
142         .name                   = "Cell Reference Set",
143         .probe                  = celleb_probe,
144         .setup_arch             = celleb_setup_arch,
145         .show_cpuinfo           = celleb_show_cpuinfo,
146         .restart                = beat_restart,
147         .power_off              = beat_power_off,
148         .halt                   = beat_halt,
149         .get_rtc_time           = beat_get_rtc_time,
150         .set_rtc_time           = beat_set_rtc_time,
151         .calibrate_decr         = generic_calibrate_decr,
152         .progress               = celleb_progress,
153         .power_save             = beat_power_save,
154         .nvram_size             = beat_nvram_get_size,
155         .nvram_read             = beat_nvram_read,
156         .nvram_write            = beat_nvram_write,
157         .set_dabr               = beat_set_xdabr,
158         .init_IRQ               = beatic_init_IRQ,
159         .get_irq                = beatic_get_irq,
160         .pci_probe_mode         = celleb_pci_probe_mode,
161         .pci_setup_phb          = celleb_setup_phb,
162 #ifdef CONFIG_KEXEC
163         .kexec_cpu_down         = beat_kexec_cpu_down,
164         .machine_kexec          = default_machine_kexec,
165         .machine_kexec_prepare  = default_machine_kexec_prepare,
166         .machine_crash_shutdown = default_machine_crash_shutdown,
167 #endif
168 };