2 * include/asm-arm/arch-at91rm9200/pio.h
4 * Copyright (C) 2003 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #ifndef __ASM_ARCH_PIO_H
14 #define __ASM_ARCH_PIO_H
16 #include <asm/arch/hardware.h>
18 static inline void AT91_CfgPIO_USART0(void) {
19 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA17_TXD0 | AT91_PA18_RXD0 | AT91_PA20_CTS0);
22 * Errata #39 - RTS0 is not internally connected to PA21. We need to drive
23 * the pin manually. Default is off (RTS is active low).
25 at91_sys_write(AT91_PIOA + PIO_PER, AT91_PA21_RTS0);
26 at91_sys_write(AT91_PIOA + PIO_OER, AT91_PA21_RTS0);
27 at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0);
30 static inline void AT91_CfgPIO_USART1(void) {
31 at91_sys_write(AT91_PIOB + PIO_PDR, AT91_PB18_RI1 | AT91_PB19_DTR1
32 | AT91_PB20_TXD1 | AT91_PB21_RXD1 | AT91_PB23_DCD1
33 | AT91_PB24_CTS1 | AT91_PB25_DSR1 | AT91_PB26_RTS1);
36 static inline void AT91_CfgPIO_USART2(void) {
37 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA22_RXD2 | AT91_PA23_TXD2);
40 static inline void AT91_CfgPIO_USART3(void) {
41 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_TXD3 | AT91_PA6_RXD3);
42 at91_sys_write(AT91_PIOA + PIO_BSR, AT91_PA5_TXD3 | AT91_PA6_RXD3);
45 static inline void AT91_CfgPIO_DBGU(void) {
46 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA31_DTXD | AT91_PA30_DRXD);
50 * Enable the Two-Wire interface.
52 static inline void AT91_CfgPIO_TWI(void) {
53 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA25_TWD | AT91_PA26_TWCK);
54 at91_sys_write(AT91_PIOA + PIO_ASR, AT91_PA25_TWD | AT91_PA26_TWCK);
55 at91_sys_write(AT91_PIOA + PIO_MDER, AT91_PA25_TWD | AT91_PA26_TWCK); /* open drain */
59 * Enable the Serial Peripheral Interface.
61 static inline void AT91_CfgPIO_SPI(void) {
62 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA0_MISO | AT91_PA1_MOSI | AT91_PA2_SPCK);
65 static inline void AT91_CfgPIO_SPI_CS0(void) {
66 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA3_NPCS0);
69 static inline void AT91_CfgPIO_SPI_CS1(void) {
70 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA4_NPCS1);
73 static inline void AT91_CfgPIO_SPI_CS2(void) {
74 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_NPCS2);
77 static inline void AT91_CfgPIO_SPI_CS3(void) {
78 at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA6_NPCS3);
82 * Select the DataFlash card.
84 static inline void AT91_CfgPIO_DataFlashCard(void) {
85 at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(7));
86 at91_sys_write(AT91_PIOB + PIO_OER, AT91_PIO_P(7));
87 at91_sys_write(AT91_PIOB + PIO_CODR, AT91_PIO_P(7));
91 * Enable NAND Flash (SmartMedia) interface.
93 static inline void AT91_CfgPIO_SmartMedia(void) {
94 /* enable PC0=SMCE, PC1=SMOE, PC3=SMWE, A21=CLE, A22=ALE */
95 at91_sys_write(AT91_PIOC + PIO_ASR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE);
96 at91_sys_write(AT91_PIOC + PIO_PDR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE);
98 /* Configure PC2 as input (signal READY of the SmartMedia) */
99 at91_sys_write(AT91_PIOC + PIO_PER, AT91_PC2_BFAVD); /* enable direct output enable */
100 at91_sys_write(AT91_PIOC + PIO_ODR, AT91_PC2_BFAVD); /* disable output */
102 /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
103 at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(1)); /* enable direct output enable */
104 at91_sys_write(AT91_PIOB + PIO_ODR, AT91_PIO_P(1)); /* disable output */
107 static inline int AT91_PIO_SmartMedia_RDY(void) {
108 return (at91_sys_read(AT91_PIOC + PIO_PDSR) & AT91_PIO_P(2)) ? 1 : 0;
111 static inline int AT91_PIO_SmartMedia_CardDetect(void) {
112 return (at91_sys_read(AT91_PIOB + PIO_PDSR) & AT91_PIO_P(1)) ? 1 : 0;