[SPARC64] auxio: Remove asm/{sbus,ebus}.h includes.
[linux-2.6] / arch / sparc64 / kernel / prom.c
1 /*
2  * Procedures for creating, accessing and interpreting the device tree.
3  *
4  * Paul Mackerras       August 1996.
5  * Copyright (C) 1996-2005 Paul Mackerras.
6  * 
7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8  *    {engebret|bergner}@us.ibm.com 
9  *
10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
11  *
12  *      This program is free software; you can redistribute it and/or
13  *      modify it under the terms of the GNU General Public License
14  *      as published by the Free Software Foundation; either version
15  *      2 of the License, or (at your option) any later version.
16  */
17
18 #include <linux/config.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/mm.h>
23 #include <linux/bootmem.h>
24 #include <linux/module.h>
25
26 #include <asm/prom.h>
27 #include <asm/of_device.h>
28 #include <asm/oplib.h>
29 #include <asm/irq.h>
30 #include <asm/asi.h>
31 #include <asm/upa.h>
32
33 static struct device_node *allnodes;
34
35 /* use when traversing tree through the allnext, child, sibling,
36  * or parent members of struct device_node.
37  */
38 static DEFINE_RWLOCK(devtree_lock);
39
40 int of_device_is_compatible(struct device_node *device, const char *compat)
41 {
42         const char* cp;
43         int cplen, l;
44
45         cp = (char *) of_get_property(device, "compatible", &cplen);
46         if (cp == NULL)
47                 return 0;
48         while (cplen > 0) {
49                 if (strncmp(cp, compat, strlen(compat)) == 0)
50                         return 1;
51                 l = strlen(cp) + 1;
52                 cp += l;
53                 cplen -= l;
54         }
55
56         return 0;
57 }
58 EXPORT_SYMBOL(of_device_is_compatible);
59
60 struct device_node *of_get_parent(const struct device_node *node)
61 {
62         struct device_node *np;
63
64         if (!node)
65                 return NULL;
66
67         np = node->parent;
68
69         return np;
70 }
71 EXPORT_SYMBOL(of_get_parent);
72
73 struct device_node *of_get_next_child(const struct device_node *node,
74         struct device_node *prev)
75 {
76         struct device_node *next;
77
78         next = prev ? prev->sibling : node->child;
79         for (; next != 0; next = next->sibling) {
80                 break;
81         }
82
83         return next;
84 }
85 EXPORT_SYMBOL(of_get_next_child);
86
87 struct device_node *of_find_node_by_path(const char *path)
88 {
89         struct device_node *np = allnodes;
90
91         for (; np != 0; np = np->allnext) {
92                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
93                         break;
94         }
95
96         return np;
97 }
98 EXPORT_SYMBOL(of_find_node_by_path);
99
100 struct device_node *of_find_node_by_phandle(phandle handle)
101 {
102         struct device_node *np;
103
104         for (np = allnodes; np != 0; np = np->allnext)
105                 if (np->node == handle)
106                         break;
107
108         return np;
109 }
110 EXPORT_SYMBOL(of_find_node_by_phandle);
111
112 struct device_node *of_find_node_by_name(struct device_node *from,
113         const char *name)
114 {
115         struct device_node *np;
116
117         np = from ? from->allnext : allnodes;
118         for (; np != NULL; np = np->allnext)
119                 if (np->name != NULL && strcmp(np->name, name) == 0)
120                         break;
121
122         return np;
123 }
124 EXPORT_SYMBOL(of_find_node_by_name);
125
126 struct device_node *of_find_node_by_type(struct device_node *from,
127         const char *type)
128 {
129         struct device_node *np;
130
131         np = from ? from->allnext : allnodes;
132         for (; np != 0; np = np->allnext)
133                 if (np->type != 0 && strcmp(np->type, type) == 0)
134                         break;
135
136         return np;
137 }
138 EXPORT_SYMBOL(of_find_node_by_type);
139
140 struct device_node *of_find_compatible_node(struct device_node *from,
141         const char *type, const char *compatible)
142 {
143         struct device_node *np;
144
145         np = from ? from->allnext : allnodes;
146         for (; np != 0; np = np->allnext) {
147                 if (type != NULL
148                     && !(np->type != 0 && strcmp(np->type, type) == 0))
149                         continue;
150                 if (of_device_is_compatible(np, compatible))
151                         break;
152         }
153
154         return np;
155 }
156 EXPORT_SYMBOL(of_find_compatible_node);
157
158 struct property *of_find_property(struct device_node *np, const char *name,
159                                   int *lenp)
160 {
161         struct property *pp;
162
163         for (pp = np->properties; pp != 0; pp = pp->next) {
164                 if (strcmp(pp->name, name) == 0) {
165                         if (lenp != 0)
166                                 *lenp = pp->length;
167                         break;
168                 }
169         }
170         return pp;
171 }
172 EXPORT_SYMBOL(of_find_property);
173
174 /*
175  * Find a property with a given name for a given node
176  * and return the value.
177  */
178 void *of_get_property(struct device_node *np, const char *name, int *lenp)
179 {
180         struct property *pp = of_find_property(np,name,lenp);
181         return pp ? pp->value : NULL;
182 }
183 EXPORT_SYMBOL(of_get_property);
184
185 int of_getintprop_default(struct device_node *np, const char *name, int def)
186 {
187         struct property *prop;
188         int len;
189
190         prop = of_find_property(np, name, &len);
191         if (!prop || len != 4)
192                 return def;
193
194         return *(int *) prop->value;
195 }
196 EXPORT_SYMBOL(of_getintprop_default);
197
198 int of_n_addr_cells(struct device_node *np)
199 {
200         int* ip;
201         do {
202                 if (np->parent)
203                         np = np->parent;
204                 ip = of_get_property(np, "#address-cells", NULL);
205                 if (ip != NULL)
206                         return *ip;
207         } while (np->parent);
208         /* No #address-cells property for the root node, default to 2 */
209         return 2;
210 }
211 EXPORT_SYMBOL(of_n_addr_cells);
212
213 int of_n_size_cells(struct device_node *np)
214 {
215         int* ip;
216         do {
217                 if (np->parent)
218                         np = np->parent;
219                 ip = of_get_property(np, "#size-cells", NULL);
220                 if (ip != NULL)
221                         return *ip;
222         } while (np->parent);
223         /* No #size-cells property for the root node, default to 1 */
224         return 1;
225 }
226 EXPORT_SYMBOL(of_n_size_cells);
227
228 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
229 {
230         struct property **prevp;
231         void *new_val;
232         int err;
233
234         new_val = kmalloc(len, GFP_KERNEL);
235         if (!new_val)
236                 return -ENOMEM;
237
238         memcpy(new_val, val, len);
239
240         err = -ENODEV;
241
242         write_lock(&devtree_lock);
243         prevp = &dp->properties;
244         while (*prevp) {
245                 struct property *prop = *prevp;
246
247                 if (!strcmp(prop->name, name)) {
248                         void *old_val = prop->value;
249                         int ret;
250
251                         ret = prom_setprop(dp->node, name, val, len);
252                         err = -EINVAL;
253                         if (ret >= 0) {
254                                 prop->value = new_val;
255                                 prop->length = len;
256
257                                 if (OF_IS_DYNAMIC(prop))
258                                         kfree(old_val);
259
260                                 OF_MARK_DYNAMIC(prop);
261
262                                 err = 0;
263                         }
264                         break;
265                 }
266                 prevp = &(*prevp)->next;
267         }
268         write_unlock(&devtree_lock);
269
270         /* XXX Upate procfs if necessary... */
271
272         return err;
273 }
274 EXPORT_SYMBOL(of_set_property);
275
276 static unsigned int prom_early_allocated;
277
278 static void * __init prom_early_alloc(unsigned long size)
279 {
280         void *ret;
281
282         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
283         if (ret != NULL)
284                 memset(ret, 0, size);
285
286         prom_early_allocated += size;
287
288         return ret;
289 }
290
291 #ifdef CONFIG_PCI
292 /* PSYCHO interrupt mapping support. */
293 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
294 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
295 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
296 {
297         unsigned int bus =  (ino & 0x10) >> 4;
298         unsigned int slot = (ino & 0x0c) >> 2;
299
300         if (bus == 0)
301                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
302         else
303                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
304 }
305
306 #define PSYCHO_IMAP_SCSI        0x1000UL
307 #define PSYCHO_IMAP_ETH         0x1008UL
308 #define PSYCHO_IMAP_BPP         0x1010UL
309 #define PSYCHO_IMAP_AU_REC      0x1018UL
310 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
311 #define PSYCHO_IMAP_PFAIL       0x1028UL
312 #define PSYCHO_IMAP_KMS         0x1030UL
313 #define PSYCHO_IMAP_FLPY        0x1038UL
314 #define PSYCHO_IMAP_SHW         0x1040UL
315 #define PSYCHO_IMAP_KBD         0x1048UL
316 #define PSYCHO_IMAP_MS          0x1050UL
317 #define PSYCHO_IMAP_SER         0x1058UL
318 #define PSYCHO_IMAP_TIM0        0x1060UL
319 #define PSYCHO_IMAP_TIM1        0x1068UL
320 #define PSYCHO_IMAP_UE          0x1070UL
321 #define PSYCHO_IMAP_CE          0x1078UL
322 #define PSYCHO_IMAP_A_ERR       0x1080UL
323 #define PSYCHO_IMAP_B_ERR       0x1088UL
324 #define PSYCHO_IMAP_PMGMT       0x1090UL
325 #define PSYCHO_IMAP_GFX         0x1098UL
326 #define PSYCHO_IMAP_EUPA        0x10a0UL
327
328 static unsigned long __psycho_onboard_imap_off[] = {
329 /*0x20*/        PSYCHO_IMAP_SCSI,
330 /*0x21*/        PSYCHO_IMAP_ETH,
331 /*0x22*/        PSYCHO_IMAP_BPP,
332 /*0x23*/        PSYCHO_IMAP_AU_REC,
333 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
334 /*0x25*/        PSYCHO_IMAP_PFAIL,
335 /*0x26*/        PSYCHO_IMAP_KMS,
336 /*0x27*/        PSYCHO_IMAP_FLPY,
337 /*0x28*/        PSYCHO_IMAP_SHW,
338 /*0x29*/        PSYCHO_IMAP_KBD,
339 /*0x2a*/        PSYCHO_IMAP_MS,
340 /*0x2b*/        PSYCHO_IMAP_SER,
341 /*0x2c*/        PSYCHO_IMAP_TIM0,
342 /*0x2d*/        PSYCHO_IMAP_TIM1,
343 /*0x2e*/        PSYCHO_IMAP_UE,
344 /*0x2f*/        PSYCHO_IMAP_CE,
345 /*0x30*/        PSYCHO_IMAP_A_ERR,
346 /*0x31*/        PSYCHO_IMAP_B_ERR,
347 /*0x32*/        PSYCHO_IMAP_PMGMT
348 };
349 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
350 #define PSYCHO_ONBOARD_IRQ_LAST         0x32
351 #define psycho_onboard_imap_offset(__ino) \
352         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
353
354 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
355 #define PSYCHO_ICLR_SCSI        0x1800UL
356
357 #define psycho_iclr_offset(ino)                                       \
358         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
359                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
360
361 static unsigned int psycho_irq_build(struct device_node *dp,
362                                      unsigned int ino,
363                                      void *_data)
364 {
365         unsigned long controller_regs = (unsigned long) _data;
366         unsigned long imap, iclr;
367         unsigned long imap_off, iclr_off;
368         int inofixup = 0;
369
370         ino &= 0x3f;
371         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
372                 /* PCI slot */
373                 imap_off = psycho_pcislot_imap_offset(ino);
374         } else {
375                 /* Onboard device */
376                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
377                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
378                         prom_halt();
379                 }
380                 imap_off = psycho_onboard_imap_offset(ino);
381         }
382
383         /* Now build the IRQ bucket. */
384         imap = controller_regs + imap_off;
385         imap += 4;
386
387         iclr_off = psycho_iclr_offset(ino);
388         iclr = controller_regs + iclr_off;
389         iclr += 4;
390
391         if ((ino & 0x20) == 0)
392                 inofixup = ino & 0x03;
393
394         return build_irq(inofixup, iclr, imap);
395 }
396
397 static void psycho_irq_trans_init(struct device_node *dp)
398 {
399         struct linux_prom64_registers *regs;
400
401         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
402         dp->irq_trans->irq_build = psycho_irq_build;
403
404         regs = of_get_property(dp, "reg", NULL);
405         dp->irq_trans->data = (void *) regs[2].phys_addr;
406 }
407
408 #define sabre_read(__reg) \
409 ({      u64 __ret; \
410         __asm__ __volatile__("ldxa [%1] %2, %0" \
411                              : "=r" (__ret) \
412                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
413                              : "memory"); \
414         __ret; \
415 })
416
417 struct sabre_irq_data {
418         unsigned long controller_regs;
419         unsigned int pci_first_busno;
420 };
421 #define SABRE_CONFIGSPACE       0x001000000UL
422 #define SABRE_WRSYNC            0x1c20UL
423
424 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
425         (CONFIG_SPACE | (1UL << 24))
426 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
427         (((unsigned long)(BUS)   << 16) |       \
428          ((unsigned long)(DEVFN) << 8)  |       \
429          ((unsigned long)(REG)))
430
431 /* When a device lives behind a bridge deeper in the PCI bus topology
432  * than APB, a special sequence must run to make sure all pending DMA
433  * transfers at the time of IRQ delivery are visible in the coherency
434  * domain by the cpu.  This sequence is to perform a read on the far
435  * side of the non-APB bridge, then perform a read of Sabre's DMA
436  * write-sync register.
437  */
438 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
439 {
440         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
441         struct sabre_irq_data *irq_data = _arg2;
442         unsigned long controller_regs = irq_data->controller_regs;
443         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
444         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
445         unsigned int bus, devfn;
446         u16 _unused;
447
448         config_space = SABRE_CONFIG_BASE(config_space);
449
450         bus = (phys_hi >> 16) & 0xff;
451         devfn = (phys_hi >> 8) & 0xff;
452
453         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
454
455         __asm__ __volatile__("membar #Sync\n\t"
456                              "lduha [%1] %2, %0\n\t"
457                              "membar #Sync"
458                              : "=r" (_unused)
459                              : "r" ((u16 *) config_space),
460                                "i" (ASI_PHYS_BYPASS_EC_E_L)
461                              : "memory");
462
463         sabre_read(sync_reg);
464 }
465
466 #define SABRE_IMAP_A_SLOT0      0x0c00UL
467 #define SABRE_IMAP_B_SLOT0      0x0c20UL
468 #define SABRE_IMAP_SCSI         0x1000UL
469 #define SABRE_IMAP_ETH          0x1008UL
470 #define SABRE_IMAP_BPP          0x1010UL
471 #define SABRE_IMAP_AU_REC       0x1018UL
472 #define SABRE_IMAP_AU_PLAY      0x1020UL
473 #define SABRE_IMAP_PFAIL        0x1028UL
474 #define SABRE_IMAP_KMS          0x1030UL
475 #define SABRE_IMAP_FLPY         0x1038UL
476 #define SABRE_IMAP_SHW          0x1040UL
477 #define SABRE_IMAP_KBD          0x1048UL
478 #define SABRE_IMAP_MS           0x1050UL
479 #define SABRE_IMAP_SER          0x1058UL
480 #define SABRE_IMAP_UE           0x1070UL
481 #define SABRE_IMAP_CE           0x1078UL
482 #define SABRE_IMAP_PCIERR       0x1080UL
483 #define SABRE_IMAP_GFX          0x1098UL
484 #define SABRE_IMAP_EUPA         0x10a0UL
485 #define SABRE_ICLR_A_SLOT0      0x1400UL
486 #define SABRE_ICLR_B_SLOT0      0x1480UL
487 #define SABRE_ICLR_SCSI         0x1800UL
488 #define SABRE_ICLR_ETH          0x1808UL
489 #define SABRE_ICLR_BPP          0x1810UL
490 #define SABRE_ICLR_AU_REC       0x1818UL
491 #define SABRE_ICLR_AU_PLAY      0x1820UL
492 #define SABRE_ICLR_PFAIL        0x1828UL
493 #define SABRE_ICLR_KMS          0x1830UL
494 #define SABRE_ICLR_FLPY         0x1838UL
495 #define SABRE_ICLR_SHW          0x1840UL
496 #define SABRE_ICLR_KBD          0x1848UL
497 #define SABRE_ICLR_MS           0x1850UL
498 #define SABRE_ICLR_SER          0x1858UL
499 #define SABRE_ICLR_UE           0x1870UL
500 #define SABRE_ICLR_CE           0x1878UL
501 #define SABRE_ICLR_PCIERR       0x1880UL
502
503 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
504 {
505         unsigned int bus =  (ino & 0x10) >> 4;
506         unsigned int slot = (ino & 0x0c) >> 2;
507
508         if (bus == 0)
509                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
510         else
511                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
512 }
513
514 static unsigned long __sabre_onboard_imap_off[] = {
515 /*0x20*/        SABRE_IMAP_SCSI,
516 /*0x21*/        SABRE_IMAP_ETH,
517 /*0x22*/        SABRE_IMAP_BPP,
518 /*0x23*/        SABRE_IMAP_AU_REC,
519 /*0x24*/        SABRE_IMAP_AU_PLAY,
520 /*0x25*/        SABRE_IMAP_PFAIL,
521 /*0x26*/        SABRE_IMAP_KMS,
522 /*0x27*/        SABRE_IMAP_FLPY,
523 /*0x28*/        SABRE_IMAP_SHW,
524 /*0x29*/        SABRE_IMAP_KBD,
525 /*0x2a*/        SABRE_IMAP_MS,
526 /*0x2b*/        SABRE_IMAP_SER,
527 /*0x2c*/        0 /* reserved */,
528 /*0x2d*/        0 /* reserved */,
529 /*0x2e*/        SABRE_IMAP_UE,
530 /*0x2f*/        SABRE_IMAP_CE,
531 /*0x30*/        SABRE_IMAP_PCIERR,
532 };
533 #define SABRE_ONBOARD_IRQ_BASE          0x20
534 #define SABRE_ONBOARD_IRQ_LAST          0x30
535 #define sabre_onboard_imap_offset(__ino) \
536         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
537
538 #define sabre_iclr_offset(ino)                                        \
539         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
540                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
541
542 static unsigned int sabre_irq_build(struct device_node *dp,
543                                     unsigned int ino,
544                                     void *_data)
545 {
546         struct sabre_irq_data *irq_data = _data;
547         unsigned long controller_regs = irq_data->controller_regs;
548         struct linux_prom_pci_registers *regs;
549         unsigned long imap, iclr;
550         unsigned long imap_off, iclr_off;
551         int inofixup = 0;
552         int virt_irq;
553
554         ino &= 0x3f;
555         if (ino < SABRE_ONBOARD_IRQ_BASE) {
556                 /* PCI slot */
557                 imap_off = sabre_pcislot_imap_offset(ino);
558         } else {
559                 /* onboard device */
560                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
561                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
562                         prom_halt();
563                 }
564                 imap_off = sabre_onboard_imap_offset(ino);
565         }
566
567         /* Now build the IRQ bucket. */
568         imap = controller_regs + imap_off;
569         imap += 4;
570
571         iclr_off = sabre_iclr_offset(ino);
572         iclr = controller_regs + iclr_off;
573         iclr += 4;
574
575         if ((ino & 0x20) == 0)
576                 inofixup = ino & 0x03;
577
578         virt_irq = build_irq(inofixup, iclr, imap);
579
580         regs = of_get_property(dp, "reg", NULL);
581         if (regs &&
582             ((regs->phys_hi >> 16) & 0xff) != irq_data->pci_first_busno) {
583                 irq_install_pre_handler(virt_irq,
584                                         sabre_wsync_handler,
585                                         (void *) (long) regs->phys_hi,
586                                         (void *)
587                                         controller_regs +
588                                         SABRE_WRSYNC);
589         }
590
591         return virt_irq;
592 }
593
594 static void sabre_irq_trans_init(struct device_node *dp)
595 {
596         struct linux_prom64_registers *regs;
597         struct sabre_irq_data *irq_data;
598         u32 *busrange;
599
600         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
601         dp->irq_trans->irq_build = sabre_irq_build;
602
603         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
604
605         regs = of_get_property(dp, "reg", NULL);
606         irq_data->controller_regs = regs[0].phys_addr;
607
608         busrange = of_get_property(dp, "bus-range", NULL);
609         irq_data->pci_first_busno = busrange[0];
610
611         dp->irq_trans->data = irq_data;
612 }
613
614 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
615  * imap/iclr registers are per-PBM.
616  */
617 #define SCHIZO_IMAP_BASE        0x1000UL
618 #define SCHIZO_ICLR_BASE        0x1400UL
619
620 static unsigned long schizo_imap_offset(unsigned long ino)
621 {
622         return SCHIZO_IMAP_BASE + (ino * 8UL);
623 }
624
625 static unsigned long schizo_iclr_offset(unsigned long ino)
626 {
627         return SCHIZO_ICLR_BASE + (ino * 8UL);
628 }
629
630 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
631                                         unsigned int ino)
632 {
633         return pbm_regs + schizo_iclr_offset(ino) + 4;
634 }
635
636 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
637                                         unsigned int ino)
638 {
639         return pbm_regs + schizo_imap_offset(ino) + 4;
640 }
641
642 #define schizo_read(__reg) \
643 ({      u64 __ret; \
644         __asm__ __volatile__("ldxa [%1] %2, %0" \
645                              : "=r" (__ret) \
646                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
647                              : "memory"); \
648         __ret; \
649 })
650 #define schizo_write(__reg, __val) \
651         __asm__ __volatile__("stxa %0, [%1] %2" \
652                              : /* no outputs */ \
653                              : "r" (__val), "r" (__reg), \
654                                "i" (ASI_PHYS_BYPASS_EC_E) \
655                              : "memory")
656
657 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
658 {
659         unsigned long sync_reg = (unsigned long) _arg2;
660         u64 mask = 1UL << (ino & IMAP_INO);
661         u64 val;
662         int limit;
663
664         schizo_write(sync_reg, mask);
665
666         limit = 100000;
667         val = 0;
668         while (--limit) {
669                 val = schizo_read(sync_reg);
670                 if (!(val & mask))
671                         break;
672         }
673         if (limit <= 0) {
674                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
675                        val, mask);
676         }
677
678         if (_arg1) {
679                 static unsigned char cacheline[64]
680                         __attribute__ ((aligned (64)));
681
682                 __asm__ __volatile__("rd %%fprs, %0\n\t"
683                                      "or %0, %4, %1\n\t"
684                                      "wr %1, 0x0, %%fprs\n\t"
685                                      "stda %%f0, [%5] %6\n\t"
686                                      "wr %0, 0x0, %%fprs\n\t"
687                                      "membar #Sync"
688                                      : "=&r" (mask), "=&r" (val)
689                                      : "0" (mask), "1" (val),
690                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
691                                      "i" (ASI_BLK_COMMIT_P));
692         }
693 }
694
695 struct schizo_irq_data {
696         unsigned long pbm_regs;
697         unsigned long sync_reg;
698         u32 portid;
699         int chip_version;
700 };
701
702 static unsigned int schizo_irq_build(struct device_node *dp,
703                                      unsigned int ino,
704                                      void *_data)
705 {
706         struct schizo_irq_data *irq_data = _data;
707         unsigned long pbm_regs = irq_data->pbm_regs;
708         unsigned long imap, iclr;
709         int ign_fixup;
710         int virt_irq;
711         int is_tomatillo;
712
713         ino &= 0x3f;
714
715         /* Now build the IRQ bucket. */
716         imap = schizo_ino_to_imap(pbm_regs, ino);
717         iclr = schizo_ino_to_iclr(pbm_regs, ino);
718
719         /* On Schizo, no inofixup occurs.  This is because each
720          * INO has it's own IMAP register.  On Psycho and Sabre
721          * there is only one IMAP register for each PCI slot even
722          * though four different INOs can be generated by each
723          * PCI slot.
724          *
725          * But, for JBUS variants (essentially, Tomatillo), we have
726          * to fixup the lowest bit of the interrupt group number.
727          */
728         ign_fixup = 0;
729
730         is_tomatillo = (irq_data->sync_reg != 0UL);
731
732         if (is_tomatillo) {
733                 if (irq_data->portid & 1)
734                         ign_fixup = (1 << 6);
735         }
736
737         virt_irq = build_irq(ign_fixup, iclr, imap);
738
739         if (is_tomatillo) {
740                 irq_install_pre_handler(virt_irq,
741                                         tomatillo_wsync_handler,
742                                         ((irq_data->chip_version <= 4) ?
743                                          (void *) 1 : (void *) 0),
744                                         (void *) irq_data->sync_reg);
745         }
746
747         return virt_irq;
748 }
749
750 static void schizo_irq_trans_init(struct device_node *dp)
751 {
752         struct linux_prom64_registers *regs;
753         struct schizo_irq_data *irq_data;
754
755         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
756         dp->irq_trans->irq_build = schizo_irq_build;
757
758         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
759
760         regs = of_get_property(dp, "reg", NULL);
761         dp->irq_trans->data = irq_data;
762
763         irq_data->pbm_regs = regs[0].phys_addr;
764         irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
765         irq_data->portid = of_getintprop_default(dp, "portid", 0);
766         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
767 }
768
769 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
770                                         unsigned int devino,
771                                         void *_data)
772 {
773         u32 devhandle = (u32) (unsigned long) _data;
774
775         return sun4v_build_irq(devhandle, devino);
776 }
777
778 static void pci_sun4v_irq_trans_init(struct device_node *dp)
779 {
780         struct linux_prom64_registers *regs;
781
782         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
783         dp->irq_trans->irq_build = pci_sun4v_irq_build;
784
785         regs = of_get_property(dp, "reg", NULL);
786         dp->irq_trans->data = (void *) (unsigned long)
787                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
788 }
789 #endif /* CONFIG_PCI */
790
791 #ifdef CONFIG_SBUS
792 /* INO number to IMAP register offset for SYSIO external IRQ's.
793  * This should conform to both Sunfire/Wildfire server and Fusion
794  * desktop designs.
795  */
796 #define SYSIO_IMAP_SLOT0        0x2c04UL
797 #define SYSIO_IMAP_SLOT1        0x2c0cUL
798 #define SYSIO_IMAP_SLOT2        0x2c14UL
799 #define SYSIO_IMAP_SLOT3        0x2c1cUL
800 #define SYSIO_IMAP_SCSI         0x3004UL
801 #define SYSIO_IMAP_ETH          0x300cUL
802 #define SYSIO_IMAP_BPP          0x3014UL
803 #define SYSIO_IMAP_AUDIO        0x301cUL
804 #define SYSIO_IMAP_PFAIL        0x3024UL
805 #define SYSIO_IMAP_KMS          0x302cUL
806 #define SYSIO_IMAP_FLPY         0x3034UL
807 #define SYSIO_IMAP_SHW          0x303cUL
808 #define SYSIO_IMAP_KBD          0x3044UL
809 #define SYSIO_IMAP_MS           0x304cUL
810 #define SYSIO_IMAP_SER          0x3054UL
811 #define SYSIO_IMAP_TIM0         0x3064UL
812 #define SYSIO_IMAP_TIM1         0x306cUL
813 #define SYSIO_IMAP_UE           0x3074UL
814 #define SYSIO_IMAP_CE           0x307cUL
815 #define SYSIO_IMAP_SBERR        0x3084UL
816 #define SYSIO_IMAP_PMGMT        0x308cUL
817 #define SYSIO_IMAP_GFX          0x3094UL
818 #define SYSIO_IMAP_EUPA         0x309cUL
819
820 #define bogon     ((unsigned long) -1)
821 static unsigned long sysio_irq_offsets[] = {
822         /* SBUS Slot 0 --> 3, level 1 --> 7 */
823         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
824         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
825         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
826         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
827         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
828         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
829         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
830         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
831
832         /* Onboard devices (not relevant/used on SunFire). */
833         SYSIO_IMAP_SCSI,
834         SYSIO_IMAP_ETH,
835         SYSIO_IMAP_BPP,
836         bogon,
837         SYSIO_IMAP_AUDIO,
838         SYSIO_IMAP_PFAIL,
839         bogon,
840         bogon,
841         SYSIO_IMAP_KMS,
842         SYSIO_IMAP_FLPY,
843         SYSIO_IMAP_SHW,
844         SYSIO_IMAP_KBD,
845         SYSIO_IMAP_MS,
846         SYSIO_IMAP_SER,
847         bogon,
848         bogon,
849         SYSIO_IMAP_TIM0,
850         SYSIO_IMAP_TIM1,
851         bogon,
852         bogon,
853         SYSIO_IMAP_UE,
854         SYSIO_IMAP_CE,
855         SYSIO_IMAP_SBERR,
856         SYSIO_IMAP_PMGMT,
857 };
858
859 #undef bogon
860
861 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
862
863 /* Convert Interrupt Mapping register pointer to associated
864  * Interrupt Clear register pointer, SYSIO specific version.
865  */
866 #define SYSIO_ICLR_UNUSED0      0x3400UL
867 #define SYSIO_ICLR_SLOT0        0x340cUL
868 #define SYSIO_ICLR_SLOT1        0x344cUL
869 #define SYSIO_ICLR_SLOT2        0x348cUL
870 #define SYSIO_ICLR_SLOT3        0x34ccUL
871 static unsigned long sysio_imap_to_iclr(unsigned long imap)
872 {
873         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
874         return imap + diff;
875 }
876
877 static unsigned int sbus_of_build_irq(struct device_node *dp,
878                                       unsigned int ino,
879                                       void *_data)
880 {
881         unsigned long reg_base = (unsigned long) _data;
882         struct linux_prom_registers *regs;
883         unsigned long imap, iclr;
884         int sbus_slot = 0;
885         int sbus_level = 0;
886
887         ino &= 0x3f;
888
889         regs = of_get_property(dp, "reg", NULL);
890         if (regs)
891                 sbus_slot = regs->which_io;
892
893         if (ino < 0x20)
894                 ino += (sbus_slot * 8);
895
896         imap = sysio_irq_offsets[ino];
897         if (imap == ((unsigned long)-1)) {
898                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
899                             ino);
900                 prom_halt();
901         }
902         imap += reg_base;
903
904         /* SYSIO inconsistency.  For external SLOTS, we have to select
905          * the right ICLR register based upon the lower SBUS irq level
906          * bits.
907          */
908         if (ino >= 0x20) {
909                 iclr = sysio_imap_to_iclr(imap);
910         } else {
911                 sbus_level = ino & 0x7;
912
913                 switch(sbus_slot) {
914                 case 0:
915                         iclr = reg_base + SYSIO_ICLR_SLOT0;
916                         break;
917                 case 1:
918                         iclr = reg_base + SYSIO_ICLR_SLOT1;
919                         break;
920                 case 2:
921                         iclr = reg_base + SYSIO_ICLR_SLOT2;
922                         break;
923                 default:
924                 case 3:
925                         iclr = reg_base + SYSIO_ICLR_SLOT3;
926                         break;
927                 };
928
929                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
930         }
931         return build_irq(sbus_level, iclr, imap);
932 }
933
934 static void sbus_irq_trans_init(struct device_node *dp)
935 {
936         struct linux_prom64_registers *regs;
937
938         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
939         dp->irq_trans->irq_build = sbus_of_build_irq;
940
941         regs = of_get_property(dp, "reg", NULL);
942         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
943 }
944 #endif /* CONFIG_SBUS */
945
946
947 static unsigned int central_build_irq(struct device_node *dp,
948                                       unsigned int ino,
949                                       void *_data)
950 {
951         struct device_node *central_dp = _data;
952         struct of_device *central_op = of_find_device_by_node(central_dp);
953         struct resource *res;
954         unsigned long imap, iclr;
955         u32 tmp;
956
957         if (!strcmp(dp->name, "eeprom")) {
958                 res = &central_op->resource[5];
959         } else if (!strcmp(dp->name, "zs")) {
960                 res = &central_op->resource[4];
961         } else if (!strcmp(dp->name, "clock-board")) {
962                 res = &central_op->resource[3];
963         } else {
964                 return ino;
965         }
966
967         imap = res->start + 0x00UL;
968         iclr = res->start + 0x10UL;
969
970         /* Set the INO state to idle, and disable.  */
971         upa_writel(0, iclr);
972         upa_readl(iclr);
973
974         tmp = upa_readl(imap);
975         tmp &= ~0x80000000;
976         upa_writel(tmp, imap);
977
978         return build_irq(0, iclr, imap);
979 }
980
981 static void central_irq_trans_init(struct device_node *dp)
982 {
983         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
984         dp->irq_trans->irq_build = central_build_irq;
985
986         dp->irq_trans->data = dp;
987 }
988
989 struct irq_trans {
990         const char *name;
991         void (*init)(struct device_node *);
992 };
993
994 #ifdef CONFIG_PCI
995 static struct irq_trans pci_irq_trans_table[] = {
996         { "SUNW,sabre", sabre_irq_trans_init },
997         { "pci108e,a000", sabre_irq_trans_init },
998         { "pci108e,a001", sabre_irq_trans_init },
999         { "SUNW,psycho", psycho_irq_trans_init },
1000         { "pci108e,8000", psycho_irq_trans_init },
1001         { "SUNW,schizo", schizo_irq_trans_init },
1002         { "pci108e,8001", schizo_irq_trans_init },
1003         { "SUNW,schizo+", schizo_irq_trans_init },
1004         { "pci108e,8002", schizo_irq_trans_init },
1005         { "SUNW,tomatillo", schizo_irq_trans_init },
1006         { "pci108e,a801", schizo_irq_trans_init },
1007         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1008 };
1009 #endif
1010
1011 static void irq_trans_init(struct device_node *dp)
1012 {
1013         const char *model;
1014         int i;
1015
1016         model = of_get_property(dp, "model", NULL);
1017         if (!model)
1018                 model = of_get_property(dp, "compatible", NULL);
1019         if (!model)
1020                 return;
1021
1022 #ifdef CONFIG_PCI
1023         for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1024                 struct irq_trans *t = &pci_irq_trans_table[i];
1025
1026                 if (!strcmp(model, t->name))
1027                         return t->init(dp);
1028         }
1029 #endif
1030 #ifdef CONFIG_SBUS
1031         if (!strcmp(dp->name, "sbus") ||
1032             !strcmp(dp->name, "sbi"))
1033                 return sbus_irq_trans_init(dp);
1034 #endif
1035         if (!strcmp(dp->name, "central"))
1036                 return central_irq_trans_init(dp->child);
1037 }
1038
1039 static int is_root_node(const struct device_node *dp)
1040 {
1041         if (!dp)
1042                 return 0;
1043
1044         return (dp->parent == NULL);
1045 }
1046
1047 /* The following routines deal with the black magic of fully naming a
1048  * node.
1049  *
1050  * Certain well known named nodes are just the simple name string.
1051  *
1052  * Actual devices have an address specifier appended to the base name
1053  * string, like this "foo@addr".  The "addr" can be in any number of
1054  * formats, and the platform plus the type of the node determine the
1055  * format and how it is constructed.
1056  *
1057  * For children of the ROOT node, the naming convention is fixed and
1058  * determined by whether this is a sun4u or sun4v system.
1059  *
1060  * For children of other nodes, it is bus type specific.  So
1061  * we walk up the tree until we discover a "device_type" property
1062  * we recognize and we go from there.
1063  *
1064  * As an example, the boot device on my workstation has a full path:
1065  *
1066  *      /pci@1e,600000/ide@d/disk@0,0:c
1067  */
1068 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1069 {
1070         struct linux_prom64_registers *regs;
1071         struct property *rprop;
1072         u32 high_bits, low_bits, type;
1073
1074         rprop = of_find_property(dp, "reg", NULL);
1075         if (!rprop)
1076                 return;
1077
1078         regs = rprop->value;
1079         if (!is_root_node(dp->parent)) {
1080                 sprintf(tmp_buf, "%s@%x,%x",
1081                         dp->name,
1082                         (unsigned int) (regs->phys_addr >> 32UL),
1083                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1084                 return;
1085         }
1086
1087         type = regs->phys_addr >> 60UL;
1088         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1089         low_bits = (regs->phys_addr & 0xffffffffUL);
1090
1091         if (type == 0 || type == 8) {
1092                 const char *prefix = (type == 0) ? "m" : "i";
1093
1094                 if (low_bits)
1095                         sprintf(tmp_buf, "%s@%s%x,%x",
1096                                 dp->name, prefix,
1097                                 high_bits, low_bits);
1098                 else
1099                         sprintf(tmp_buf, "%s@%s%x",
1100                                 dp->name,
1101                                 prefix,
1102                                 high_bits);
1103         } else if (type == 12) {
1104                 sprintf(tmp_buf, "%s@%x",
1105                         dp->name, high_bits);
1106         }
1107 }
1108
1109 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1110 {
1111         struct linux_prom64_registers *regs;
1112         struct property *prop;
1113
1114         prop = of_find_property(dp, "reg", NULL);
1115         if (!prop)
1116                 return;
1117
1118         regs = prop->value;
1119         if (!is_root_node(dp->parent)) {
1120                 sprintf(tmp_buf, "%s@%x,%x",
1121                         dp->name,
1122                         (unsigned int) (regs->phys_addr >> 32UL),
1123                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1124                 return;
1125         }
1126
1127         prop = of_find_property(dp, "upa-portid", NULL);
1128         if (!prop)
1129                 prop = of_find_property(dp, "portid", NULL);
1130         if (prop) {
1131                 unsigned long mask = 0xffffffffUL;
1132
1133                 if (tlb_type >= cheetah)
1134                         mask = 0x7fffff;
1135
1136                 sprintf(tmp_buf, "%s@%x,%x",
1137                         dp->name,
1138                         *(u32 *)prop->value,
1139                         (unsigned int) (regs->phys_addr & mask));
1140         }
1141 }
1142
1143 /* "name@slot,offset"  */
1144 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1145 {
1146         struct linux_prom_registers *regs;
1147         struct property *prop;
1148
1149         prop = of_find_property(dp, "reg", NULL);
1150         if (!prop)
1151                 return;
1152
1153         regs = prop->value;
1154         sprintf(tmp_buf, "%s@%x,%x",
1155                 dp->name,
1156                 regs->which_io,
1157                 regs->phys_addr);
1158 }
1159
1160 /* "name@devnum[,func]" */
1161 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1162 {
1163         struct linux_prom_pci_registers *regs;
1164         struct property *prop;
1165         unsigned int devfn;
1166
1167         prop = of_find_property(dp, "reg", NULL);
1168         if (!prop)
1169                 return;
1170
1171         regs = prop->value;
1172         devfn = (regs->phys_hi >> 8) & 0xff;
1173         if (devfn & 0x07) {
1174                 sprintf(tmp_buf, "%s@%x,%x",
1175                         dp->name,
1176                         devfn >> 3,
1177                         devfn & 0x07);
1178         } else {
1179                 sprintf(tmp_buf, "%s@%x",
1180                         dp->name,
1181                         devfn >> 3);
1182         }
1183 }
1184
1185 /* "name@UPA_PORTID,offset" */
1186 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1187 {
1188         struct linux_prom64_registers *regs;
1189         struct property *prop;
1190
1191         prop = of_find_property(dp, "reg", NULL);
1192         if (!prop)
1193                 return;
1194
1195         regs = prop->value;
1196
1197         prop = of_find_property(dp, "upa-portid", NULL);
1198         if (!prop)
1199                 return;
1200
1201         sprintf(tmp_buf, "%s@%x,%x",
1202                 dp->name,
1203                 *(u32 *) prop->value,
1204                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1205 }
1206
1207 /* "name@reg" */
1208 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1209 {
1210         struct property *prop;
1211         u32 *regs;
1212
1213         prop = of_find_property(dp, "reg", NULL);
1214         if (!prop)
1215                 return;
1216
1217         regs = prop->value;
1218
1219         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1220 }
1221
1222 /* "name@addrhi,addrlo" */
1223 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1224 {
1225         struct linux_prom64_registers *regs;
1226         struct property *prop;
1227
1228         prop = of_find_property(dp, "reg", NULL);
1229         if (!prop)
1230                 return;
1231
1232         regs = prop->value;
1233
1234         sprintf(tmp_buf, "%s@%x,%x",
1235                 dp->name,
1236                 (unsigned int) (regs->phys_addr >> 32UL),
1237                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1238 }
1239
1240 /* "name@bus,addr" */
1241 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1242 {
1243         struct property *prop;
1244         u32 *regs;
1245
1246         prop = of_find_property(dp, "reg", NULL);
1247         if (!prop)
1248                 return;
1249
1250         regs = prop->value;
1251
1252         /* This actually isn't right... should look at the #address-cells
1253          * property of the i2c bus node etc. etc.
1254          */
1255         sprintf(tmp_buf, "%s@%x,%x",
1256                 dp->name, regs[0], regs[1]);
1257 }
1258
1259 /* "name@reg0[,reg1]" */
1260 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1261 {
1262         struct property *prop;
1263         u32 *regs;
1264
1265         prop = of_find_property(dp, "reg", NULL);
1266         if (!prop)
1267                 return;
1268
1269         regs = prop->value;
1270
1271         if (prop->length == sizeof(u32) || regs[1] == 1) {
1272                 sprintf(tmp_buf, "%s@%x",
1273                         dp->name, regs[0]);
1274         } else {
1275                 sprintf(tmp_buf, "%s@%x,%x",
1276                         dp->name, regs[0], regs[1]);
1277         }
1278 }
1279
1280 /* "name@reg0reg1[,reg2reg3]" */
1281 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1282 {
1283         struct property *prop;
1284         u32 *regs;
1285
1286         prop = of_find_property(dp, "reg", NULL);
1287         if (!prop)
1288                 return;
1289
1290         regs = prop->value;
1291
1292         if (regs[2] || regs[3]) {
1293                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1294                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1295         } else {
1296                 sprintf(tmp_buf, "%s@%08x%08x",
1297                         dp->name, regs[0], regs[1]);
1298         }
1299 }
1300
1301 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1302 {
1303         struct device_node *parent = dp->parent;
1304
1305         if (parent != NULL) {
1306                 if (!strcmp(parent->type, "pci") ||
1307                     !strcmp(parent->type, "pciex"))
1308                         return pci_path_component(dp, tmp_buf);
1309                 if (!strcmp(parent->type, "sbus"))
1310                         return sbus_path_component(dp, tmp_buf);
1311                 if (!strcmp(parent->type, "upa"))
1312                         return upa_path_component(dp, tmp_buf);
1313                 if (!strcmp(parent->type, "ebus"))
1314                         return ebus_path_component(dp, tmp_buf);
1315                 if (!strcmp(parent->name, "usb") ||
1316                     !strcmp(parent->name, "hub"))
1317                         return usb_path_component(dp, tmp_buf);
1318                 if (!strcmp(parent->type, "i2c"))
1319                         return i2c_path_component(dp, tmp_buf);
1320                 if (!strcmp(parent->type, "firewire"))
1321                         return ieee1394_path_component(dp, tmp_buf);
1322                 if (!strcmp(parent->type, "virtual-devices"))
1323                         return vdev_path_component(dp, tmp_buf);
1324
1325                 /* "isa" is handled with platform naming */
1326         }
1327
1328         /* Use platform naming convention.  */
1329         if (tlb_type == hypervisor)
1330                 return sun4v_path_component(dp, tmp_buf);
1331         else
1332                 return sun4u_path_component(dp, tmp_buf);
1333 }
1334
1335 static char * __init build_path_component(struct device_node *dp)
1336 {
1337         char tmp_buf[64], *n;
1338
1339         tmp_buf[0] = '\0';
1340         __build_path_component(dp, tmp_buf);
1341         if (tmp_buf[0] == '\0')
1342                 strcpy(tmp_buf, dp->name);
1343
1344         n = prom_early_alloc(strlen(tmp_buf) + 1);
1345         strcpy(n, tmp_buf);
1346
1347         return n;
1348 }
1349
1350 static char * __init build_full_name(struct device_node *dp)
1351 {
1352         int len, ourlen, plen;
1353         char *n;
1354
1355         plen = strlen(dp->parent->full_name);
1356         ourlen = strlen(dp->path_component_name);
1357         len = ourlen + plen + 2;
1358
1359         n = prom_early_alloc(len);
1360         strcpy(n, dp->parent->full_name);
1361         if (!is_root_node(dp->parent)) {
1362                 strcpy(n + plen, "/");
1363                 plen++;
1364         }
1365         strcpy(n + plen, dp->path_component_name);
1366
1367         return n;
1368 }
1369
1370 static unsigned int unique_id;
1371
1372 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1373 {
1374         static struct property *tmp = NULL;
1375         struct property *p;
1376
1377         if (tmp) {
1378                 p = tmp;
1379                 memset(p, 0, sizeof(*p) + 32);
1380                 tmp = NULL;
1381         } else {
1382                 p = prom_early_alloc(sizeof(struct property) + 32);
1383                 p->unique_id = unique_id++;
1384         }
1385
1386         p->name = (char *) (p + 1);
1387         if (special_name) {
1388                 strcpy(p->name, special_name);
1389                 p->length = special_len;
1390                 p->value = prom_early_alloc(special_len);
1391                 memcpy(p->value, special_val, special_len);
1392         } else {
1393                 if (prev == NULL) {
1394                         prom_firstprop(node, p->name);
1395                 } else {
1396                         prom_nextprop(node, prev, p->name);
1397                 }
1398                 if (strlen(p->name) == 0) {
1399                         tmp = p;
1400                         return NULL;
1401                 }
1402                 p->length = prom_getproplen(node, p->name);
1403                 if (p->length <= 0) {
1404                         p->length = 0;
1405                 } else {
1406                         p->value = prom_early_alloc(p->length + 1);
1407                         prom_getproperty(node, p->name, p->value, p->length);
1408                         ((unsigned char *)p->value)[p->length] = '\0';
1409                 }
1410         }
1411         return p;
1412 }
1413
1414 static struct property * __init build_prop_list(phandle node)
1415 {
1416         struct property *head, *tail;
1417
1418         head = tail = build_one_prop(node, NULL,
1419                                      ".node", &node, sizeof(node));
1420
1421         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1422         tail = tail->next;
1423         while(tail) {
1424                 tail->next = build_one_prop(node, tail->name,
1425                                             NULL, NULL, 0);
1426                 tail = tail->next;
1427         }
1428
1429         return head;
1430 }
1431
1432 static char * __init get_one_property(phandle node, const char *name)
1433 {
1434         char *buf = "<NULL>";
1435         int len;
1436
1437         len = prom_getproplen(node, name);
1438         if (len > 0) {
1439                 buf = prom_early_alloc(len);
1440                 prom_getproperty(node, name, buf, len);
1441         }
1442
1443         return buf;
1444 }
1445
1446 static struct device_node * __init create_node(phandle node)
1447 {
1448         struct device_node *dp;
1449
1450         if (!node)
1451                 return NULL;
1452
1453         dp = prom_early_alloc(sizeof(*dp));
1454         dp->unique_id = unique_id++;
1455
1456         kref_init(&dp->kref);
1457
1458         dp->name = get_one_property(node, "name");
1459         dp->type = get_one_property(node, "device_type");
1460         dp->node = node;
1461
1462         dp->properties = build_prop_list(node);
1463
1464         irq_trans_init(dp);
1465
1466         return dp;
1467 }
1468
1469 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1470 {
1471         struct device_node *dp;
1472
1473         dp = create_node(node);
1474         if (dp) {
1475                 *(*nextp) = dp;
1476                 *nextp = &dp->allnext;
1477
1478                 dp->parent = parent;
1479                 dp->path_component_name = build_path_component(dp);
1480                 dp->full_name = build_full_name(dp);
1481
1482                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1483
1484                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1485         }
1486
1487         return dp;
1488 }
1489
1490 void __init prom_build_devicetree(void)
1491 {
1492         struct device_node **nextp;
1493
1494         allnodes = create_node(prom_root_node);
1495         allnodes->path_component_name = "";
1496         allnodes->full_name = "/";
1497
1498         nextp = &allnodes->allnext;
1499         allnodes->child = build_tree(allnodes,
1500                                      prom_getchild(allnodes->node),
1501                                      &nextp);
1502         printk("PROM: Built device tree with %u bytes of memory.\n",
1503                prom_early_allocated);
1504 }