2 * sata_promise.c - Promise SATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
26 * libata documentation is available via 'make {ps|pdf}docs',
27 * as Documentation/DocBook/libata.*
29 * Hardware information only available under NDA.
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/pci.h>
36 #include <linux/init.h>
37 #include <linux/blkdev.h>
38 #include <linux/delay.h>
39 #include <linux/interrupt.h>
40 #include <linux/sched.h>
41 #include <linux/device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <linux/libata.h>
46 #include "sata_promise.h"
48 #define DRV_NAME "sata_promise"
49 #define DRV_VERSION "1.04"
53 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
54 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
55 PDC_TBG_MODE = 0x41, /* TBG mode */
56 PDC_FLASH_CTL = 0x44, /* Flash control register */
57 PDC_PCI_CTL = 0x48, /* PCI control and status register */
58 PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */
59 PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */
60 PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */
61 PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */
62 PDC_SLEW_CTL = 0x470, /* slew rate control reg */
64 PDC_ERR_MASK = (1<<19) | (1<<20) | (1<<21) | (1<<22) |
65 (1<<8) | (1<<9) | (1<<10),
67 board_2037x = 0, /* FastTrak S150 TX2plus */
68 board_20319 = 1, /* FastTrak S150 TX4 */
69 board_20619 = 2, /* FastTrak TX4000 */
70 board_20771 = 3, /* FastTrak TX2300 */
71 board_2057x = 4, /* SATAII150 Tx2plus */
72 board_40518 = 5, /* SATAII150 Tx4 */
74 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
76 PDC_RESET = (1 << 11), /* HDMA reset */
78 PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST |
79 ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI |
84 struct pdc_port_priv {
89 struct pdc_host_priv {
93 static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg);
94 static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
95 static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
96 static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
97 static void pdc_eng_timeout(struct ata_port *ap);
98 static int pdc_port_start(struct ata_port *ap);
99 static void pdc_port_stop(struct ata_port *ap);
100 static void pdc_pata_phy_reset(struct ata_port *ap);
101 static void pdc_sata_phy_reset(struct ata_port *ap);
102 static void pdc_qc_prep(struct ata_queued_cmd *qc);
103 static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
104 static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
105 static void pdc_irq_clear(struct ata_port *ap);
106 static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc);
107 static void pdc_host_stop(struct ata_host_set *host_set);
110 static struct scsi_host_template pdc_ata_sht = {
111 .module = THIS_MODULE,
113 .ioctl = ata_scsi_ioctl,
114 .queuecommand = ata_scsi_queuecmd,
115 .can_queue = ATA_DEF_QUEUE,
116 .this_id = ATA_SHT_THIS_ID,
117 .sg_tablesize = LIBATA_MAX_PRD,
118 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
119 .emulated = ATA_SHT_EMULATED,
120 .use_clustering = ATA_SHT_USE_CLUSTERING,
121 .proc_name = DRV_NAME,
122 .dma_boundary = ATA_DMA_BOUNDARY,
123 .slave_configure = ata_scsi_slave_config,
124 .slave_destroy = ata_scsi_slave_destroy,
125 .bios_param = ata_std_bios_param,
128 static const struct ata_port_operations pdc_sata_ops = {
129 .port_disable = ata_port_disable,
130 .tf_load = pdc_tf_load_mmio,
131 .tf_read = ata_tf_read,
132 .check_status = ata_check_status,
133 .exec_command = pdc_exec_command_mmio,
134 .dev_select = ata_std_dev_select,
136 .phy_reset = pdc_sata_phy_reset,
138 .qc_prep = pdc_qc_prep,
139 .qc_issue = pdc_qc_issue_prot,
140 .eng_timeout = pdc_eng_timeout,
141 .data_xfer = ata_mmio_data_xfer,
142 .irq_handler = pdc_interrupt,
143 .irq_clear = pdc_irq_clear,
145 .scr_read = pdc_sata_scr_read,
146 .scr_write = pdc_sata_scr_write,
147 .port_start = pdc_port_start,
148 .port_stop = pdc_port_stop,
149 .host_stop = pdc_host_stop,
152 static const struct ata_port_operations pdc_pata_ops = {
153 .port_disable = ata_port_disable,
154 .tf_load = pdc_tf_load_mmio,
155 .tf_read = ata_tf_read,
156 .check_status = ata_check_status,
157 .exec_command = pdc_exec_command_mmio,
158 .dev_select = ata_std_dev_select,
160 .phy_reset = pdc_pata_phy_reset,
162 .qc_prep = pdc_qc_prep,
163 .qc_issue = pdc_qc_issue_prot,
164 .data_xfer = ata_mmio_data_xfer,
165 .eng_timeout = pdc_eng_timeout,
166 .irq_handler = pdc_interrupt,
167 .irq_clear = pdc_irq_clear,
169 .port_start = pdc_port_start,
170 .port_stop = pdc_port_stop,
171 .host_stop = pdc_host_stop,
174 static const struct ata_port_info pdc_port_info[] = {
178 .host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
179 .pio_mask = 0x1f, /* pio0-4 */
180 .mwdma_mask = 0x07, /* mwdma0-2 */
181 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
182 .port_ops = &pdc_sata_ops,
188 .host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
189 .pio_mask = 0x1f, /* pio0-4 */
190 .mwdma_mask = 0x07, /* mwdma0-2 */
191 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
192 .port_ops = &pdc_sata_ops,
198 .host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
199 .pio_mask = 0x1f, /* pio0-4 */
200 .mwdma_mask = 0x07, /* mwdma0-2 */
201 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
202 .port_ops = &pdc_pata_ops,
208 .host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
209 .pio_mask = 0x1f, /* pio0-4 */
210 .mwdma_mask = 0x07, /* mwdma0-2 */
211 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
212 .port_ops = &pdc_sata_ops,
218 .host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
219 .pio_mask = 0x1f, /* pio0-4 */
220 .mwdma_mask = 0x07, /* mwdma0-2 */
221 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
222 .port_ops = &pdc_sata_ops,
228 .host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
229 .pio_mask = 0x1f, /* pio0-4 */
230 .mwdma_mask = 0x07, /* mwdma0-2 */
231 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
232 .port_ops = &pdc_sata_ops,
236 static const struct pci_device_id pdc_ata_pci_tbl[] = {
237 { PCI_VENDOR_ID_PROMISE, 0x3371, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
239 { PCI_VENDOR_ID_PROMISE, 0x3570, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
241 { PCI_VENDOR_ID_PROMISE, 0x3571, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
243 { PCI_VENDOR_ID_PROMISE, 0x3373, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
245 { PCI_VENDOR_ID_PROMISE, 0x3375, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
247 { PCI_VENDOR_ID_PROMISE, 0x3376, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
249 { PCI_VENDOR_ID_PROMISE, 0x3574, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
251 { PCI_VENDOR_ID_PROMISE, 0x3d75, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
253 { PCI_VENDOR_ID_PROMISE, 0x3d73, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
256 { PCI_VENDOR_ID_PROMISE, 0x3318, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
258 { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
260 { PCI_VENDOR_ID_PROMISE, 0x3515, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
262 { PCI_VENDOR_ID_PROMISE, 0x3519, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
264 { PCI_VENDOR_ID_PROMISE, 0x3d17, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
266 { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
269 { PCI_VENDOR_ID_PROMISE, 0x6629, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
272 /* TODO: remove all associated board_20771 code, as it completely
273 * duplicates board_2037x code, unless reason for separation can be
277 { PCI_VENDOR_ID_PROMISE, 0x3570, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
281 { } /* terminate list */
285 static struct pci_driver pdc_ata_pci_driver = {
287 .id_table = pdc_ata_pci_tbl,
288 .probe = pdc_ata_init_one,
289 .remove = ata_pci_remove_one,
293 static int pdc_port_start(struct ata_port *ap)
295 struct device *dev = ap->host_set->dev;
296 struct pdc_port_priv *pp;
299 rc = ata_port_start(ap);
303 pp = kzalloc(sizeof(*pp), GFP_KERNEL);
309 pp->pkt = dma_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
315 ap->private_data = pp;
327 static void pdc_port_stop(struct ata_port *ap)
329 struct device *dev = ap->host_set->dev;
330 struct pdc_port_priv *pp = ap->private_data;
332 ap->private_data = NULL;
333 dma_free_coherent(dev, 128, pp->pkt, pp->pkt_dma);
339 static void pdc_host_stop(struct ata_host_set *host_set)
341 struct pdc_host_priv *hp = host_set->private_data;
343 ata_pci_host_stop(host_set);
349 static void pdc_reset_port(struct ata_port *ap)
351 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT;
355 for (i = 11; i > 0; i--) {
368 readl(mmio); /* flush */
371 static void pdc_sata_phy_reset(struct ata_port *ap)
377 static void pdc_pata_cbl_detect(struct ata_port *ap)
380 void __iomem *mmio = (void *) ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03;
385 ap->cbl = ATA_CBL_PATA40;
386 ap->udma_mask &= ATA_UDMA_MASK_40C;
388 ap->cbl = ATA_CBL_PATA80;
391 static void pdc_pata_phy_reset(struct ata_port *ap)
393 pdc_pata_cbl_detect(ap);
399 static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
401 if (sc_reg > SCR_CONTROL)
403 return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
407 static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
410 if (sc_reg > SCR_CONTROL)
412 writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
415 static void pdc_qc_prep(struct ata_queued_cmd *qc)
417 struct pdc_port_priv *pp = qc->ap->private_data;
422 switch (qc->tf.protocol) {
427 case ATA_PROT_NODATA:
428 i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma,
429 qc->dev->devno, pp->pkt);
431 if (qc->tf.flags & ATA_TFLAG_LBA48)
432 i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
434 i = pdc_prep_lba28(&qc->tf, pp->pkt, i);
436 pdc_pkt_footer(&qc->tf, pp->pkt, i);
444 static void pdc_eng_timeout(struct ata_port *ap)
446 struct ata_host_set *host_set = ap->host_set;
448 struct ata_queued_cmd *qc;
453 spin_lock_irqsave(&host_set->lock, flags);
455 qc = ata_qc_from_tag(ap, ap->active_tag);
457 switch (qc->tf.protocol) {
459 case ATA_PROT_NODATA:
460 ata_port_printk(ap, KERN_ERR, "command timeout\n");
461 drv_stat = ata_wait_idle(ap);
462 qc->err_mask |= __ac_err_mask(drv_stat);
466 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
468 ata_port_printk(ap, KERN_ERR,
469 "unknown timeout, cmd 0x%x stat 0x%x\n",
470 qc->tf.command, drv_stat);
472 qc->err_mask |= ac_err_mask(drv_stat);
476 spin_unlock_irqrestore(&host_set->lock, flags);
477 ata_eh_qc_complete(qc);
481 static inline unsigned int pdc_host_intr( struct ata_port *ap,
482 struct ata_queued_cmd *qc)
484 unsigned int handled = 0;
486 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_GLOBAL_CTL;
489 if (tmp & PDC_ERR_MASK) {
490 qc->err_mask |= AC_ERR_DEV;
494 switch (qc->tf.protocol) {
496 case ATA_PROT_NODATA:
497 qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
503 ap->stats.idle_irq++;
510 static void pdc_irq_clear(struct ata_port *ap)
512 struct ata_host_set *host_set = ap->host_set;
513 void __iomem *mmio = host_set->mmio_base;
515 readl(mmio + PDC_INT_SEQMASK);
518 static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
520 struct ata_host_set *host_set = dev_instance;
524 unsigned int handled = 0;
525 void __iomem *mmio_base;
529 if (!host_set || !host_set->mmio_base) {
530 VPRINTK("QUICK EXIT\n");
534 mmio_base = host_set->mmio_base;
536 /* reading should also clear interrupts */
537 mask = readl(mmio_base + PDC_INT_SEQMASK);
539 if (mask == 0xffffffff) {
540 VPRINTK("QUICK EXIT 2\n");
544 spin_lock(&host_set->lock);
546 mask &= 0xffff; /* only 16 tags possible */
548 VPRINTK("QUICK EXIT 3\n");
552 writel(mask, mmio_base + PDC_INT_SEQMASK);
554 for (i = 0; i < host_set->n_ports; i++) {
555 VPRINTK("port %u\n", i);
556 ap = host_set->ports[i];
557 tmp = mask & (1 << (i + 1));
559 !(ap->flags & ATA_FLAG_DISABLED)) {
560 struct ata_queued_cmd *qc;
562 qc = ata_qc_from_tag(ap, ap->active_tag);
563 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)))
564 handled += pdc_host_intr(ap, qc);
571 spin_unlock(&host_set->lock);
572 return IRQ_RETVAL(handled);
575 static inline void pdc_packet_start(struct ata_queued_cmd *qc)
577 struct ata_port *ap = qc->ap;
578 struct pdc_port_priv *pp = ap->private_data;
579 unsigned int port_no = ap->port_no;
580 u8 seq = (u8) (port_no + 1);
582 VPRINTK("ENTER, ap %p\n", ap);
584 writel(0x00000001, ap->host_set->mmio_base + (seq * 4));
585 readl(ap->host_set->mmio_base + (seq * 4)); /* flush */
588 wmb(); /* flush PRD, pkt writes */
589 writel(pp->pkt_dma, (void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
590 readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */
593 static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
595 switch (qc->tf.protocol) {
597 case ATA_PROT_NODATA:
598 pdc_packet_start(qc);
601 case ATA_PROT_ATAPI_DMA:
609 return ata_qc_issue_prot(qc);
612 static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
614 WARN_ON (tf->protocol == ATA_PROT_DMA ||
615 tf->protocol == ATA_PROT_NODATA);
620 static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
622 WARN_ON (tf->protocol == ATA_PROT_DMA ||
623 tf->protocol == ATA_PROT_NODATA);
624 ata_exec_command(ap, tf);
628 static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base)
630 port->cmd_addr = base;
631 port->data_addr = base;
633 port->error_addr = base + 0x4;
634 port->nsect_addr = base + 0x8;
635 port->lbal_addr = base + 0xc;
636 port->lbam_addr = base + 0x10;
637 port->lbah_addr = base + 0x14;
638 port->device_addr = base + 0x18;
640 port->status_addr = base + 0x1c;
641 port->altstatus_addr =
642 port->ctl_addr = base + 0x38;
646 static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
648 void __iomem *mmio = pe->mmio_base;
649 struct pdc_host_priv *hp = pe->private_data;
650 int hotplug_offset = hp->hotplug_offset;
654 * Except for the hotplug stuff, this is voodoo from the
655 * Promise driver. Label this entire section
656 * "TODO: figure out why we do this"
659 /* change FIFO_SHD to 8 dwords, enable BMR_BURST */
660 tmp = readl(mmio + PDC_FLASH_CTL);
661 tmp |= 0x12000; /* bit 16 (fifo 8 dw) and 13 (bmr burst?) */
662 writel(tmp, mmio + PDC_FLASH_CTL);
664 /* clear plug/unplug flags for all ports */
665 tmp = readl(mmio + hotplug_offset);
666 writel(tmp | 0xff, mmio + hotplug_offset);
668 /* mask plug/unplug ints */
669 tmp = readl(mmio + hotplug_offset);
670 writel(tmp | 0xff0000, mmio + hotplug_offset);
672 /* reduce TBG clock to 133 Mhz. */
673 tmp = readl(mmio + PDC_TBG_MODE);
674 tmp &= ~0x30000; /* clear bit 17, 16*/
675 tmp |= 0x10000; /* set bit 17:16 = 0:1 */
676 writel(tmp, mmio + PDC_TBG_MODE);
678 readl(mmio + PDC_TBG_MODE); /* flush */
681 /* adjust slew rate control register. */
682 tmp = readl(mmio + PDC_SLEW_CTL);
683 tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */
684 tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */
685 writel(tmp, mmio + PDC_SLEW_CTL);
688 static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
690 static int printed_version;
691 struct ata_probe_ent *probe_ent = NULL;
692 struct pdc_host_priv *hp;
694 void __iomem *mmio_base;
695 unsigned int board_idx = (unsigned int) ent->driver_data;
696 int pci_dev_busy = 0;
699 if (!printed_version++)
700 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
702 rc = pci_enable_device(pdev);
706 rc = pci_request_regions(pdev, DRV_NAME);
712 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
714 goto err_out_regions;
715 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
717 goto err_out_regions;
719 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
720 if (probe_ent == NULL) {
722 goto err_out_regions;
725 probe_ent->dev = pci_dev_to_dev(pdev);
726 INIT_LIST_HEAD(&probe_ent->node);
728 mmio_base = pci_iomap(pdev, 3, 0);
729 if (mmio_base == NULL) {
731 goto err_out_free_ent;
733 base = (unsigned long) mmio_base;
735 hp = kzalloc(sizeof(*hp), GFP_KERNEL);
738 goto err_out_free_ent;
741 /* Set default hotplug offset */
742 hp->hotplug_offset = PDC_SATA_PLUG_CSR;
743 probe_ent->private_data = hp;
745 probe_ent->sht = pdc_port_info[board_idx].sht;
746 probe_ent->host_flags = pdc_port_info[board_idx].host_flags;
747 probe_ent->pio_mask = pdc_port_info[board_idx].pio_mask;
748 probe_ent->mwdma_mask = pdc_port_info[board_idx].mwdma_mask;
749 probe_ent->udma_mask = pdc_port_info[board_idx].udma_mask;
750 probe_ent->port_ops = pdc_port_info[board_idx].port_ops;
752 probe_ent->irq = pdev->irq;
753 probe_ent->irq_flags = IRQF_SHARED;
754 probe_ent->mmio_base = mmio_base;
756 pdc_ata_setup_port(&probe_ent->port[0], base + 0x200);
757 pdc_ata_setup_port(&probe_ent->port[1], base + 0x280);
759 probe_ent->port[0].scr_addr = base + 0x400;
760 probe_ent->port[1].scr_addr = base + 0x500;
762 /* notice 4-port boards */
765 /* Override hotplug offset for SATAII150 */
766 hp->hotplug_offset = PDC2_SATA_PLUG_CSR;
769 probe_ent->n_ports = 4;
771 pdc_ata_setup_port(&probe_ent->port[2], base + 0x300);
772 pdc_ata_setup_port(&probe_ent->port[3], base + 0x380);
774 probe_ent->port[2].scr_addr = base + 0x600;
775 probe_ent->port[3].scr_addr = base + 0x700;
778 /* Override hotplug offset for SATAII150 */
779 hp->hotplug_offset = PDC2_SATA_PLUG_CSR;
782 probe_ent->n_ports = 2;
785 probe_ent->n_ports = 2;
788 probe_ent->n_ports = 4;
790 pdc_ata_setup_port(&probe_ent->port[2], base + 0x300);
791 pdc_ata_setup_port(&probe_ent->port[3], base + 0x380);
793 probe_ent->port[2].scr_addr = base + 0x600;
794 probe_ent->port[3].scr_addr = base + 0x700;
801 pci_set_master(pdev);
803 /* initialize adapter */
804 pdc_host_init(board_idx, probe_ent);
806 /* FIXME: Need any other frees than hp? */
807 if (!ata_device_add(probe_ent))
817 pci_release_regions(pdev);
820 pci_disable_device(pdev);
825 static int __init pdc_ata_init(void)
827 return pci_module_init(&pdc_ata_pci_driver);
831 static void __exit pdc_ata_exit(void)
833 pci_unregister_driver(&pdc_ata_pci_driver);
837 MODULE_AUTHOR("Jeff Garzik");
838 MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
839 MODULE_LICENSE("GPL");
840 MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
841 MODULE_VERSION(DRV_VERSION);
843 module_init(pdc_ata_init);
844 module_exit(pdc_ata_exit);