1 /* pci_msi.c: Sparc64 MSI support common layer.
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
5 #include <linux/kernel.h>
6 #include <linux/interrupt.h>
11 static irqreturn_t sparc64_msiq_interrupt(int irq, void *cookie)
13 struct sparc64_msiq_cookie *msiq_cookie = cookie;
14 struct pci_pbm_info *pbm = msiq_cookie->pbm;
15 unsigned long msiqid = msiq_cookie->msiqid;
16 const struct sparc64_msiq_ops *ops;
17 unsigned long orig_head, head;
22 err = ops->get_head(pbm, msiqid, &head);
23 if (unlikely(err < 0))
30 err = ops->dequeue_msi(pbm, msiqid, &head, &msi);
32 __do_IRQ(pbm->msi_irq_table[msi - pbm->msi_first]);
34 if (unlikely(err < 0))
40 if (likely(head != orig_head)) {
41 err = ops->set_head(pbm, msiqid, head);
42 if (unlikely(err < 0))
48 printk(KERN_EMERG "MSI: Get head on msiqid[%lu] gives error %d\n",
53 printk(KERN_EMERG "MSI: Dequeue head[%lu] from msiqid[%lu] "
59 printk(KERN_EMERG "MSI: Set head[%lu] on msiqid[%lu] "
68 static u32 pick_msiq(struct pci_pbm_info *pbm)
70 static DEFINE_SPINLOCK(rotor_lock);
74 spin_lock_irqsave(&rotor_lock, flags);
76 rotor = pbm->msiq_rotor;
77 ret = pbm->msiq_first + rotor;
79 if (++rotor >= pbm->msiq_num)
81 pbm->msiq_rotor = rotor;
83 spin_unlock_irqrestore(&rotor_lock, flags);
89 static int alloc_msi(struct pci_pbm_info *pbm)
93 for (i = 0; i < pbm->msi_num; i++) {
94 if (!test_and_set_bit(i, pbm->msi_bitmap))
95 return i + pbm->msi_first;
101 static void free_msi(struct pci_pbm_info *pbm, int msi_num)
103 msi_num -= pbm->msi_first;
104 clear_bit(msi_num, pbm->msi_bitmap);
107 static struct irq_chip msi_irq = {
108 .typename = "PCI-MSI",
109 .mask = mask_msi_irq,
110 .unmask = unmask_msi_irq,
111 .enable = unmask_msi_irq,
112 .disable = mask_msi_irq,
113 /* XXX affinity XXX */
116 int sparc64_setup_msi_irq(unsigned int *virt_irq_p,
117 struct pci_dev *pdev,
118 struct msi_desc *entry)
120 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
121 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
126 *virt_irq_p = virt_irq_alloc(0, 0);
131 set_irq_chip(*virt_irq_p, &msi_irq);
133 err = alloc_msi(pbm);
134 if (unlikely(err < 0))
135 goto out_virt_irq_free;
139 msiqid = pick_msiq(pbm);
141 err = ops->msi_setup(pbm, msiqid, msi,
142 (entry->msi_attrib.is_64 ? 1 : 0));
146 pbm->msi_irq_table[msi - pbm->msi_first] = *virt_irq_p;
148 if (entry->msi_attrib.is_64) {
149 msg.address_hi = pbm->msi64_start >> 32;
150 msg.address_lo = pbm->msi64_start & 0xffffffff;
153 msg.address_lo = pbm->msi32_start;
157 set_irq_msi(*virt_irq_p, entry);
158 write_msi_msg(*virt_irq_p, &msg);
166 set_irq_chip(*virt_irq_p, NULL);
167 virt_irq_free(*virt_irq_p);
174 void sparc64_teardown_msi_irq(unsigned int virt_irq,
175 struct pci_dev *pdev)
177 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
178 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
179 unsigned int msi_num;
182 for (i = 0; i < pbm->msi_num; i++) {
183 if (pbm->msi_irq_table[i] == virt_irq)
186 if (i >= pbm->msi_num) {
187 printk(KERN_ERR "%s: teardown: No MSI for irq %u\n",
188 pbm->name, virt_irq);
192 msi_num = pbm->msi_first + i;
193 pbm->msi_irq_table[i] = ~0U;
195 err = ops->msi_teardown(pbm, msi_num);
197 printk(KERN_ERR "%s: teardown: ops->teardown() on MSI %u, "
198 "irq %u, gives error %d\n",
199 pbm->name, msi_num, virt_irq, err);
203 free_msi(pbm, msi_num);
205 set_irq_chip(virt_irq, NULL);
206 virt_irq_free(virt_irq);
209 static int msi_bitmap_alloc(struct pci_pbm_info *pbm)
211 unsigned long size, bits_per_ulong;
213 bits_per_ulong = sizeof(unsigned long) * 8;
214 size = (pbm->msi_num + (bits_per_ulong - 1)) & ~(bits_per_ulong - 1);
216 BUG_ON(size % sizeof(unsigned long));
218 pbm->msi_bitmap = kzalloc(size, GFP_KERNEL);
219 if (!pbm->msi_bitmap)
225 static void msi_bitmap_free(struct pci_pbm_info *pbm)
227 kfree(pbm->msi_bitmap);
228 pbm->msi_bitmap = NULL;
231 static int msi_table_alloc(struct pci_pbm_info *pbm)
235 size = pbm->msiq_num * sizeof(struct sparc64_msiq_cookie);
236 pbm->msiq_irq_cookies = kzalloc(size, GFP_KERNEL);
237 if (!pbm->msiq_irq_cookies)
240 for (i = 0; i < pbm->msiq_num; i++) {
241 struct sparc64_msiq_cookie *p;
243 p = &pbm->msiq_irq_cookies[i];
245 p->msiqid = pbm->msiq_first + i;
248 size = pbm->msi_num * sizeof(unsigned int);
249 pbm->msi_irq_table = kzalloc(size, GFP_KERNEL);
250 if (!pbm->msi_irq_table) {
251 kfree(pbm->msiq_irq_cookies);
252 pbm->msiq_irq_cookies = NULL;
259 static void msi_table_free(struct pci_pbm_info *pbm)
261 kfree(pbm->msiq_irq_cookies);
262 pbm->msiq_irq_cookies = NULL;
264 kfree(pbm->msi_irq_table);
265 pbm->msi_irq_table = NULL;
268 static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
269 const struct sparc64_msiq_ops *ops,
270 unsigned long msiqid,
271 unsigned long devino)
273 int irq = ops->msiq_build_irq(pbm, msiqid, devino);
279 err = request_irq(irq, sparc64_msiq_interrupt, 0,
281 &pbm->msiq_irq_cookies[msiqid - pbm->msiq_first]);
288 static int sparc64_bringup_msi_queues(struct pci_pbm_info *pbm,
289 const struct sparc64_msiq_ops *ops)
293 for (i = 0; i < pbm->msiq_num; i++) {
294 unsigned long msiqid = i + pbm->msiq_first;
295 unsigned long devino = i + pbm->msiq_first_devino;
298 err = bringup_one_msi_queue(pbm, ops, msiqid, devino);
306 void sparc64_pbm_msi_init(struct pci_pbm_info *pbm,
307 const struct sparc64_msiq_ops *ops)
312 val = of_get_property(pbm->prom_node, "#msi-eqs", &len);
313 if (!val || len != 4)
315 pbm->msiq_num = *val;
317 const struct msiq_prop {
322 const struct msi_range_prop {
326 const struct addr_range_prop {
335 val = of_get_property(pbm->prom_node, "msi-eq-size", &len);
336 if (!val || len != 4)
339 pbm->msiq_ent_count = *val;
341 mqp = of_get_property(pbm->prom_node,
342 "msi-eq-to-devino", &len);
344 mqp = of_get_property(pbm->prom_node,
345 "msi-eq-devino", &len);
346 if (!mqp || len != sizeof(struct msiq_prop))
349 pbm->msiq_first = mqp->first_msiq;
350 pbm->msiq_first_devino = mqp->first_devino;
352 val = of_get_property(pbm->prom_node, "#msi", &len);
353 if (!val || len != 4)
357 mrng = of_get_property(pbm->prom_node, "msi-ranges", &len);
358 if (!mrng || len != sizeof(struct msi_range_prop))
360 pbm->msi_first = mrng->first_msi;
362 val = of_get_property(pbm->prom_node, "msi-data-mask", &len);
363 if (!val || len != 4)
365 pbm->msi_data_mask = *val;
367 val = of_get_property(pbm->prom_node, "msix-data-width", &len);
368 if (!val || len != 4)
370 pbm->msix_data_width = *val;
372 arng = of_get_property(pbm->prom_node, "msi-address-ranges",
374 if (!arng || len != sizeof(struct addr_range_prop))
376 pbm->msi32_start = ((u64)arng->msi32_high << 32) |
377 (u64) arng->msi32_low;
378 pbm->msi64_start = ((u64)arng->msi64_high << 32) |
379 (u64) arng->msi64_low;
380 pbm->msi32_len = arng->msi32_len;
381 pbm->msi64_len = arng->msi64_len;
383 if (msi_bitmap_alloc(pbm))
386 if (msi_table_alloc(pbm)) {
387 msi_bitmap_free(pbm);
391 if (ops->msiq_alloc(pbm)) {
393 msi_bitmap_free(pbm);
397 if (sparc64_bringup_msi_queues(pbm, ops)) {
400 msi_bitmap_free(pbm);
404 printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
407 pbm->msiq_first, pbm->msiq_num,
409 pbm->msiq_first_devino);
410 printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
413 pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
414 pbm->msix_data_width);
415 printk(KERN_INFO "%s: MSI addr32[0x%lx:0x%x] "
416 "addr64[0x%lx:0x%x]\n",
418 pbm->msi32_start, pbm->msi32_len,
419 pbm->msi64_start, pbm->msi64_len);
420 printk(KERN_INFO "%s: MSI queues at RA [%016lx]\n",
422 __pa(pbm->msi_queues));
425 pbm->setup_msi_irq = sparc64_setup_msi_irq;
426 pbm->teardown_msi_irq = sparc64_teardown_msi_irq;
432 printk(KERN_INFO "%s: No MSI support.\n", pbm->name);