2 * linux/drivers/char/amba.c
4 * Driver for AMBA serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
27 * This is a generic driver for ARM AMBA-type serial ports. They
28 * have a lot of 16550-like features, but are not register compatible.
29 * Note that although they do have CTS, DCD and DSR inputs, they do
30 * not have an RI input, nor do they have DTR or RTS outputs. If
31 * required, these have to be supplied via some other means (eg, GPIO)
32 * and hooked into this driver.
34 #include <linux/config.h>
36 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
40 #include <linux/module.h>
41 #include <linux/ioport.h>
42 #include <linux/init.h>
43 #include <linux/console.h>
44 #include <linux/sysrq.h>
45 #include <linux/device.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 #include <linux/serial_core.h>
49 #include <linux/serial.h>
50 #include <linux/amba/bus.h>
51 #include <linux/amba/serial.h>
55 #include <asm/hardware.h>
59 #define SERIAL_AMBA_MAJOR 204
60 #define SERIAL_AMBA_MINOR 16
61 #define SERIAL_AMBA_NR UART_NR
63 #define AMBA_ISR_PASS_LIMIT 256
66 * Access macros for the AMBA UARTs
68 #define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR)
69 #define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR)
70 #define UART_GET_FR(p) readb((p)->membase + UART01x_FR)
71 #define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR)
72 #define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR)
73 #define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR)
74 #define UART_GET_CR(p) readb((p)->membase + UART010_CR)
75 #define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR)
76 #define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL)
77 #define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL)
78 #define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM)
79 #define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM)
80 #define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH)
81 #define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH)
82 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
83 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
84 #define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0)
86 #define UART_DUMMY_RSR_RX /*256*/0
87 #define UART_PORT_SIZE 64
90 * On the Integrator platform, the port RTS and DTR are provided by
91 * bits in the following SC_CTRLS register bits:
96 #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
97 #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
100 * We wrap our port structure around the generic uart_port.
102 struct uart_amba_port {
103 struct uart_port port;
104 unsigned int dtr_mask;
105 unsigned int rts_mask;
106 unsigned int old_status;
109 static void pl010_stop_tx(struct uart_port *port)
113 cr = UART_GET_CR(port);
114 cr &= ~UART010_CR_TIE;
115 UART_PUT_CR(port, cr);
118 static void pl010_start_tx(struct uart_port *port)
122 cr = UART_GET_CR(port);
123 cr |= UART010_CR_TIE;
124 UART_PUT_CR(port, cr);
127 static void pl010_stop_rx(struct uart_port *port)
131 cr = UART_GET_CR(port);
132 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
133 UART_PUT_CR(port, cr);
136 static void pl010_enable_ms(struct uart_port *port)
140 cr = UART_GET_CR(port);
141 cr |= UART010_CR_MSIE;
142 UART_PUT_CR(port, cr);
147 pl010_rx_chars(struct uart_port *port, struct pt_regs *regs)
149 pl010_rx_chars(struct uart_port *port)
152 struct tty_struct *tty = port->info->tty;
153 unsigned int status, ch, flag, rsr, max_count = 256;
155 status = UART_GET_FR(port);
156 while (UART_RX_DATA(status) && max_count--) {
157 ch = UART_GET_CHAR(port);
163 * Note that the error handling code is
164 * out of the main execution path
166 rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX;
167 if (unlikely(rsr & UART01x_RSR_ANY)) {
168 if (rsr & UART01x_RSR_BE) {
169 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
171 if (uart_handle_break(port))
173 } else if (rsr & UART01x_RSR_PE)
174 port->icount.parity++;
175 else if (rsr & UART01x_RSR_FE)
176 port->icount.frame++;
177 if (rsr & UART01x_RSR_OE)
178 port->icount.overrun++;
180 rsr &= port->read_status_mask;
182 if (rsr & UART01x_RSR_BE)
184 else if (rsr & UART01x_RSR_PE)
186 else if (rsr & UART01x_RSR_FE)
190 if (uart_handle_sysrq_char(port, ch, regs))
193 uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
196 status = UART_GET_FR(port);
198 tty_flip_buffer_push(tty);
202 static void pl010_tx_chars(struct uart_port *port)
204 struct circ_buf *xmit = &port->info->xmit;
208 UART_PUT_CHAR(port, port->x_char);
213 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
218 count = port->fifosize >> 1;
220 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
221 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
223 if (uart_circ_empty(xmit))
225 } while (--count > 0);
227 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
228 uart_write_wakeup(port);
230 if (uart_circ_empty(xmit))
234 static void pl010_modem_status(struct uart_port *port)
236 struct uart_amba_port *uap = (struct uart_amba_port *)port;
237 unsigned int status, delta;
239 UART_PUT_ICR(&uap->port, 0);
241 status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY;
243 delta = status ^ uap->old_status;
244 uap->old_status = status;
249 if (delta & UART01x_FR_DCD)
250 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
252 if (delta & UART01x_FR_DSR)
253 uap->port.icount.dsr++;
255 if (delta & UART01x_FR_CTS)
256 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
258 wake_up_interruptible(&uap->port.info->delta_msr_wait);
261 static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
263 struct uart_port *port = dev_id;
264 unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
267 spin_lock(&port->lock);
269 status = UART_GET_INT_STATUS(port);
272 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
274 pl010_rx_chars(port, regs);
276 pl010_rx_chars(port);
278 if (status & UART010_IIR_MIS)
279 pl010_modem_status(port);
280 if (status & UART010_IIR_TIS)
281 pl010_tx_chars(port);
283 if (pass_counter-- == 0)
286 status = UART_GET_INT_STATUS(port);
287 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
292 spin_unlock(&port->lock);
294 return IRQ_RETVAL(handled);
297 static unsigned int pl010_tx_empty(struct uart_port *port)
299 return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
302 static unsigned int pl010_get_mctrl(struct uart_port *port)
304 unsigned int result = 0;
307 status = UART_GET_FR(port);
308 if (status & UART01x_FR_DCD)
310 if (status & UART01x_FR_DSR)
312 if (status & UART01x_FR_CTS)
318 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
320 struct uart_amba_port *uap = (struct uart_amba_port *)port;
321 unsigned int ctrls = 0, ctrlc = 0;
323 if (mctrl & TIOCM_RTS)
324 ctrlc |= uap->rts_mask;
326 ctrls |= uap->rts_mask;
328 if (mctrl & TIOCM_DTR)
329 ctrlc |= uap->dtr_mask;
331 ctrls |= uap->dtr_mask;
333 __raw_writel(ctrls, SC_CTRLS);
334 __raw_writel(ctrlc, SC_CTRLC);
337 static void pl010_break_ctl(struct uart_port *port, int break_state)
342 spin_lock_irqsave(&port->lock, flags);
343 lcr_h = UART_GET_LCRH(port);
344 if (break_state == -1)
345 lcr_h |= UART01x_LCRH_BRK;
347 lcr_h &= ~UART01x_LCRH_BRK;
348 UART_PUT_LCRH(port, lcr_h);
349 spin_unlock_irqrestore(&port->lock, flags);
352 static int pl010_startup(struct uart_port *port)
354 struct uart_amba_port *uap = (struct uart_amba_port *)port;
360 retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port);
365 * initialise the old status of the modem signals
367 uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY;
370 * Finally, enable interrupts
372 UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE |
378 static void pl010_shutdown(struct uart_port *port)
383 free_irq(port->irq, port);
386 * disable all interrupts, disable the port
388 UART_PUT_CR(port, 0);
390 /* disable break condition and fifos */
391 UART_PUT_LCRH(port, UART_GET_LCRH(port) &
392 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN));
396 pl010_set_termios(struct uart_port *port, struct termios *termios,
399 unsigned int lcr_h, old_cr;
401 unsigned int baud, quot;
404 * Ask the core to calculate the divisor for us.
406 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
407 quot = uart_get_divisor(port, baud);
409 switch (termios->c_cflag & CSIZE) {
411 lcr_h = UART01x_LCRH_WLEN_5;
414 lcr_h = UART01x_LCRH_WLEN_6;
417 lcr_h = UART01x_LCRH_WLEN_7;
420 lcr_h = UART01x_LCRH_WLEN_8;
423 if (termios->c_cflag & CSTOPB)
424 lcr_h |= UART01x_LCRH_STP2;
425 if (termios->c_cflag & PARENB) {
426 lcr_h |= UART01x_LCRH_PEN;
427 if (!(termios->c_cflag & PARODD))
428 lcr_h |= UART01x_LCRH_EPS;
430 if (port->fifosize > 1)
431 lcr_h |= UART01x_LCRH_FEN;
433 spin_lock_irqsave(&port->lock, flags);
436 * Update the per-port timeout.
438 uart_update_timeout(port, termios->c_cflag, baud);
440 port->read_status_mask = UART01x_RSR_OE;
441 if (termios->c_iflag & INPCK)
442 port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
443 if (termios->c_iflag & (BRKINT | PARMRK))
444 port->read_status_mask |= UART01x_RSR_BE;
447 * Characters to ignore
449 port->ignore_status_mask = 0;
450 if (termios->c_iflag & IGNPAR)
451 port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
452 if (termios->c_iflag & IGNBRK) {
453 port->ignore_status_mask |= UART01x_RSR_BE;
455 * If we're ignoring parity and break indicators,
456 * ignore overruns too (for real raw support).
458 if (termios->c_iflag & IGNPAR)
459 port->ignore_status_mask |= UART01x_RSR_OE;
463 * Ignore all characters if CREAD is not set.
465 if ((termios->c_cflag & CREAD) == 0)
466 port->ignore_status_mask |= UART_DUMMY_RSR_RX;
468 /* first, disable everything */
469 old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE;
471 if (UART_ENABLE_MS(port, termios->c_cflag))
472 old_cr |= UART010_CR_MSIE;
474 UART_PUT_CR(port, 0);
478 UART_PUT_LCRM(port, ((quot & 0xf00) >> 8));
479 UART_PUT_LCRL(port, (quot & 0xff));
482 * ----------v----------v----------v----------v-----
483 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
484 * ----------^----------^----------^----------^-----
486 UART_PUT_LCRH(port, lcr_h);
487 UART_PUT_CR(port, old_cr);
489 spin_unlock_irqrestore(&port->lock, flags);
492 static const char *pl010_type(struct uart_port *port)
494 return port->type == PORT_AMBA ? "AMBA" : NULL;
498 * Release the memory region(s) being used by 'port'
500 static void pl010_release_port(struct uart_port *port)
502 release_mem_region(port->mapbase, UART_PORT_SIZE);
506 * Request the memory region(s) being used by 'port'
508 static int pl010_request_port(struct uart_port *port)
510 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
511 != NULL ? 0 : -EBUSY;
515 * Configure/autoconfigure the port.
517 static void pl010_config_port(struct uart_port *port, int flags)
519 if (flags & UART_CONFIG_TYPE) {
520 port->type = PORT_AMBA;
521 pl010_request_port(port);
526 * verify the new serial_struct (for TIOCSSERIAL).
528 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
531 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
533 if (ser->irq < 0 || ser->irq >= NR_IRQS)
535 if (ser->baud_base < 9600)
540 static struct uart_ops amba_pl010_pops = {
541 .tx_empty = pl010_tx_empty,
542 .set_mctrl = pl010_set_mctrl,
543 .get_mctrl = pl010_get_mctrl,
544 .stop_tx = pl010_stop_tx,
545 .start_tx = pl010_start_tx,
546 .stop_rx = pl010_stop_rx,
547 .enable_ms = pl010_enable_ms,
548 .break_ctl = pl010_break_ctl,
549 .startup = pl010_startup,
550 .shutdown = pl010_shutdown,
551 .set_termios = pl010_set_termios,
553 .release_port = pl010_release_port,
554 .request_port = pl010_request_port,
555 .config_port = pl010_config_port,
556 .verify_port = pl010_verify_port,
559 static struct uart_amba_port amba_ports[UART_NR] = {
562 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
563 .mapbase = INTEGRATOR_UART0_BASE,
568 .ops = &amba_pl010_pops,
569 .flags = UPF_BOOT_AUTOCONF,
577 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
578 .mapbase = INTEGRATOR_UART1_BASE,
583 .ops = &amba_pl010_pops,
584 .flags = UPF_BOOT_AUTOCONF,
592 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
595 pl010_console_write(struct console *co, const char *s, unsigned int count)
597 struct uart_port *port = &amba_ports[co->index].port;
598 unsigned int status, old_cr;
602 * First save the CR then disable the interrupts
604 old_cr = UART_GET_CR(port);
605 UART_PUT_CR(port, UART01x_CR_UARTEN);
608 * Now, do each character
610 for (i = 0; i < count; i++) {
612 status = UART_GET_FR(port);
613 } while (!UART_TX_READY(status));
614 UART_PUT_CHAR(port, s[i]);
617 status = UART_GET_FR(port);
618 } while (!UART_TX_READY(status));
619 UART_PUT_CHAR(port, '\r');
624 * Finally, wait for transmitter to become empty
625 * and restore the TCR
628 status = UART_GET_FR(port);
629 } while (status & UART01x_FR_BUSY);
630 UART_PUT_CR(port, old_cr);
634 pl010_console_get_options(struct uart_port *port, int *baud,
635 int *parity, int *bits)
637 if (UART_GET_CR(port) & UART01x_CR_UARTEN) {
638 unsigned int lcr_h, quot;
639 lcr_h = UART_GET_LCRH(port);
642 if (lcr_h & UART01x_LCRH_PEN) {
643 if (lcr_h & UART01x_LCRH_EPS)
649 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
654 quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8;
655 *baud = port->uartclk / (16 * (quot + 1));
659 static int __init pl010_console_setup(struct console *co, char *options)
661 struct uart_port *port;
668 * Check whether an invalid uart number has been specified, and
669 * if so, search for the first available port that does have
672 if (co->index >= UART_NR)
674 port = &amba_ports[co->index].port;
677 uart_parse_options(options, &baud, &parity, &bits, &flow);
679 pl010_console_get_options(port, &baud, &parity, &bits);
681 return uart_set_options(port, co, baud, parity, bits, flow);
684 static struct uart_driver amba_reg;
685 static struct console amba_console = {
687 .write = pl010_console_write,
688 .device = uart_console_device,
689 .setup = pl010_console_setup,
690 .flags = CON_PRINTBUFFER,
695 static int __init amba_console_init(void)
698 * All port initializations are done statically
700 register_console(&amba_console);
703 console_initcall(amba_console_init);
705 static int __init amba_late_console_init(void)
707 if (!(amba_console.flags & CON_ENABLED))
708 register_console(&amba_console);
711 late_initcall(amba_late_console_init);
713 #define AMBA_CONSOLE &amba_console
715 #define AMBA_CONSOLE NULL
718 static struct uart_driver amba_reg = {
719 .owner = THIS_MODULE,
720 .driver_name = "ttyAM",
722 .major = SERIAL_AMBA_MAJOR,
723 .minor = SERIAL_AMBA_MINOR,
725 .cons = AMBA_CONSOLE,
728 static int pl010_probe(struct amba_device *dev, void *id)
732 for (i = 0; i < UART_NR; i++) {
733 if (amba_ports[i].port.mapbase != dev->res.start)
736 amba_ports[i].port.dev = &dev->dev;
737 uart_add_one_port(&amba_reg, &amba_ports[i].port);
738 amba_set_drvdata(dev, &amba_ports[i]);
745 static int pl010_remove(struct amba_device *dev)
747 struct uart_amba_port *uap = amba_get_drvdata(dev);
750 uart_remove_one_port(&amba_reg, &uap->port);
752 amba_set_drvdata(dev, NULL);
757 static int pl010_suspend(struct amba_device *dev, pm_message_t state)
759 struct uart_amba_port *uap = amba_get_drvdata(dev);
762 uart_suspend_port(&amba_reg, &uap->port);
767 static int pl010_resume(struct amba_device *dev)
769 struct uart_amba_port *uap = amba_get_drvdata(dev);
772 uart_resume_port(&amba_reg, &uap->port);
777 static struct amba_id pl010_ids[] __initdata = {
785 static struct amba_driver pl010_driver = {
787 .name = "uart-pl010",
789 .id_table = pl010_ids,
790 .probe = pl010_probe,
791 .remove = pl010_remove,
792 .suspend = pl010_suspend,
793 .resume = pl010_resume,
796 static int __init pl010_init(void)
800 printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
802 ret = uart_register_driver(&amba_reg);
804 ret = amba_driver_register(&pl010_driver);
806 uart_unregister_driver(&amba_reg);
811 static void __exit pl010_exit(void)
813 amba_driver_unregister(&pl010_driver);
814 uart_unregister_driver(&amba_reg);
817 module_init(pl010_init);
818 module_exit(pl010_exit);
820 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
821 MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
822 MODULE_LICENSE("GPL");