3 Broadcom BCM43xx wireless driver
5 DMA ringbuffer and descriptor allocation/management
7 Copyright (c) 2005 Michael Buesch <mbuesch@freenet.de>
9 Some code in this file is derived from the b44.c driver
10 Copyright (C) 2002 David S. Miller
11 Copyright (C) Pekka Pietikainen
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this program; see the file COPYING. If not, write to
25 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26 Boston, MA 02110-1301, USA.
31 #include "bcm43xx_dma.h"
32 #include "bcm43xx_main.h"
33 #include "bcm43xx_debugfs.h"
34 #include "bcm43xx_power.h"
35 #include "bcm43xx_xmit.h"
37 #include <linux/dmapool.h>
38 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/skbuff.h>
41 #include <asm/semaphore.h>
44 static inline int free_slots(struct bcm43xx_dmaring *ring)
46 return (ring->nr_slots - ring->used_slots);
49 static inline int next_slot(struct bcm43xx_dmaring *ring, int slot)
51 assert(slot >= -1 && slot <= ring->nr_slots - 1);
52 if (slot == ring->nr_slots - 1)
57 static inline int prev_slot(struct bcm43xx_dmaring *ring, int slot)
59 assert(slot >= 0 && slot <= ring->nr_slots - 1);
61 return ring->nr_slots - 1;
65 /* Request a slot for usage. */
67 int request_slot(struct bcm43xx_dmaring *ring)
72 assert(!ring->suspended);
73 assert(free_slots(ring) != 0);
75 slot = next_slot(ring, ring->current_slot);
76 ring->current_slot = slot;
79 /* Check the number of available slots and suspend TX,
80 * if we are running low on free slots.
82 if (unlikely(free_slots(ring) < ring->suspend_mark)) {
83 netif_stop_queue(ring->bcm->net_dev);
86 #ifdef CONFIG_BCM43XX_DEBUG
87 if (ring->used_slots > ring->max_used_slots)
88 ring->max_used_slots = ring->used_slots;
89 #endif /* CONFIG_BCM43XX_DEBUG*/
94 /* Return a slot to the free slots. */
96 void return_slot(struct bcm43xx_dmaring *ring, int slot)
102 /* Check if TX is suspended and check if we have
103 * enough free slots to resume it again.
105 if (unlikely(ring->suspended)) {
106 if (free_slots(ring) >= ring->resume_mark) {
108 netif_wake_queue(ring->bcm->net_dev);
114 dma_addr_t map_descbuffer(struct bcm43xx_dmaring *ring,
122 dmaaddr = dma_map_single(&ring->bcm->pci_dev->dev,
126 dmaaddr = dma_map_single(&ring->bcm->pci_dev->dev,
135 void unmap_descbuffer(struct bcm43xx_dmaring *ring,
141 dma_unmap_single(&ring->bcm->pci_dev->dev,
145 dma_unmap_single(&ring->bcm->pci_dev->dev,
152 void sync_descbuffer_for_cpu(struct bcm43xx_dmaring *ring,
158 dma_sync_single_for_cpu(&ring->bcm->pci_dev->dev,
159 addr, len, DMA_FROM_DEVICE);
163 void sync_descbuffer_for_device(struct bcm43xx_dmaring *ring,
169 dma_sync_single_for_device(&ring->bcm->pci_dev->dev,
170 addr, len, DMA_FROM_DEVICE);
174 void mark_skb_mustfree(struct sk_buff *skb,
177 skb->cb[0] = mustfree;
181 int skb_mustfree(struct sk_buff *skb)
183 return (skb->cb[0] != 0);
186 /* Unmap and free a descriptor buffer. */
188 void free_descriptor_buffer(struct bcm43xx_dmaring *ring,
189 struct bcm43xx_dmadesc *desc,
190 struct bcm43xx_dmadesc_meta *meta,
194 if (skb_mustfree(meta->skb)) {
196 dev_kfree_skb_irq(meta->skb);
198 dev_kfree_skb(meta->skb);
202 ieee80211_txb_free(meta->txb);
207 static int alloc_ringmemory(struct bcm43xx_dmaring *ring)
209 struct device *dev = &(ring->bcm->pci_dev->dev);
211 ring->vbase = dma_alloc_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
212 &(ring->dmabase), GFP_KERNEL);
214 printk(KERN_ERR PFX "DMA ringmemory allocation failed\n");
217 if (ring->dmabase + BCM43xx_DMA_RINGMEMSIZE > BCM43xx_DMA_BUSADDRMAX) {
218 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA RINGMEMORY >1G "
219 "(0x%08x, len: %lu)\n",
220 ring->dmabase, BCM43xx_DMA_RINGMEMSIZE);
221 dma_free_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
222 ring->vbase, ring->dmabase);
225 assert(!(ring->dmabase & 0x000003FF));
226 memset(ring->vbase, 0, BCM43xx_DMA_RINGMEMSIZE);
231 static void free_ringmemory(struct bcm43xx_dmaring *ring)
233 struct device *dev = &(ring->bcm->pci_dev->dev);
235 dma_free_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
236 ring->vbase, ring->dmabase);
239 /* Reset the RX DMA channel */
240 int bcm43xx_dmacontroller_rx_reset(struct bcm43xx_private *bcm,
247 mmio_base + BCM43xx_DMA_RX_CONTROL,
249 for (i = 0; i < 1000; i++) {
250 value = bcm43xx_read32(bcm,
251 mmio_base + BCM43xx_DMA_RX_STATUS);
252 value &= BCM43xx_DMA_RXSTAT_STAT_MASK;
253 if (value == BCM43xx_DMA_RXSTAT_STAT_DISABLED) {
260 printk(KERN_ERR PFX "Error: Wait on DMA RX status timed out.\n");
267 /* Reset the RX DMA channel */
268 int bcm43xx_dmacontroller_tx_reset(struct bcm43xx_private *bcm,
274 for (i = 0; i < 1000; i++) {
275 value = bcm43xx_read32(bcm,
276 mmio_base + BCM43xx_DMA_TX_STATUS);
277 value &= BCM43xx_DMA_TXSTAT_STAT_MASK;
278 if (value == BCM43xx_DMA_TXSTAT_STAT_DISABLED ||
279 value == BCM43xx_DMA_TXSTAT_STAT_IDLEWAIT ||
280 value == BCM43xx_DMA_TXSTAT_STAT_STOPPED)
285 mmio_base + BCM43xx_DMA_TX_CONTROL,
287 for (i = 0; i < 1000; i++) {
288 value = bcm43xx_read32(bcm,
289 mmio_base + BCM43xx_DMA_TX_STATUS);
290 value &= BCM43xx_DMA_TXSTAT_STAT_MASK;
291 if (value == BCM43xx_DMA_TXSTAT_STAT_DISABLED) {
298 printk(KERN_ERR PFX "Error: Wait on DMA TX status timed out.\n");
301 /* ensure the reset is completed. */
307 static int setup_rx_descbuffer(struct bcm43xx_dmaring *ring,
308 struct bcm43xx_dmadesc *desc,
309 struct bcm43xx_dmadesc_meta *meta,
312 struct bcm43xx_rxhdr *rxhdr;
316 const int slot = (int)(desc - ring->vbase);
319 assert(slot >= 0 && slot < ring->nr_slots);
322 skb = __dev_alloc_skb(ring->rx_buffersize, gfp_flags);
325 dmaaddr = map_descbuffer(ring, skb->data, ring->rx_buffersize, 0);
326 if (unlikely(dmaaddr + ring->rx_buffersize > BCM43xx_DMA_BUSADDRMAX)) {
327 unmap_descbuffer(ring, dmaaddr, ring->rx_buffersize, 0);
328 dev_kfree_skb_any(skb);
329 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA RX SKB >1G "
330 "(0x%08x, len: %u)\n",
331 dmaaddr, ring->rx_buffersize);
335 meta->dmaaddr = dmaaddr;
336 skb->dev = ring->bcm->net_dev;
337 mark_skb_mustfree(skb, 1);
338 desc_addr = (u32)(dmaaddr + ring->memoffset);
339 desc_ctl = (BCM43xx_DMADTOR_BYTECNT_MASK &
340 (u32)(ring->rx_buffersize - ring->frameoffset));
341 if (slot == ring->nr_slots - 1)
342 desc_ctl |= BCM43xx_DMADTOR_DTABLEEND;
343 set_desc_addr(desc, desc_addr);
344 set_desc_ctl(desc, desc_ctl);
346 rxhdr = (struct bcm43xx_rxhdr *)(skb->data);
347 rxhdr->frame_length = 0;
353 /* Allocate the initial descbuffers.
354 * This is used for an RX ring only.
356 static int alloc_initial_descbuffers(struct bcm43xx_dmaring *ring)
358 int i, err = -ENOMEM;
359 struct bcm43xx_dmadesc *desc;
360 struct bcm43xx_dmadesc_meta *meta;
362 for (i = 0; i < ring->nr_slots; i++) {
363 desc = ring->vbase + i;
364 meta = ring->meta + i;
366 err = setup_rx_descbuffer(ring, desc, meta, GFP_KERNEL);
370 ring->used_slots = ring->nr_slots;
376 for (i--; i >= 0; i--) {
377 desc = ring->vbase + i;
378 meta = ring->meta + i;
380 unmap_descbuffer(ring, meta->dmaaddr, ring->rx_buffersize, 0);
381 dev_kfree_skb(meta->skb);
386 /* Do initial setup of the DMA controller.
387 * Reset the controller, write the ring busaddress
388 * and switch the "enable" bit on.
390 static int dmacontroller_setup(struct bcm43xx_dmaring *ring)
396 /* Set Transmit Control register to "transmit enable" */
397 bcm43xx_write32(ring->bcm,
398 ring->mmio_base + BCM43xx_DMA_TX_CONTROL,
399 BCM43xx_DMA_TXCTRL_ENABLE);
400 /* Set Transmit Descriptor ring address. */
401 bcm43xx_write32(ring->bcm,
402 ring->mmio_base + BCM43xx_DMA_TX_DESC_RING,
403 ring->dmabase + ring->memoffset);
405 err = alloc_initial_descbuffers(ring);
408 /* Set Receive Control "receive enable" and frame offset */
409 value = (ring->frameoffset << BCM43xx_DMA_RXCTRL_FRAMEOFF_SHIFT);
410 value |= BCM43xx_DMA_RXCTRL_ENABLE;
411 bcm43xx_write32(ring->bcm,
412 ring->mmio_base + BCM43xx_DMA_RX_CONTROL,
414 /* Set Receive Descriptor ring address. */
415 bcm43xx_write32(ring->bcm,
416 ring->mmio_base + BCM43xx_DMA_RX_DESC_RING,
417 ring->dmabase + ring->memoffset);
418 /* Init the descriptor pointer. */
419 bcm43xx_write32(ring->bcm,
420 ring->mmio_base + BCM43xx_DMA_RX_DESC_INDEX,
428 /* Shutdown the DMA controller. */
429 static void dmacontroller_cleanup(struct bcm43xx_dmaring *ring)
432 bcm43xx_dmacontroller_tx_reset(ring->bcm, ring->mmio_base);
433 /* Zero out Transmit Descriptor ring address. */
434 bcm43xx_write32(ring->bcm,
435 ring->mmio_base + BCM43xx_DMA_TX_DESC_RING,
438 bcm43xx_dmacontroller_rx_reset(ring->bcm, ring->mmio_base);
439 /* Zero out Receive Descriptor ring address. */
440 bcm43xx_write32(ring->bcm,
441 ring->mmio_base + BCM43xx_DMA_RX_DESC_RING,
446 static void free_all_descbuffers(struct bcm43xx_dmaring *ring)
448 struct bcm43xx_dmadesc *desc;
449 struct bcm43xx_dmadesc_meta *meta;
452 if (!ring->used_slots)
454 for (i = 0; i < ring->nr_slots; i++) {
455 desc = ring->vbase + i;
456 meta = ring->meta + i;
464 unmap_descbuffer(ring, meta->dmaaddr,
467 unmap_descbuffer(ring, meta->dmaaddr,
468 ring->rx_buffersize, 0);
470 free_descriptor_buffer(ring, desc, meta, 0);
474 /* Main initialization function. */
476 struct bcm43xx_dmaring * bcm43xx_setup_dmaring(struct bcm43xx_private *bcm,
477 u16 dma_controller_base,
478 int nr_descriptor_slots,
481 struct bcm43xx_dmaring *ring;
484 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
488 ring->meta = kzalloc(sizeof(*ring->meta) * nr_descriptor_slots,
493 ring->memoffset = BCM43xx_DMA_DMABUSADDROFFSET;
494 #ifdef CONFIG_BCM947XX
495 if (bcm->pci_dev->bus->number == 0)
500 ring->nr_slots = nr_descriptor_slots;
501 ring->suspend_mark = ring->nr_slots * BCM43xx_TXSUSPEND_PERCENT / 100;
502 ring->resume_mark = ring->nr_slots * BCM43xx_TXRESUME_PERCENT / 100;
503 assert(ring->suspend_mark < ring->resume_mark);
504 ring->mmio_base = dma_controller_base;
507 ring->current_slot = -1;
509 switch (dma_controller_base) {
510 case BCM43xx_MMIO_DMA1_BASE:
511 ring->rx_buffersize = BCM43xx_DMA1_RXBUFFERSIZE;
512 ring->frameoffset = BCM43xx_DMA1_RX_FRAMEOFFSET;
514 case BCM43xx_MMIO_DMA4_BASE:
515 ring->rx_buffersize = BCM43xx_DMA4_RXBUFFERSIZE;
516 ring->frameoffset = BCM43xx_DMA4_RX_FRAMEOFFSET;
523 err = alloc_ringmemory(ring);
526 err = dmacontroller_setup(ring);
528 goto err_free_ringmemory;
534 free_ringmemory(ring);
543 /* Main cleanup function. */
544 static void bcm43xx_destroy_dmaring(struct bcm43xx_dmaring *ring)
549 dprintk(KERN_INFO PFX "DMA 0x%04x (%s) max used slots: %d/%d\n",
551 (ring->tx) ? "TX" : "RX",
552 ring->max_used_slots, ring->nr_slots);
553 /* Device IRQs are disabled prior entering this function,
554 * so no need to take care of concurrency with rx handler stuff.
556 dmacontroller_cleanup(ring);
557 free_all_descbuffers(ring);
558 free_ringmemory(ring);
564 void bcm43xx_dma_free(struct bcm43xx_private *bcm)
566 struct bcm43xx_dma *dma = bcm->current_core->dma;
568 bcm43xx_destroy_dmaring(dma->rx_ring1);
569 dma->rx_ring1 = NULL;
570 bcm43xx_destroy_dmaring(dma->rx_ring0);
571 dma->rx_ring0 = NULL;
572 bcm43xx_destroy_dmaring(dma->tx_ring3);
573 dma->tx_ring3 = NULL;
574 bcm43xx_destroy_dmaring(dma->tx_ring2);
575 dma->tx_ring2 = NULL;
576 bcm43xx_destroy_dmaring(dma->tx_ring1);
577 dma->tx_ring1 = NULL;
578 bcm43xx_destroy_dmaring(dma->tx_ring0);
579 dma->tx_ring0 = NULL;
582 int bcm43xx_dma_init(struct bcm43xx_private *bcm)
584 struct bcm43xx_dma *dma = bcm->current_core->dma;
585 struct bcm43xx_dmaring *ring;
588 /* setup TX DMA channels. */
589 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA1_BASE,
590 BCM43xx_TXRING_SLOTS, 1);
593 dma->tx_ring0 = ring;
595 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA2_BASE,
596 BCM43xx_TXRING_SLOTS, 1);
598 goto err_destroy_tx0;
599 dma->tx_ring1 = ring;
601 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA3_BASE,
602 BCM43xx_TXRING_SLOTS, 1);
604 goto err_destroy_tx1;
605 dma->tx_ring2 = ring;
607 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA4_BASE,
608 BCM43xx_TXRING_SLOTS, 1);
610 goto err_destroy_tx2;
611 dma->tx_ring3 = ring;
613 /* setup RX DMA channels. */
614 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA1_BASE,
615 BCM43xx_RXRING_SLOTS, 0);
617 goto err_destroy_tx3;
618 dma->rx_ring0 = ring;
620 if (bcm->current_core->rev < 5) {
621 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA4_BASE,
622 BCM43xx_RXRING_SLOTS, 0);
624 goto err_destroy_rx0;
625 dma->rx_ring1 = ring;
628 dprintk(KERN_INFO PFX "DMA initialized\n");
634 bcm43xx_destroy_dmaring(dma->rx_ring0);
635 dma->rx_ring0 = NULL;
637 bcm43xx_destroy_dmaring(dma->tx_ring3);
638 dma->tx_ring3 = NULL;
640 bcm43xx_destroy_dmaring(dma->tx_ring2);
641 dma->tx_ring2 = NULL;
643 bcm43xx_destroy_dmaring(dma->tx_ring1);
644 dma->tx_ring1 = NULL;
646 bcm43xx_destroy_dmaring(dma->tx_ring0);
647 dma->tx_ring0 = NULL;
651 /* Generate a cookie for the TX header. */
652 static u16 generate_cookie(struct bcm43xx_dmaring *ring,
657 /* Use the upper 4 bits of the cookie as
658 * DMA controller ID and store the slot number
659 * in the lower 12 bits
661 switch (ring->mmio_base) {
664 case BCM43xx_MMIO_DMA1_BASE:
666 case BCM43xx_MMIO_DMA2_BASE:
669 case BCM43xx_MMIO_DMA3_BASE:
672 case BCM43xx_MMIO_DMA4_BASE:
676 assert(((u16)slot & 0xF000) == 0x0000);
682 /* Inspect a cookie and find out to which controller/slot it belongs. */
684 struct bcm43xx_dmaring * parse_cookie(struct bcm43xx_private *bcm,
685 u16 cookie, int *slot)
687 struct bcm43xx_dma *dma = bcm->current_core->dma;
688 struct bcm43xx_dmaring *ring = NULL;
690 switch (cookie & 0xF000) {
692 ring = dma->tx_ring0;
695 ring = dma->tx_ring1;
698 ring = dma->tx_ring2;
701 ring = dma->tx_ring3;
706 *slot = (cookie & 0x0FFF);
707 assert(*slot >= 0 && *slot < ring->nr_slots);
712 static void dmacontroller_poke_tx(struct bcm43xx_dmaring *ring,
715 /* Everything is ready to start. Buffers are DMA mapped and
716 * associated with slots.
717 * "slot" is the last slot of the new frame we want to transmit.
718 * Close your seat belts now, please.
721 slot = next_slot(ring, slot);
722 bcm43xx_write32(ring->bcm,
723 ring->mmio_base + BCM43xx_DMA_TX_DESC_INDEX,
724 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
727 static int dma_tx_fragment(struct bcm43xx_dmaring *ring,
729 struct ieee80211_txb *txb,
733 struct bcm43xx_dmadesc *desc;
734 struct bcm43xx_dmadesc_meta *meta;
738 assert(skb_shinfo(skb)->nr_frags == 0);
740 slot = request_slot(ring);
741 desc = ring->vbase + slot;
742 meta = ring->meta + slot;
745 /* Save the txb pointer for freeing in xmitstatus IRQ */
749 /* Add a device specific TX header. */
750 assert(skb_headroom(skb) >= sizeof(struct bcm43xx_txhdr));
751 /* Reserve enough headroom for the device tx header. */
752 __skb_push(skb, sizeof(struct bcm43xx_txhdr));
753 /* Now calculate and add the tx header.
754 * The tx header includes the PLCP header.
756 bcm43xx_generate_txhdr(ring->bcm,
757 (struct bcm43xx_txhdr *)skb->data,
758 skb->data + sizeof(struct bcm43xx_txhdr),
759 skb->len - sizeof(struct bcm43xx_txhdr),
761 generate_cookie(ring, slot));
764 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
765 if (unlikely(meta->dmaaddr + skb->len > BCM43xx_DMA_BUSADDRMAX)) {
766 return_slot(ring, slot);
767 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA TX SKB >1G "
768 "(0x%08x, len: %u)\n",
769 meta->dmaaddr, skb->len);
773 desc_addr = (u32)(meta->dmaaddr + ring->memoffset);
774 desc_ctl = BCM43xx_DMADTOR_FRAMESTART | BCM43xx_DMADTOR_FRAMEEND;
775 desc_ctl |= BCM43xx_DMADTOR_COMPIRQ;
776 desc_ctl |= (BCM43xx_DMADTOR_BYTECNT_MASK &
777 (u32)(meta->skb->len - ring->frameoffset));
778 if (slot == ring->nr_slots - 1)
779 desc_ctl |= BCM43xx_DMADTOR_DTABLEEND;
781 set_desc_ctl(desc, desc_ctl);
782 set_desc_addr(desc, desc_addr);
783 /* Now transfer the whole frame. */
784 dmacontroller_poke_tx(ring, slot);
789 int bcm43xx_dma_tx(struct bcm43xx_private *bcm,
790 struct ieee80211_txb *txb)
792 /* We just received a packet from the kernel network subsystem.
793 * Add headers and DMA map the memory. Poke
794 * the device to send the stuff.
795 * Note that this is called from atomic context.
797 struct bcm43xx_dmaring *ring = bcm->current_core->dma->tx_ring1;
802 if (unlikely(free_slots(ring) < txb->nr_frags)) {
803 /* The queue should be stopped,
804 * if we are low on free slots.
805 * If this ever triggers, we have to lower the suspend_mark.
807 dprintkl(KERN_ERR PFX "Out of DMA descriptor slots!\n");
811 for (i = 0; i < txb->nr_frags; i++) {
812 skb = txb->fragments[i];
813 /* We do not free the skb, as it is freed as
814 * part of the txb freeing.
816 mark_skb_mustfree(skb, 0);
817 dma_tx_fragment(ring, skb, txb, i);
818 //TODO: handle failure of dma_tx_fragment
824 void bcm43xx_dma_handle_xmitstatus(struct bcm43xx_private *bcm,
825 struct bcm43xx_xmitstatus *status)
827 struct bcm43xx_dmaring *ring;
828 struct bcm43xx_dmadesc *desc;
829 struct bcm43xx_dmadesc_meta *meta;
830 int is_last_fragment;
833 ring = parse_cookie(bcm, status->cookie, &slot);
836 assert(get_desc_ctl(ring->vbase + slot) & BCM43xx_DMADTOR_FRAMESTART);
838 assert(slot >= 0 && slot < ring->nr_slots);
839 desc = ring->vbase + slot;
840 meta = ring->meta + slot;
842 is_last_fragment = !!(get_desc_ctl(desc) & BCM43xx_DMADTOR_FRAMEEND);
843 unmap_descbuffer(ring, meta->dmaaddr, meta->skb->len, 1);
844 free_descriptor_buffer(ring, desc, meta, 1);
845 /* Everything belonging to the slot is unmapped
846 * and freed, so we can return it.
848 return_slot(ring, slot);
850 if (is_last_fragment)
852 slot = next_slot(ring, slot);
854 bcm->stats.last_tx = jiffies;
857 static void dma_rx(struct bcm43xx_dmaring *ring,
860 struct bcm43xx_dmadesc *desc;
861 struct bcm43xx_dmadesc_meta *meta;
862 struct bcm43xx_rxhdr *rxhdr;
868 desc = ring->vbase + *slot;
869 meta = ring->meta + *slot;
871 sync_descbuffer_for_cpu(ring, meta->dmaaddr, ring->rx_buffersize);
874 if (ring->mmio_base == BCM43xx_MMIO_DMA4_BASE) {
875 /* We received an xmit status. */
876 struct bcm43xx_hwxmitstatus *hw = (struct bcm43xx_hwxmitstatus *)skb->data;
877 struct bcm43xx_xmitstatus stat;
879 stat.cookie = le16_to_cpu(hw->cookie);
880 stat.flags = hw->flags;
881 stat.cnt1 = hw->cnt1;
882 stat.cnt2 = hw->cnt2;
883 stat.seq = le16_to_cpu(hw->seq);
884 stat.unknown = le16_to_cpu(hw->unknown);
886 bcm43xx_debugfs_log_txstat(ring->bcm, &stat);
887 bcm43xx_dma_handle_xmitstatus(ring->bcm, &stat);
888 /* recycle the descriptor buffer. */
889 sync_descbuffer_for_device(ring, meta->dmaaddr, ring->rx_buffersize);
893 rxhdr = (struct bcm43xx_rxhdr *)skb->data;
894 len = le16_to_cpu(rxhdr->frame_length);
901 len = le16_to_cpu(rxhdr->frame_length);
902 } while (len == 0 && i++ < 5);
903 if (unlikely(len == 0)) {
904 /* recycle the descriptor buffer. */
905 sync_descbuffer_for_device(ring, meta->dmaaddr,
906 ring->rx_buffersize);
910 if (unlikely(len > ring->rx_buffersize)) {
911 /* The data did not fit into one descriptor buffer
912 * and is split over multiple buffers.
913 * This should never happen, as we try to allocate buffers
914 * big enough. So simply ignore this packet.
920 desc = ring->vbase + *slot;
921 meta = ring->meta + *slot;
922 /* recycle the descriptor buffer. */
923 sync_descbuffer_for_device(ring, meta->dmaaddr,
924 ring->rx_buffersize);
925 *slot = next_slot(ring, *slot);
927 tmp -= ring->rx_buffersize;
931 printkl(KERN_ERR PFX "DMA RX buffer too small "
932 "(len: %u, buffer: %u, nr-dropped: %d)\n",
933 len, ring->rx_buffersize, cnt);
936 len -= IEEE80211_FCS_LEN;
938 dmaaddr = meta->dmaaddr;
939 err = setup_rx_descbuffer(ring, desc, meta, GFP_ATOMIC);
941 dprintkl(KERN_ERR PFX "DMA RX: setup_rx_descbuffer() failed\n");
942 sync_descbuffer_for_device(ring, dmaaddr,
943 ring->rx_buffersize);
947 unmap_descbuffer(ring, dmaaddr, ring->rx_buffersize, 0);
948 skb_put(skb, len + ring->frameoffset);
949 skb_pull(skb, ring->frameoffset);
951 err = bcm43xx_rx(ring->bcm, skb, rxhdr);
953 dev_kfree_skb_irq(skb);
961 void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring)
965 int slot, current_slot;
966 #ifdef CONFIG_BCM43XX_DEBUG
971 status = bcm43xx_read32(ring->bcm, ring->mmio_base + BCM43xx_DMA_RX_STATUS);
972 descptr = (status & BCM43xx_DMA_RXSTAT_DPTR_MASK);
973 current_slot = descptr / sizeof(struct bcm43xx_dmadesc);
974 assert(current_slot >= 0 && current_slot < ring->nr_slots);
976 slot = ring->current_slot;
977 for ( ; slot != current_slot; slot = next_slot(ring, slot)) {
979 #ifdef CONFIG_BCM43XX_DEBUG
980 if (++used_slots > ring->max_used_slots)
981 ring->max_used_slots = used_slots;
984 bcm43xx_write32(ring->bcm,
985 ring->mmio_base + BCM43xx_DMA_RX_DESC_INDEX,
986 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
987 ring->current_slot = slot;
990 /* vim: set ts=8 sw=8 sts=8: */