git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-pxa/mainstone.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/mainstone.c
   3  *
   4  *  Support for the Intel HCDDBBVA0 Development Platform.
   5  *  (go figure how they came up with such name...)
   6  *
   7  *  Author:     Nicolas Pitre
   8  *  Created:    Nov 05, 2002
   9  *  Copyright:  MontaVista Software Inc.
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License version 2 as
  13  *  published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <linux/input.h>
  27 #include <linux/gpio_keys.h>
  28 #include <linux/pwm_backlight.h>
  29 #include <linux/smc91x.h>
  30
  31 #include <asm/types.h>
  32 #include <asm/setup.h>
  33 #include <asm/memory.h>
  34 #include <asm/mach-types.h>
  35 #include <mach/hardware.h>
  36 #include <asm/irq.h>
  37 #include <asm/sizes.h>
  38
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/map.h>
  41 #include <asm/mach/irq.h>
  42 #include <asm/mach/flash.h>
  43
  44 #include <mach/pxa-regs.h>
  45 #include <mach/pxa2xx-regs.h>
  46 #include <mach/mfp-pxa27x.h>
  47 #include <mach/mainstone.h>
  48 #include <mach/audio.h>
  49 #include <mach/pxafb.h>
  50 #include <mach/i2c.h>
  51 #include <mach/mmc.h>
  52 #include <mach/irda.h>
  53 #include <mach/ohci.h>
  54 #include <mach/pxa27x_keypad.h>
  55
  56 #include "generic.h"
  57 #include "devices.h"
  58
  59 static unsigned long mainstone_pin_config[] = {
  60         /* Chip Select */
  61         GPIO15_nCS_1,
  62
  63         /* LCD - 16bpp Active TFT */
  64         GPIO58_LCD_LDD_0,
  65         GPIO59_LCD_LDD_1,
  66         GPIO60_LCD_LDD_2,
  67         GPIO61_LCD_LDD_3,
  68         GPIO62_LCD_LDD_4,
  69         GPIO63_LCD_LDD_5,
  70         GPIO64_LCD_LDD_6,
  71         GPIO65_LCD_LDD_7,
  72         GPIO66_LCD_LDD_8,
  73         GPIO67_LCD_LDD_9,
  74         GPIO68_LCD_LDD_10,
  75         GPIO69_LCD_LDD_11,
  76         GPIO70_LCD_LDD_12,
  77         GPIO71_LCD_LDD_13,
  78         GPIO72_LCD_LDD_14,
  79         GPIO73_LCD_LDD_15,
  80         GPIO74_LCD_FCLK,
  81         GPIO75_LCD_LCLK,
  82         GPIO76_LCD_PCLK,
  83         GPIO77_LCD_BIAS,
  84         GPIO16_PWM0_OUT,        /* Backlight */
  85
  86         /* MMC */
  87         GPIO32_MMC_CLK,
  88         GPIO112_MMC_CMD,
  89         GPIO92_MMC_DAT_0,
  90         GPIO109_MMC_DAT_1,
  91         GPIO110_MMC_DAT_2,
  92         GPIO111_MMC_DAT_3,
  93
  94         /* USB Host Port 1 */
  95         GPIO88_USBH1_PWR,
  96         GPIO89_USBH1_PEN,
  97
  98         /* PC Card */
  99         GPIO48_nPOE,
 100         GPIO49_nPWE,
 101         GPIO50_nPIOR,
 102         GPIO51_nPIOW,
 103         GPIO85_nPCE_1,
 104         GPIO54_nPCE_2,
 105         GPIO79_PSKTSEL,
 106         GPIO55_nPREG,
 107         GPIO56_nPWAIT,
 108         GPIO57_nIOIS16,
 109
 110         /* AC97 */
 111         GPIO45_AC97_SYSCLK,
 112
 113         /* Keypad */
 114         GPIO93_KP_DKIN_0,
 115         GPIO94_KP_DKIN_1,
 116         GPIO95_KP_DKIN_2,
 117         GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
 118         GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
 119         GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
 120         GPIO97_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
 121         GPIO98_KP_MKIN_4        | WAKEUP_ON_LEVEL_HIGH,
 122         GPIO99_KP_MKIN_5        | WAKEUP_ON_LEVEL_HIGH,
 123         GPIO103_KP_MKOUT_0,
 124         GPIO104_KP_MKOUT_1,
 125         GPIO105_KP_MKOUT_2,
 126         GPIO106_KP_MKOUT_3,
 127         GPIO107_KP_MKOUT_4,
 128         GPIO108_KP_MKOUT_5,
 129         GPIO96_KP_MKOUT_6,
 130
 131         /* GPIO */
 132         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
 133 };
 134
 135 static unsigned long mainstone_irq_enabled;
 136
 137 static void mainstone_mask_irq(unsigned int irq)
 138 {
 139         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
 140         MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
 141 }
 142
 143 static void mainstone_unmask_irq(unsigned int irq)
 144 {
 145         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
 146         /* the irq can be acknowledged only if deasserted, so it's done here */
 147         MST_INTSETCLR &= ~(1 << mainstone_irq);
 148         MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
 149 }
 150
 151 static struct irq_chip mainstone_irq_chip = {
 152         .name           = "FPGA",
 153         .ack            = mainstone_mask_irq,
 154         .mask           = mainstone_mask_irq,
 155         .unmask         = mainstone_unmask_irq,
 156 };
 157
 158 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
 159 {
 160         unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
 161         do {
 162                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
 163                 if (likely(pending)) {
 164                         irq = MAINSTONE_IRQ(0) + __ffs(pending);
 165                         desc = irq_desc + irq;
 166                         desc_handle_irq(irq, desc);
 167                 }
 168                 pending = MST_INTSETCLR & mainstone_irq_enabled;
 169         } while (pending);
 170 }
 171
 172 static void __init mainstone_init_irq(void)
 173 {
 174         int irq;
 175
 176         pxa27x_init_irq();
 177
 178         /* setup extra Mainstone irqs */
 179         for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
 180                 set_irq_chip(irq, &mainstone_irq_chip);
 181                 set_irq_handler(irq, handle_level_irq);
 182                 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
 183                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
 184                 else
 185                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 186         }
 187         set_irq_flags(MAINSTONE_IRQ(8), 0);
 188         set_irq_flags(MAINSTONE_IRQ(12), 0);
 189
 190         MST_INTMSKENA = 0;
 191         MST_INTSETCLR = 0;
 192
 193         set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
 194         set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 195 }
 196
 197 #ifdef CONFIG_PM
 198
 199 static int mainstone_irq_resume(struct sys_device *dev)
 200 {
 201         MST_INTMSKENA = mainstone_irq_enabled;
 202         return 0;
 203 }
 204
 205 static struct sysdev_class mainstone_irq_sysclass = {
 206         .name = "cpld_irq",
 207         .resume = mainstone_irq_resume,
 208 };
 209
 210 static struct sys_device mainstone_irq_device = {
 211         .cls = &mainstone_irq_sysclass,
 212 };
 213
 214 static int __init mainstone_irq_device_init(void)
 215 {
 216         int ret = -ENODEV;
 217
 218         if (machine_is_mainstone()) {
 219                 ret = sysdev_class_register(&mainstone_irq_sysclass);
 220                 if (ret == 0)
 221                         ret = sysdev_register(&mainstone_irq_device);
 222         }
 223         return ret;
 224 }
 225
 226 device_initcall(mainstone_irq_device_init);
 227
 228 #endif
 229
 230
 231 static struct resource smc91x_resources[] = {
 232         [0] = {
 233                 .start  = (MST_ETH_PHYS + 0x300),
 234                 .end    = (MST_ETH_PHYS + 0xfffff),
 235                 .flags  = IORESOURCE_MEM,
 236         },
 237         [1] = {
 238                 .start  = MAINSTONE_IRQ(3),
 239                 .end    = MAINSTONE_IRQ(3),
 240                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 241         }
 242 };
 243
 244 static struct smc91x_platdata mainstone_smc91x_info = {
 245         .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
 246                   SMC91X_NOWAIT | SMC91X_USE_DMA,
 247 };
 248
 249 static struct platform_device smc91x_device = {
 250         .name           = "smc91x",
 251         .id             = 0,
 252         .num_resources  = ARRAY_SIZE(smc91x_resources),
 253         .resource       = smc91x_resources,
 254         .dev            = {
 255                 .platform_data = &mainstone_smc91x_info,
 256         },
 257 };
 258
 259 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
 260 {
 261         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 262                 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
 263         return 0;
 264 }
 265
 266 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
 267 {
 268         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 269                 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
 270 }
 271
 272 static long mst_audio_suspend_mask;
 273
 274 static void mst_audio_suspend(void *priv)
 275 {
 276         mst_audio_suspend_mask = MST_MSCWR2;
 277         MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
 278 }
 279
 280 static void mst_audio_resume(void *priv)
 281 {
 282         MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
 283 }
 284
 285 static pxa2xx_audio_ops_t mst_audio_ops = {
 286         .startup        = mst_audio_startup,
 287         .shutdown       = mst_audio_shutdown,
 288         .suspend        = mst_audio_suspend,
 289         .resume         = mst_audio_resume,
 290 };
 291
 292 static struct resource flash_resources[] = {
 293         [0] = {
 294                 .start  = PXA_CS0_PHYS,
 295                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
 296                 .flags  = IORESOURCE_MEM,
 297         },
 298         [1] = {
 299                 .start  = PXA_CS1_PHYS,
 300                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
 301                 .flags  = IORESOURCE_MEM,
 302         },
 303 };
 304
 305 static struct mtd_partition mainstoneflash0_partitions[] = {
 306         {
 307                 .name =         "Bootloader",
 308                 .size =         0x00040000,
 309                 .offset =       0,
 310                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
 311         },{
 312                 .name =         "Kernel",
 313                 .size =         0x00400000,
 314                 .offset =       0x00040000,
 315         },{
 316                 .name =         "Filesystem",
 317                 .size =         MTDPART_SIZ_FULL,
 318                 .offset =       0x00440000
 319         }
 320 };
 321
 322 static struct flash_platform_data mst_flash_data[2] = {
 323         {
 324                 .map_name       = "cfi_probe",
 325                 .parts          = mainstoneflash0_partitions,
 326                 .nr_parts       = ARRAY_SIZE(mainstoneflash0_partitions),
 327         }, {
 328                 .map_name       = "cfi_probe",
 329                 .parts          = NULL,
 330                 .nr_parts       = 0,
 331         }
 332 };
 333
 334 static struct platform_device mst_flash_device[2] = {
 335         {
 336                 .name           = "pxa2xx-flash",
 337                 .id             = 0,
 338                 .dev = {
 339                         .platform_data = &mst_flash_data[0],
 340                 },
 341                 .resource = &flash_resources[0],
 342                 .num_resources = 1,
 343         },
 344         {
 345                 .name           = "pxa2xx-flash",
 346                 .id             = 1,
 347                 .dev = {
 348                         .platform_data = &mst_flash_data[1],
 349                 },
 350                 .resource = &flash_resources[1],
 351                 .num_resources = 1,
 352         },
 353 };
 354
 355 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 356 static struct platform_pwm_backlight_data mainstone_backlight_data = {
 357         .pwm_id         = 0,
 358         .max_brightness = 1023,
 359         .dft_brightness = 1023,
 360         .pwm_period_ns  = 78770,
 361 };
 362
 363 static struct platform_device mainstone_backlight_device = {
 364         .name           = "pwm-backlight",
 365         .dev            = {
 366                 .parent = &pxa27x_device_pwm0.dev,
 367                 .platform_data = &mainstone_backlight_data,
 368         },
 369 };
 370
 371 static void __init mainstone_backlight_register(void)
 372 {
 373         int ret = platform_device_register(&mainstone_backlight_device);
 374         if (ret)
 375                 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
 376 }
 377 #else
 378 #define mainstone_backlight_register()  do { } while (0)
 379 #endif
 380
 381 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
 382         .pixclock               = 50000,
 383         .xres                   = 640,
 384         .yres                   = 480,
 385         .bpp                    = 16,
 386         .hsync_len              = 1,
 387         .left_margin            = 0x9f,
 388         .right_margin           = 1,
 389         .vsync_len              = 44,
 390         .upper_margin           = 0,
 391         .lower_margin           = 0,
 392         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
 393 };
 394
 395 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
 396         .pixclock               = 110000,
 397         .xres                   = 240,
 398         .yres                   = 320,
 399         .bpp                    = 16,
 400         .hsync_len              = 4,
 401         .left_margin            = 8,
 402         .right_margin           = 20,
 403         .vsync_len              = 3,
 404         .upper_margin           = 1,
 405         .lower_margin           = 10,
 406         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
 407 };
 408
 409 static struct pxafb_mach_info mainstone_pxafb_info = {
 410         .num_modes              = 1,
 411         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
 412 };
 413
 414 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
 415 {
 416         int err;
 417
 418         /* make sure SD/Memory Stick multiplexer's signals
 419          * are routed to MMC controller
 420          */
 421         MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
 422
 423         err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
 424                              "MMC card detect", data);
 425         if (err)
 426                 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
 427
 428         return err;
 429 }
 430
 431 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
 432 {
 433         struct pxamci_platform_data* p_d = dev->platform_data;
 434
 435         if (( 1 << vdd) & p_d->ocr_mask) {
 436                 printk(KERN_DEBUG "%s: on\n", __func__);
 437                 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
 438                 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
 439         } else {
 440                 printk(KERN_DEBUG "%s: off\n", __func__);
 441                 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
 442         }
 443 }
 444
 445 static void mainstone_mci_exit(struct device *dev, void *data)
 446 {
 447         free_irq(MAINSTONE_MMC_IRQ, data);
 448 }
 449
 450 static struct pxamci_platform_data mainstone_mci_platform_data = {
 451         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 452         .init           = mainstone_mci_init,
 453         .setpower       = mainstone_mci_setpower,
 454         .exit           = mainstone_mci_exit,
 455 };
 456
 457 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
 458 {
 459         unsigned long flags;
 460
 461         local_irq_save(flags);
 462         if (mode & IR_SIRMODE) {
 463                 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
 464         } else if (mode & IR_FIRMODE) {
 465                 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
 466         }
 467         pxa2xx_transceiver_mode(dev, mode);
 468         if (mode & IR_OFF) {
 469                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
 470         } else {
 471                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
 472         }
 473         local_irq_restore(flags);
 474 }
 475
 476 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
 477         .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
 478         .transceiver_mode = mainstone_irda_transceiver_mode,
 479 };
 480
 481 static struct gpio_keys_button gpio_keys_button[] = {
 482         [0] = {
 483                 .desc   = "wakeup",
 484                 .code   = KEY_SUSPEND,
 485                 .type   = EV_KEY,
 486                 .gpio   = 1,
 487                 .wakeup = 1,
 488         },
 489 };
 490
 491 static struct gpio_keys_platform_data mainstone_gpio_keys = {
 492         .buttons        = gpio_keys_button,
 493         .nbuttons       = 1,
 494 };
 495
 496 static struct platform_device mst_gpio_keys_device = {
 497         .name           = "gpio-keys",
 498         .id             = -1,
 499         .dev            = {
 500                 .platform_data  = &mainstone_gpio_keys,
 501         },
 502 };
 503
 504 static struct platform_device *platform_devices[] __initdata = {
 505         &smc91x_device,
 506         &mst_flash_device[0],
 507         &mst_flash_device[1],
 508         &mst_gpio_keys_device,
 509 };
 510
 511 static int mainstone_ohci_init(struct device *dev)
 512 {
 513         /* Set the Power Control Polarity Low and Power Sense
 514            Polarity Low to active low. */
 515         UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
 516                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
 517
 518         return 0;
 519 }
 520
 521 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
 522         .port_mode      = PMM_PERPORT_MODE,
 523         .init           = mainstone_ohci_init,
 524 };
 525
 526 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 527 static unsigned int mainstone_matrix_keys[] = {
 528         KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
 529         KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
 530         KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
 531         KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
 532         KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
 533         KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
 534         KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
 535         KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
 536         KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
 537
 538         KEY(0, 4, KEY_DOT),     /* . */
 539         KEY(1, 4, KEY_CLOSE),   /* @ */
 540         KEY(4, 4, KEY_SLASH),
 541         KEY(5, 4, KEY_BACKSLASH),
 542         KEY(0, 5, KEY_HOME),
 543         KEY(1, 5, KEY_LEFTSHIFT),
 544         KEY(2, 5, KEY_SPACE),
 545         KEY(3, 5, KEY_SPACE),
 546         KEY(4, 5, KEY_ENTER),
 547         KEY(5, 5, KEY_BACKSPACE),
 548
 549         KEY(0, 6, KEY_UP),
 550         KEY(1, 6, KEY_DOWN),
 551         KEY(2, 6, KEY_LEFT),
 552         KEY(3, 6, KEY_RIGHT),
 553         KEY(4, 6, KEY_SELECT),
 554 };
 555
 556 struct pxa27x_keypad_platform_data mainstone_keypad_info = {
 557         .matrix_key_rows        = 6,
 558         .matrix_key_cols        = 7,
 559         .matrix_key_map         = mainstone_matrix_keys,
 560         .matrix_key_map_size    = ARRAY_SIZE(mainstone_matrix_keys),
 561
 562         .enable_rotary0         = 1,
 563         .rotary0_up_key         = KEY_UP,
 564         .rotary0_down_key       = KEY_DOWN,
 565
 566         .debounce_interval      = 30,
 567 };
 568
 569 static void __init mainstone_init_keypad(void)
 570 {
 571         pxa_set_keypad_info(&mainstone_keypad_info);
 572 }
 573 #else
 574 static inline void mainstone_init_keypad(void) {}
 575 #endif
 576
 577 static void __init mainstone_init(void)
 578 {
 579         int SW7 = 0;  /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
 580
 581         pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
 582
 583         mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
 584         mst_flash_data[1].width = 4;
 585
 586         /* Compensate for SW7 which swaps the flash banks */
 587         mst_flash_data[SW7].name = "processor-flash";
 588         mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
 589
 590         printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
 591                mst_flash_data[0].name);
 592
 593         /* system bus arbiter setting
 594          * - Core_Park
 595          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
 596          */
 597         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 598
 599         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 600
 601         /* reading Mainstone's "Virtual Configuration Register"
 602            might be handy to select LCD type here */
 603         if (0)
 604                 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
 605         else
 606                 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
 607
 608         set_pxa_fb_info(&mainstone_pxafb_info);
 609         mainstone_backlight_register();
 610
 611         pxa_set_mci_info(&mainstone_mci_platform_data);
 612         pxa_set_ficp_info(&mainstone_ficp_platform_data);
 613         pxa_set_ohci_info(&mainstone_ohci_platform_data);
 614         pxa_set_i2c_info(NULL);
 615         pxa_set_ac97_info(&mst_audio_ops);
 616
 617         mainstone_init_keypad();
 618 }
 619
 620
 621 static struct map_desc mainstone_io_desc[] __initdata = {
 622         {       /* CPLD */
 623                 .virtual        =  MST_FPGA_VIRT,
 624                 .pfn            = __phys_to_pfn(MST_FPGA_PHYS),
 625                 .length         = 0x00100000,
 626                 .type           = MT_DEVICE
 627         }
 628 };
 629
 630 static void __init mainstone_map_io(void)
 631 {
 632         pxa_map_io();
 633         iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
 634
 635         /*      for use I SRAM as framebuffer.  */
 636         PSLR |= 0xF04;
 637         PCFR = 0x66;
 638 }
 639
 640 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
 641         /* Maintainer: MontaVista Software Inc. */
 642         .phys_io        = 0x40000000,
 643         .boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
 644         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 645         .map_io         = mainstone_map_io,
 646         .init_irq       = mainstone_init_irq,
 647         .timer          = &pxa_timer,
 648         .init_machine   = mainstone_init,
 649 MACHINE_END