1 /*****************************************************************************/
4 * comemlite.c -- PCI access code for embedded CO-MEM Lite PCI controller.
6 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com).
7 * (C) Copyright 2000, Lineo (www.lineo.com)
10 /*****************************************************************************/
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/pci.h>
15 #include <linux/ptrace.h>
16 #include <linux/spinlock.h>
17 #include <linux/interrupt.h>
18 #include <linux/sched.h>
19 #include <asm/coldfire.h>
20 #include <asm/mcfsim.h>
22 #include <asm/anchor.h>
28 /*****************************************************************************/
31 * Debug configuration defines. DEBUGRES sets debugging output for
32 * the resource allocation phase. DEBUGPCI traces on pcibios_ function
33 * calls, and DEBUGIO traces all accesses to devices on the PCI bus.
35 /*#define DEBUGRES 1*/
36 /*#define DEBUGPCI 1*/
39 /*****************************************************************************/
42 * PCI markers for bus present and active slots.
44 int pci_bus_is_present = 0;
45 unsigned long pci_slotmask = 0;
48 * We may or may not need to swap the bytes of PCI bus tranfers.
49 * The endianess is re-roder automatically by the CO-MEM, but it
50 * will get the wrong byte order for a pure data stream.
52 #define pci_byteswap 0
56 * Resource tracking. The CO-MEM part creates a virtual address
57 * space that all the PCI devices live in - it is not in any way
58 * directly mapped into the ColdFire address space. So we can
59 * really assign any resources we like to devices, as long as
60 * they do not clash with other PCI devices.
62 unsigned int pci_iobase = PCIBIOS_MIN_IO; /* Arbitrary start address */
63 unsigned int pci_membase = PCIBIOS_MIN_MEM; /* Arbitrary start address */
65 #define PCI_MINIO 0x100 /* 256 byte minimum I/O */
66 #define PCI_MINMEM 0x00010000 /* 64k minimum chunk */
69 * The CO-MEM's shared memory segment is visible inside the PCI
70 * memory address space. We need to keep track of the address that
71 * this is mapped at, to setup the bus masters pointers.
73 unsigned int pci_shmemaddr;
75 /*****************************************************************************/
77 void pci_interrupt(int irq, void *id, struct pt_regs *fp);
79 /*****************************************************************************/
82 * Some platforms have custom ways of reseting the PCI bus.
85 void pci_resetbus(void)
91 printk(KERN_DEBUG "pci_resetbus()\n");
94 *((volatile unsigned short *) (MCF_MBAR+MCFSIM_PADDR)) |= eLIA_PCIRESET;
95 for (i = 0; (i < 1000); i++) {
96 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) =
97 (ppdata | eLIA_PCIRESET);
101 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) = ppdata;
105 /*****************************************************************************/
107 int pcibios_assign_resource_slot(int slot)
109 volatile unsigned long *rp;
110 volatile unsigned char *ip;
111 unsigned int idsel, addr, val, align, i;
115 printk(KERN_INFO "pcibios_assign_resource_slot(slot=%x)\n", slot);
118 rp = (volatile unsigned long *) COMEM_BASE;
119 idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
121 /* Try to assign resource to each BAR */
122 for (bar = 0; (bar < 6); bar++) {
123 addr = COMEM_PCIBUS + PCI_BASE_ADDRESS_0 + (bar * 4);
124 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
125 val = rp[LREG(addr)];
127 printk(KERN_DEBUG "-----------------------------------"
128 "-------------------------------------\n");
129 printk(KERN_DEBUG "BAR[%d]: read=%08x ", bar, val);
132 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
133 rp[LREG(addr)] = 0xffffffff;
135 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
136 val = rp[LREG(addr)];
138 printk(KERN_DEBUG "write=%08x ", val);
142 printk(KERN_DEBUG "\n");
147 /* Determine space required by BAR */
148 /* FIXME: this should go backwords from 0x80000000... */
149 for (i = 0; (i < 32); i++) {
150 if ((0x1 << i) & (val & 0xfffffffc))
155 printk(KERN_DEBUG "size=%08x(%d)\n", (0x1 << i), i);
159 /* Assign a resource */
160 if (val & PCI_BASE_ADDRESS_SPACE_IO) {
164 printk(KERN_DEBUG "BAR[%d]: IO size=%08x iobase=%08x\n",
169 val = 0 | PCI_BASE_ADDRESS_SPACE_IO;
171 printk(KERN_DEBUG "BAR[%d]: too big for IO??\n", bar);
174 /* Check for un-alignment */
175 if ((align = pci_iobase % i))
176 pci_iobase += (i - align);
177 val = pci_iobase | PCI_BASE_ADDRESS_SPACE_IO;
184 printk(KERN_DEBUG "BAR[%d]: MEMORY size=%08x membase=%08x\n",
185 bar, i, pci_membase);
187 /* Check for un-alignment */
188 if ((align = pci_membase % i))
189 pci_membase += (i - align);
190 val = pci_membase | PCI_BASE_ADDRESS_SPACE_MEMORY;
194 /* Write resource back into BAR register */
195 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
196 rp[LREG(addr)] = val;
198 printk(KERN_DEBUG "BAR[%d]: assigned bar=%08x\n", bar, val);
203 printk(KERN_DEBUG "-----------------------------------"
204 "-------------------------------------\n");
207 /* Assign IRQ if one is wanted... */
208 ip = (volatile unsigned char *) (COMEM_BASE + COMEM_PCIBUS);
209 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
211 addr = (PCI_INTERRUPT_PIN & 0xfc) + (~PCI_INTERRUPT_PIN & 0x03);
213 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
214 addr = (PCI_INTERRUPT_LINE & 0xfc)+(~PCI_INTERRUPT_LINE & 0x03);
217 printk(KERN_DEBUG "IRQ LINE=25\n");
224 /*****************************************************************************/
226 int pcibios_enable_slot(int slot)
228 volatile unsigned long *rp;
229 volatile unsigned short *wp;
230 unsigned int idsel, addr;
234 printk(KERN_DEBUG "pcibios_enbale_slot(slot=%x)\n", slot);
237 rp = (volatile unsigned long *) COMEM_BASE;
238 wp = (volatile unsigned short *) COMEM_BASE;
239 idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
241 /* Get current command settings */
242 addr = COMEM_PCIBUS + PCI_COMMAND;
243 addr = (addr & ~0x3) + (~addr & 0x02);
244 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
245 cmd = wp[WREG(addr)];
246 /*val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);*/
248 /* Enable I/O and memory accesses to this device */
249 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
250 cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
251 wp[WREG(addr)] = cmd;
256 /*****************************************************************************/
258 void pcibios_assign_resources(void)
260 volatile unsigned long *rp;
261 unsigned long sel, id;
264 rp = (volatile unsigned long *) COMEM_BASE;
267 * Do a quick scan of the PCI bus and see what is here.
269 for (slot = COMEM_MINDEV; (slot <= COMEM_MAXDEV); slot++) {
270 sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
271 rp[LREG(COMEM_DAHBASE)] = sel;
272 rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
273 id = rp[LREG(COMEM_PCIBUS)];
274 if ((id != 0) && ((id & 0xffff0000) != (sel & 0xffff0000))) {
275 printk(KERN_INFO "PCI: slot=%d id=%08x\n", slot, (int) id);
276 pci_slotmask |= 0x1 << slot;
277 pcibios_assign_resource_slot(slot);
278 pcibios_enable_slot(slot);
283 /*****************************************************************************/
285 int pcibios_init(void)
287 volatile unsigned long *rp;
288 unsigned long sel, id;
292 printk(KERN_DEBUG "pcibios_init()\n");
298 * Do some sort of basic check to see if the CO-MEM part
299 * is present... This works ok, but I think we really need
300 * something better...
302 rp = (volatile unsigned long *) COMEM_BASE;
303 if ((rp[LREG(COMEM_LBUSCFG)] & 0xff) != 0x50) {
304 printk(KERN_INFO "PCI: no PCI bus present\n");
308 #ifdef COMEM_BRIDGEDEV
310 * Setup the PCI bridge device first. It needs resources too,
311 * so that bus masters can get to its shared memory.
313 slot = COMEM_BRIDGEDEV;
314 sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
315 rp[LREG(COMEM_DAHBASE)] = sel;
316 rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
317 id = rp[LREG(COMEM_PCIBUS)];
318 if ((id == 0) || ((id & 0xffff0000) == (sel & 0xffff0000))) {
319 printk(KERN_INFO "PCI: no PCI bus bridge present\n");
323 printk(KERN_INFO "PCI: bridge device at slot=%d id=%08x\n", slot, (int) id);
324 pci_slotmask |= 0x1 << slot;
325 pci_shmemaddr = pci_membase;
326 pcibios_assign_resource_slot(slot);
327 pcibios_enable_slot(slot);
330 pci_bus_is_present = 1;
332 /* Get PCI irq for local vectoring */
333 if (request_irq(COMEM_IRQ, pci_interrupt, 0, "PCI bridge", NULL)) {
334 printk(KERN_WARNING "PCI: failed to acquire interrupt %d\n", COMEM_IRQ);
336 mcf_autovector(COMEM_IRQ);
339 pcibios_assign_resources();
344 /*****************************************************************************/
346 char *pcibios_setup(char *option)
348 /* Nothing for us to handle. */
351 /*****************************************************************************/
353 void pcibios_fixup_bus(struct pci_bus *b)
357 /*****************************************************************************/
359 void pcibios_align_resource(void *data, struct resource *res,
360 resource_size_t size, resource_size_t align)
364 /*****************************************************************************/
366 int pcibios_enable_device(struct pci_dev *dev, int mask)
370 slot = PCI_SLOT(dev->devfn);
371 if ((dev->bus == 0) && (pci_slotmask & (1 << slot)))
372 pcibios_enable_slot(slot);
376 /*****************************************************************************/
379 * Local routines to interrcept the standard I/O and vector handling
380 * code. Don't include this 'till now - initialization code above needs
381 * access to the real code too.
383 #include <asm/mcfpci.h>
385 /*****************************************************************************/
387 void pci_outb(unsigned char val, unsigned int addr)
389 volatile unsigned long *rp;
390 volatile unsigned char *bp;
393 printk(KERN_DEBUG "pci_outb(val=%02x,addr=%x)\n", val, addr);
396 rp = (volatile unsigned long *) COMEM_BASE;
397 bp = (volatile unsigned char *) COMEM_BASE;
398 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
399 addr = (addr & ~0x3) + (~addr & 0x03);
400 bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
403 /*****************************************************************************/
405 void pci_outw(unsigned short val, unsigned int addr)
407 volatile unsigned long *rp;
408 volatile unsigned short *sp;
411 printk(KERN_DEBUG "pci_outw(val=%04x,addr=%x)\n", val, addr);
414 rp = (volatile unsigned long *) COMEM_BASE;
415 sp = (volatile unsigned short *) COMEM_BASE;
416 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
417 addr = (addr & ~0x3) + (~addr & 0x02);
419 val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
420 sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
423 /*****************************************************************************/
425 void pci_outl(unsigned int val, unsigned int addr)
427 volatile unsigned long *rp;
428 volatile unsigned int *lp;
431 printk(KERN_DEBUG "pci_outl(val=%08x,addr=%x)\n", val, addr);
434 rp = (volatile unsigned long *) COMEM_BASE;
435 lp = (volatile unsigned int *) COMEM_BASE;
436 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
439 val = (val << 24) | ((val & 0x0000ff00) << 8) |
440 ((val & 0x00ff0000) >> 8) | (val >> 24);
442 lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
445 /*****************************************************************************/
447 unsigned long pci_blmask[] = {
454 unsigned char pci_inb(unsigned int addr)
456 volatile unsigned long *rp;
457 volatile unsigned char *bp;
462 printk(KERN_DEBUG "pci_inb(addr=%x)\n", addr);
465 rp = (volatile unsigned long *) COMEM_BASE;
466 bp = (volatile unsigned char *) COMEM_BASE;
468 r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_blmask[(addr & 0x3)];
469 rp[LREG(COMEM_DAHBASE)] = r;
471 addr = (addr & ~0x3) + (~addr & 0x3);
472 val = bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
476 /*****************************************************************************/
478 unsigned long pci_bwmask[] = {
485 unsigned short pci_inw(unsigned int addr)
487 volatile unsigned long *rp;
488 volatile unsigned short *sp;
493 printk(KERN_DEBUG "pci_inw(addr=%x)", addr);
496 rp = (volatile unsigned long *) COMEM_BASE;
497 r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_bwmask[(addr & 0x3)];
498 rp[LREG(COMEM_DAHBASE)] = r;
500 sp = (volatile unsigned short *) COMEM_BASE;
501 addr = (addr & ~0x3) + (~addr & 0x02);
502 val = sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
504 val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
506 printk(KERN_DEBUG "=%04x\n", val);
511 /*****************************************************************************/
513 unsigned int pci_inl(unsigned int addr)
515 volatile unsigned long *rp;
516 volatile unsigned int *lp;
520 printk(KERN_DEBUG "pci_inl(addr=%x)", addr);
523 rp = (volatile unsigned long *) COMEM_BASE;
524 lp = (volatile unsigned int *) COMEM_BASE;
525 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(addr);
526 val = lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
529 val = (val << 24) | ((val & 0x0000ff00) << 8) |
530 ((val & 0x00ff0000) >> 8) | (val >> 24);
533 printk(KERN_DEBUG "=%08x\n", val);
538 /*****************************************************************************/
540 void pci_outsb(void *addr, void *buf, int len)
542 volatile unsigned long *rp;
543 volatile unsigned char *bp;
544 unsigned char *dp = (unsigned char *) buf;
545 unsigned int a = (unsigned int) addr;
548 printk(KERN_DEBUG "pci_outsb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
551 rp = (volatile unsigned long *) COMEM_BASE;
552 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
554 a = (a & ~0x3) + (~a & 0x03);
555 bp = (volatile unsigned char *)
556 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
562 /*****************************************************************************/
564 void pci_outsw(void *addr, void *buf, int len)
566 volatile unsigned long *rp;
567 volatile unsigned short *wp;
568 unsigned short w, *dp = (unsigned short *) buf;
569 unsigned int a = (unsigned int) addr;
572 printk(KERN_DEBUG "pci_outsw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
575 rp = (volatile unsigned long *) COMEM_BASE;
576 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
578 a = (a & ~0x3) + (~a & 0x2);
579 wp = (volatile unsigned short *)
580 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
585 w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
590 /*****************************************************************************/
592 void pci_outsl(void *addr, void *buf, int len)
594 volatile unsigned long *rp;
595 volatile unsigned long *lp;
596 unsigned long l, *dp = (unsigned long *) buf;
597 unsigned int a = (unsigned int) addr;
600 printk(KERN_DEBUG "pci_outsl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
603 rp = (volatile unsigned long *) COMEM_BASE;
604 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
606 lp = (volatile unsigned long *)
607 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
612 l = (l << 24) | ((l & 0x0000ff00) << 8) |
613 ((l & 0x00ff0000) >> 8) | (l >> 24);
618 /*****************************************************************************/
620 void pci_insb(void *addr, void *buf, int len)
622 volatile unsigned long *rp;
623 volatile unsigned char *bp;
624 unsigned char *dp = (unsigned char *) buf;
625 unsigned int a = (unsigned int) addr;
628 printk(KERN_DEBUG "pci_insb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
631 rp = (volatile unsigned long *) COMEM_BASE;
632 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
634 a = (a & ~0x3) + (~a & 0x03);
635 bp = (volatile unsigned char *)
636 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
642 /*****************************************************************************/
644 void pci_insw(void *addr, void *buf, int len)
646 volatile unsigned long *rp;
647 volatile unsigned short *wp;
648 unsigned short w, *dp = (unsigned short *) buf;
649 unsigned int a = (unsigned int) addr;
652 printk(KERN_DEBUG "pci_insw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
655 rp = (volatile unsigned long *) COMEM_BASE;
656 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
658 a = (a & ~0x3) + (~a & 0x2);
659 wp = (volatile unsigned short *)
660 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
665 w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
670 /*****************************************************************************/
672 void pci_insl(void *addr, void *buf, int len)
674 volatile unsigned long *rp;
675 volatile unsigned long *lp;
676 unsigned long l, *dp = (unsigned long *) buf;
677 unsigned int a = (unsigned int) addr;
680 printk(KERN_DEBUG "pci_insl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
683 rp = (volatile unsigned long *) COMEM_BASE;
684 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
686 lp = (volatile unsigned long *)
687 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
692 l = (l << 24) | ((l & 0x0000ff00) << 8) |
693 ((l & 0x00ff0000) >> 8) | (l >> 24);
698 /*****************************************************************************/
700 struct pci_localirqlist {
701 void (*handler)(int, void *, struct pt_regs *);
706 struct pci_localirqlist pci_irqlist[COMEM_MAXPCI];
708 /*****************************************************************************/
710 int pci_request_irq(unsigned int irq,
711 void (*handler)(int, void *, struct pt_regs *),
712 unsigned long flags, const char *device, void *dev_id)
717 printk(KERN_DEBUG "pci_request_irq(irq=%d,handler=%x,flags=%x,device=%s,"
718 "dev_id=%x)\n", irq, (int) handler, (int) flags, device,
722 /* Check if this interrupt handler is already lodged */
723 for (i = 0; (i < COMEM_MAXPCI); i++) {
724 if (pci_irqlist[i].handler == handler)
728 /* Find a free spot to put this handler */
729 for (i = 0; (i < COMEM_MAXPCI); i++) {
730 if (pci_irqlist[i].handler == 0) {
731 pci_irqlist[i].handler = handler;
732 pci_irqlist[i].device = device;
733 pci_irqlist[i].dev_id = dev_id;
742 /*****************************************************************************/
744 void pci_free_irq(unsigned int irq, void *dev_id)
749 printk(KERN_DEBUG "pci_free_irq(irq=%d,dev_id=%x)\n", irq, (int) dev_id);
752 if (dev_id == (void *) NULL)
755 /* Check if this interrupt handler is lodged */
756 for (i = 0; (i < COMEM_MAXPCI); i++) {
757 if (pci_irqlist[i].dev_id == dev_id) {
758 pci_irqlist[i].handler = NULL;
759 pci_irqlist[i].device = NULL;
760 pci_irqlist[i].dev_id = NULL;
766 /*****************************************************************************/
768 void pci_interrupt(int irq, void *id, struct pt_regs *fp)
773 printk(KERN_DEBUG "pci_interrupt(irq=%d,id=%x,fp=%x)\n", irq, (int) id, (int) fp);
776 for (i = 0; (i < COMEM_MAXPCI); i++) {
777 if (pci_irqlist[i].handler)
778 (*pci_irqlist[i].handler)(irq,pci_irqlist[i].dev_id,fp);
782 /*****************************************************************************/
785 * The shared memory region is broken up into contiguous 512 byte
786 * regions for easy allocation... This is not an optimal solution
787 * but it makes allocation and freeing regions really easy.
790 #define PCI_MEMSLOTSIZE 512
791 #define PCI_MEMSLOTS (COMEM_SHMEMSIZE / PCI_MEMSLOTSIZE)
793 char pci_shmemmap[PCI_MEMSLOTS];
796 void *pci_bmalloc(int size)
801 printk(KERN_DEBUG "pci_bmalloc(size=%d)\n", size);
805 return((void *) NULL);
807 nrslots = (size - 1) / PCI_MEMSLOTSIZE;
809 for (i = 0; (i < (PCI_MEMSLOTS-nrslots)); i++) {
810 if (pci_shmemmap[i] == 0) {
811 for (j = i+1; (j < (i+nrslots)); j++) {
816 for (j = i; (j <= i+nrslots); j++)
823 return((void *) (COMEM_BASE + COMEM_SHMEM + (i * PCI_MEMSLOTSIZE)));
826 /*****************************************************************************/
828 void pci_bmfree(void *mp, int size)
833 printk(KERN_DEBUG "pci_bmfree(mp=%x,size=%d)\n", (int) mp, size);
836 nrslots = size / PCI_MEMSLOTSIZE;
837 i = (((unsigned long) mp) - (COMEM_BASE + COMEM_SHMEM)) /
840 for (j = i; (j < (i+nrslots)); j++)
844 /*****************************************************************************/
846 unsigned long pci_virt_to_bus(volatile void *address)
851 printk(KERN_DEBUG "pci_virt_to_bus(address=%x)", (int) address);
854 l = ((unsigned long) address) - COMEM_BASE;
856 printk(KERN_DEBUG "=%x\n", (int) (l+pci_shmemaddr));
858 return(l + pci_shmemaddr);
861 /*****************************************************************************/
863 void *pci_bus_to_virt(unsigned long address)
868 printk(KERN_DEBUG "pci_bus_to_virt(address=%x)", (int) address);
871 l = address - pci_shmemaddr;
873 printk(KERN_DEBUG "=%x\n", (int) (address + COMEM_BASE));
875 return((void *) (address + COMEM_BASE));
878 /*****************************************************************************/
880 void pci_bmcpyto(void *dst, void *src, int len)
882 unsigned long *dp, *sp, val;
883 unsigned char *dcp, *scp;
887 printk(KERN_DEBUG "pci_bmcpyto(dst=%x,src=%x,len=%d)\n", (int)dst, (int)src, len);
890 dp = (unsigned long *) dst;
891 sp = (unsigned long *) src;
895 printk(KERN_INFO "DATA:");
896 scp = (unsigned char *) sp;
897 for (i = 0; (i < len); i++) {
898 if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
899 printk(KERN_INFO "%02x ", *scp++);
901 printk(KERN_INFO "\n");
904 for (j = 0; (i >= 0); i--, j++) {
906 val = (val << 24) | ((val & 0x0000ff00) << 8) |
907 ((val & 0x00ff0000) >> 8) | (val >> 24);
912 dcp = (unsigned char *) dp;
913 scp = ((unsigned char *) sp) + 3;
914 for (i = 0; (i < (len & 0x3)); i++)
919 /*****************************************************************************/
921 void pci_bmcpyfrom(void *dst, void *src, int len)
923 unsigned long *dp, *sp, val;
924 unsigned char *dcp, *scp;
928 printk(KERN_DEBUG "pci_bmcpyfrom(dst=%x,src=%x,len=%d)\n",(int)dst,(int)src,len);
931 dp = (unsigned long *) dst;
932 sp = (unsigned long *) src;
935 for (; (i >= 0); i--) {
937 val = (val << 24) | ((val & 0x0000ff00) << 8) |
938 ((val & 0x00ff0000) >> 8) | (val >> 24);
943 dcp = ((unsigned char *) dp) + 3;
944 scp = (unsigned char *) sp;
945 for (i = 0; (i < (len & 0x3)); i++)
950 printk(KERN_INFO "DATA:");
951 dcp = (unsigned char *) dst;
952 for (i = 0; (i < len); i++) {
953 if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
954 printk(KERN_INFO "%02x ", *dcp++);
956 printk(KERN_INFO "\n");
960 /*****************************************************************************/
962 void *pci_alloc_consistent(struct pci_dev *dev, size_t size, dma_addr_t *dma_addr)
965 if ((mp = pci_bmalloc(size)) != NULL) {
966 dma_addr = mp - (COMEM_BASE + COMEM_SHMEM);
969 *dma_addr = (dma_addr_t) NULL;
973 /*****************************************************************************/
975 void pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr)
977 pci_bmfree(cpu_addr, size);
980 /*****************************************************************************/