2 * File: arch/blackfin/kernel/bfin_gpio.c
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
7 * Description: GPIO Abstraction Layer
10 * Copyright 2007 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
33 * GPIO_0 PF0 PF0 PF0 PA0...PJ13
43 * GPIO_10 PF10 PF10 PF10
44 * GPIO_11 PF11 PF11 PF11
45 * GPIO_12 PF12 PF12 PF12
46 * GPIO_13 PF13 PF13 PF13
47 * GPIO_14 PF14 PF14 PF14
48 * GPIO_15 PF15 PF15 PF15
83 #include <linux/delay.h>
84 #include <linux/module.h>
85 #include <linux/err.h>
86 #include <asm/blackfin.h>
88 #include <asm/portmux.h>
89 #include <linux/irq.h>
91 #if ANOMALY_05000311 || ANOMALY_05000323
94 AWA_data_clear = SYSCR,
98 AWA_maska_clear = UART_SCR,
99 AWA_maska_set = UART_SCR,
100 AWA_maska_toggle = UART_SCR,
101 AWA_maskb = UART_GCTL,
102 AWA_maskb_clear = UART_GCTL,
103 AWA_maskb_set = UART_GCTL,
104 AWA_maskb_toggle = UART_GCTL,
105 AWA_dir = SPORT1_STAT,
106 AWA_polar = SPORT1_STAT,
107 AWA_edge = SPORT1_STAT,
108 AWA_both = SPORT1_STAT,
110 AWA_inen = TIMER_ENABLE,
111 #elif ANOMALY_05000323
112 AWA_inen = DMA1_1_CONFIG,
115 /* Anomaly Workaround */
116 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
118 #define AWA_DUMMY_READ(...) do { } while (0)
122 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
123 (struct gpio_port_t *) FIO_FLAG_D,
128 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
129 (struct gpio_port_t *) PORTFIO,
130 (struct gpio_port_t *) PORTGIO,
131 (struct gpio_port_t *) PORTHIO,
134 static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
135 (unsigned short *) PORTF_FER,
136 (unsigned short *) PORTG_FER,
137 (unsigned short *) PORTH_FER,
143 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
144 (struct gpio_port_t *) FIO0_FLAG_D,
145 (struct gpio_port_t *) FIO1_FLAG_D,
146 (struct gpio_port_t *) FIO2_FLAG_D,
151 static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
152 (struct gpio_port_t *)PORTA_FER,
153 (struct gpio_port_t *)PORTB_FER,
154 (struct gpio_port_t *)PORTC_FER,
155 (struct gpio_port_t *)PORTD_FER,
156 (struct gpio_port_t *)PORTE_FER,
157 (struct gpio_port_t *)PORTF_FER,
158 (struct gpio_port_t *)PORTG_FER,
159 (struct gpio_port_t *)PORTH_FER,
160 (struct gpio_port_t *)PORTI_FER,
161 (struct gpio_port_t *)PORTJ_FER,
165 static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
166 static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
168 #define MAX_RESOURCES 256
169 #define RESOURCE_LABEL_SIZE 16
172 char name[RESOURCE_LABEL_SIZE];
177 static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
178 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
179 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
182 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
186 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
190 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
193 #endif /* CONFIG_PM */
195 #if defined(BF548_FAMILY)
196 inline int check_gpio(unsigned short gpio)
198 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
199 || gpio == GPIO_PH14 || gpio == GPIO_PH15
200 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
201 || gpio > MAX_BLACKFIN_GPIOS)
206 inline int check_gpio(unsigned short gpio)
208 if (gpio >= MAX_BLACKFIN_GPIOS)
214 static void set_label(unsigned short ident, const char *label)
217 if (label && str_ident) {
218 strncpy(str_ident[ident].name, label,
219 RESOURCE_LABEL_SIZE);
220 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
224 static char *get_label(unsigned short ident)
229 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
232 static int cmp_label(unsigned short ident, const char *label)
234 if (label && str_ident)
235 return strncmp(str_ident[ident].name,
236 label, strlen(label));
242 static void port_setup(unsigned short gpio, unsigned short usage)
244 if (!check_gpio(gpio)) {
245 if (usage == GPIO_USAGE)
246 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
248 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
252 #elif defined(BF548_FAMILY)
253 static void port_setup(unsigned short gpio, unsigned short usage)
255 if (usage == GPIO_USAGE)
256 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
258 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
262 # define port_setup(...) do { } while (0)
268 unsigned short offset;
270 {.res = P_PPI0_D13, .offset = 11},
271 {.res = P_PPI0_D14, .offset = 11},
272 {.res = P_PPI0_D15, .offset = 11},
273 {.res = P_SPORT1_TFS, .offset = 11},
274 {.res = P_SPORT1_TSCLK, .offset = 11},
275 {.res = P_SPORT1_DTPRI, .offset = 11},
276 {.res = P_PPI0_D10, .offset = 10},
277 {.res = P_PPI0_D11, .offset = 10},
278 {.res = P_PPI0_D12, .offset = 10},
279 {.res = P_SPORT1_RSCLK, .offset = 10},
280 {.res = P_SPORT1_RFS, .offset = 10},
281 {.res = P_SPORT1_DRPRI, .offset = 10},
282 {.res = P_PPI0_D8, .offset = 9},
283 {.res = P_PPI0_D9, .offset = 9},
284 {.res = P_SPORT1_DRSEC, .offset = 9},
285 {.res = P_SPORT1_DTSEC, .offset = 9},
286 {.res = P_TMR2, .offset = 8},
287 {.res = P_PPI0_FS3, .offset = 8},
288 {.res = P_TMR3, .offset = 7},
289 {.res = P_SPI0_SSEL4, .offset = 7},
290 {.res = P_TMR4, .offset = 6},
291 {.res = P_SPI0_SSEL5, .offset = 6},
292 {.res = P_TMR5, .offset = 5},
293 {.res = P_SPI0_SSEL6, .offset = 5},
294 {.res = P_UART1_RX, .offset = 4},
295 {.res = P_UART1_TX, .offset = 4},
296 {.res = P_TMR6, .offset = 4},
297 {.res = P_TMR7, .offset = 4},
298 {.res = P_UART0_RX, .offset = 3},
299 {.res = P_UART0_TX, .offset = 3},
300 {.res = P_DMAR0, .offset = 3},
301 {.res = P_DMAR1, .offset = 3},
302 {.res = P_SPORT0_DTSEC, .offset = 1},
303 {.res = P_SPORT0_DRSEC, .offset = 1},
304 {.res = P_CAN0_RX, .offset = 1},
305 {.res = P_CAN0_TX, .offset = 1},
306 {.res = P_SPI0_SSEL7, .offset = 1},
307 {.res = P_SPORT0_TFS, .offset = 0},
308 {.res = P_SPORT0_DTPRI, .offset = 0},
309 {.res = P_SPI0_SSEL2, .offset = 0},
310 {.res = P_SPI0_SSEL3, .offset = 0},
313 static void portmux_setup(unsigned short per, unsigned short function)
315 u16 y, offset, muxreg;
317 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
318 if (port_mux_lut[y].res == per) {
320 /* SET PORTMUX REG */
322 offset = port_mux_lut[y].offset;
323 muxreg = bfin_read_PORT_MUX();
326 muxreg &= ~(1 << offset);
331 muxreg |= (function << offset);
332 bfin_write_PORT_MUX(muxreg);
336 #elif defined(BF548_FAMILY)
337 inline void portmux_setup(unsigned short portno, unsigned short function)
341 pmux = gpio_array[gpio_bank(portno)]->port_mux;
343 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
344 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
346 gpio_array[gpio_bank(portno)]->port_mux = pmux;
349 inline u16 get_portmux(unsigned short portno)
353 pmux = gpio_array[gpio_bank(portno)]->port_mux;
355 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
358 # define portmux_setup(...) do { } while (0)
362 static void default_gpio(unsigned short gpio)
364 unsigned short bank, bitmask;
367 bank = gpio_bank(gpio);
368 bitmask = gpio_bit(gpio);
370 local_irq_save(flags);
372 gpio_bankb[bank]->maska_clear = bitmask;
373 gpio_bankb[bank]->maskb_clear = bitmask;
375 gpio_bankb[bank]->inen &= ~bitmask;
376 gpio_bankb[bank]->dir &= ~bitmask;
377 gpio_bankb[bank]->polar &= ~bitmask;
378 gpio_bankb[bank]->both &= ~bitmask;
379 gpio_bankb[bank]->edge &= ~bitmask;
380 AWA_DUMMY_READ(edge);
381 local_irq_restore(flags);
385 # define default_gpio(...) do { } while (0)
388 static int __init bfin_gpio_init(void)
390 str_ident = kcalloc(MAX_RESOURCES,
391 sizeof(struct str_ident), GFP_KERNEL);
392 if (str_ident == NULL)
395 memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
397 printk(KERN_INFO "Blackfin GPIO Controller\n");
402 arch_initcall(bfin_gpio_init);
406 /***********************************************************
408 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
411 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
414 * DESCRIPTION: These functions abstract direct register access
415 * to Blackfin processor General Purpose
418 * CAUTION: These functions do not belong to the GPIO Driver API
419 *************************************************************
420 * MODIFICATION HISTORY :
421 **************************************************************/
423 /* Set a specific bit */
425 #define SET_GPIO(name) \
426 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
428 unsigned long flags; \
429 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
430 local_irq_save(flags); \
432 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
434 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
435 AWA_DUMMY_READ(name); \
436 local_irq_restore(flags); \
438 EXPORT_SYMBOL(set_gpio_ ## name);
447 #if ANOMALY_05000311 || ANOMALY_05000323
448 #define SET_GPIO_SC(name) \
449 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
451 unsigned long flags; \
452 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
453 local_irq_save(flags); \
455 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
457 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
458 AWA_DUMMY_READ(name); \
459 local_irq_restore(flags); \
461 EXPORT_SYMBOL(set_gpio_ ## name);
463 #define SET_GPIO_SC(name) \
464 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
466 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
468 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
470 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
472 EXPORT_SYMBOL(set_gpio_ ## name);
479 #if ANOMALY_05000311 || ANOMALY_05000323
480 void set_gpio_toggle(unsigned short gpio)
483 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
484 local_irq_save(flags);
485 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
486 AWA_DUMMY_READ(toggle);
487 local_irq_restore(flags);
490 void set_gpio_toggle(unsigned short gpio)
492 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
493 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
496 EXPORT_SYMBOL(set_gpio_toggle);
499 /*Set current PORT date (16-bit word)*/
501 #if ANOMALY_05000311 || ANOMALY_05000323
502 #define SET_GPIO_P(name) \
503 void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
505 unsigned long flags; \
506 local_irq_save(flags); \
507 gpio_bankb[gpio_bank(gpio)]->name = arg; \
508 AWA_DUMMY_READ(name); \
509 local_irq_restore(flags); \
511 EXPORT_SYMBOL(set_gpiop_ ## name);
513 #define SET_GPIO_P(name) \
514 void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
516 gpio_bankb[gpio_bank(gpio)]->name = arg; \
518 EXPORT_SYMBOL(set_gpiop_ ## name);
531 /* Get a specific bit */
532 #if ANOMALY_05000311 || ANOMALY_05000323
533 #define GET_GPIO(name) \
534 unsigned short get_gpio_ ## name(unsigned short gpio) \
536 unsigned long flags; \
537 unsigned short ret; \
538 local_irq_save(flags); \
539 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
540 AWA_DUMMY_READ(name); \
541 local_irq_restore(flags); \
544 EXPORT_SYMBOL(get_gpio_ ## name);
546 #define GET_GPIO(name) \
547 unsigned short get_gpio_ ## name(unsigned short gpio) \
549 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
551 EXPORT_SYMBOL(get_gpio_ ## name);
563 /*Get current PORT date (16-bit word)*/
565 #if ANOMALY_05000311 || ANOMALY_05000323
566 #define GET_GPIO_P(name) \
567 unsigned short get_gpiop_ ## name(unsigned short gpio) \
569 unsigned long flags; \
570 unsigned short ret; \
571 local_irq_save(flags); \
572 ret = (gpio_bankb[gpio_bank(gpio)]->name); \
573 AWA_DUMMY_READ(name); \
574 local_irq_restore(flags); \
577 EXPORT_SYMBOL(get_gpiop_ ## name);
579 #define GET_GPIO_P(name) \
580 unsigned short get_gpiop_ ## name(unsigned short gpio) \
582 return (gpio_bankb[gpio_bank(gpio)]->name);\
584 EXPORT_SYMBOL(get_gpiop_ ## name);
598 /***********************************************************
600 * FUNCTIONS: Blackfin PM Setup API
603 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
611 * DESCRIPTION: Blackfin PM Driver API
614 *************************************************************
615 * MODIFICATION HISTORY :
616 **************************************************************/
617 int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
621 if ((check_gpio(gpio) < 0) || !type)
624 local_irq_save(flags);
626 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
627 wakeup_flags_map[gpio] = type;
628 local_irq_restore(flags);
632 EXPORT_SYMBOL(gpio_pm_wakeup_request);
634 void gpio_pm_wakeup_free(unsigned short gpio)
638 if (check_gpio(gpio) < 0)
641 local_irq_save(flags);
643 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
645 local_irq_restore(flags);
647 EXPORT_SYMBOL(gpio_pm_wakeup_free);
649 static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
651 port_setup(gpio, GPIO_USAGE);
652 set_gpio_dir(gpio, 0);
653 set_gpio_inen(gpio, 1);
655 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
656 set_gpio_edge(gpio, 1);
658 set_gpio_edge(gpio, 0);
660 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
661 set_gpio_both(gpio, 1);
663 set_gpio_both(gpio, 0);
665 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
666 set_gpio_polar(gpio, 1);
668 set_gpio_polar(gpio, 0);
675 u32 gpio_pm_setup(void)
678 u16 bank, mask, i, gpio;
680 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
681 mask = wakeup_map[gpio_bank(i)];
684 gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
685 gpio_bankb[bank]->maskb = 0;
689 gpio_bank_saved[bank].fer = *port_fer[bank];
691 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
692 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
693 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
694 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
695 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
696 gpio_bank_saved[bank].reserved =
697 reserved_gpio_map[bank];
703 reserved_gpio_map[gpio_bank(gpio)] |=
705 bfin_gpio_wakeup_type(gpio,
706 wakeup_flags_map[gpio]);
707 set_gpio_data(gpio, 0); /*Clear*/
714 (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
715 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
719 AWA_DUMMY_READ(maskb_set);
724 return IWR_ENABLE_ALL;
727 void gpio_pm_restore(void)
731 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
732 mask = wakeup_map[gpio_bank(i)];
737 *port_fer[bank] = gpio_bank_saved[bank].fer;
739 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
740 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
741 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
742 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
743 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
745 reserved_gpio_map[bank] =
746 gpio_bank_saved[bank].reserved;
750 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
752 AWA_DUMMY_READ(maskb);
756 #endif /* BF548_FAMILY */
758 /***********************************************************
760 * FUNCTIONS: Blackfin Peripheral Resource Allocation
764 * per Peripheral Identifier
767 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
770 *************************************************************
771 * MODIFICATION HISTORY :
772 **************************************************************/
775 int peripheral_request(unsigned short per, const char *label)
778 unsigned short ident = P_IDENT(per);
781 * Don't cares are pins with only one dedicated function
784 if (per & P_DONTCARE)
787 if (!(per & P_DEFINED))
790 if (check_gpio(ident) < 0)
793 local_irq_save(flags);
795 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
797 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
798 __FUNCTION__, ident, get_label(ident));
800 local_irq_restore(flags);
804 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
806 u16 funct = get_portmux(ident);
809 * Pin functions like AMC address strobes my
810 * be requested and used by several drivers
813 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
816 * Allow that the identical pin function can
817 * be requested from the same driver twice
820 if (cmp_label(ident, label) == 0)
824 "%s: Peripheral %d function %d is already reserved by %s !\n",
825 __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
827 local_irq_restore(flags);
833 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
835 portmux_setup(ident, P_FUNCT2MUX(per));
836 port_setup(ident, PERIPHERAL_USAGE);
838 local_irq_restore(flags);
839 set_label(ident, label);
843 EXPORT_SYMBOL(peripheral_request);
846 int peripheral_request(unsigned short per, const char *label)
849 unsigned short ident = P_IDENT(per);
852 * Don't cares are pins with only one dedicated function
855 if (per & P_DONTCARE)
858 if (!(per & P_DEFINED))
861 local_irq_save(flags);
863 if (!check_gpio(ident)) {
865 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
867 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
868 __FUNCTION__, ident, get_label(ident));
870 local_irq_restore(flags);
876 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
879 * Pin functions like AMC address strobes my
880 * be requested and used by several drivers
883 if (!(per & P_MAYSHARE)) {
886 * Allow that the identical pin function can
887 * be requested from the same driver twice
890 if (cmp_label(ident, label) == 0)
894 "%s: Peripheral %d function %d is already"
895 " reserved by %s !\n",
896 __FUNCTION__, ident, P_FUNCT2MUX(per),
899 local_irq_restore(flags);
906 portmux_setup(per, P_FUNCT2MUX(per));
908 port_setup(ident, PERIPHERAL_USAGE);
910 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
911 local_irq_restore(flags);
912 set_label(ident, label);
916 EXPORT_SYMBOL(peripheral_request);
919 int peripheral_request_list(unsigned short per[], const char *label)
924 for (cnt = 0; per[cnt] != 0; cnt++) {
926 ret = peripheral_request(per[cnt], label);
929 for ( ; cnt > 0; cnt--) {
930 peripheral_free(per[cnt - 1]);
938 EXPORT_SYMBOL(peripheral_request_list);
940 void peripheral_free(unsigned short per)
943 unsigned short ident = P_IDENT(per);
945 if (per & P_DONTCARE)
948 if (!(per & P_DEFINED))
951 if (check_gpio(ident) < 0)
954 local_irq_save(flags);
956 if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
957 & gpio_bit(ident)))) {
958 local_irq_restore(flags);
962 if (!(per & P_MAYSHARE)) {
963 port_setup(ident, GPIO_USAGE);
966 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
968 set_label(ident, "free");
970 local_irq_restore(flags);
972 EXPORT_SYMBOL(peripheral_free);
974 void peripheral_free_list(unsigned short per[])
978 for (cnt = 0; per[cnt] != 0; cnt++) {
979 peripheral_free(per[cnt]);
983 EXPORT_SYMBOL(peripheral_free_list);
985 /***********************************************************
987 * FUNCTIONS: Blackfin GPIO Driver
990 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
993 * DESCRIPTION: Blackfin GPIO Driver API
996 *************************************************************
997 * MODIFICATION HISTORY :
998 **************************************************************/
1000 int gpio_request(unsigned short gpio, const char *label)
1002 unsigned long flags;
1004 if (check_gpio(gpio) < 0)
1007 local_irq_save(flags);
1010 * Allow that the identical GPIO can
1011 * be requested from the same driver twice
1012 * Do nothing and return -
1015 if (cmp_label(gpio, label) == 0) {
1016 local_irq_restore(flags);
1020 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1021 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1022 gpio, get_label(gpio));
1024 local_irq_restore(flags);
1027 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1029 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1030 gpio, get_label(gpio));
1032 local_irq_restore(flags);
1036 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1038 local_irq_restore(flags);
1040 port_setup(gpio, GPIO_USAGE);
1041 set_label(gpio, label);
1045 EXPORT_SYMBOL(gpio_request);
1047 void gpio_free(unsigned short gpio)
1049 unsigned long flags;
1051 if (check_gpio(gpio) < 0)
1054 local_irq_save(flags);
1056 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1057 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
1059 local_irq_restore(flags);
1065 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1067 set_label(gpio, "free");
1069 local_irq_restore(flags);
1071 EXPORT_SYMBOL(gpio_free);
1074 void gpio_direction_input(unsigned short gpio)
1076 unsigned long flags;
1078 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1080 local_irq_save(flags);
1081 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1082 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1083 local_irq_restore(flags);
1085 EXPORT_SYMBOL(gpio_direction_input);
1087 void gpio_direction_output(unsigned short gpio)
1089 unsigned long flags;
1091 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1093 local_irq_save(flags);
1094 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
1095 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
1096 local_irq_restore(flags);
1098 EXPORT_SYMBOL(gpio_direction_output);
1100 void gpio_set_value(unsigned short gpio, unsigned short arg)
1103 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
1105 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
1108 EXPORT_SYMBOL(gpio_set_value);
1110 unsigned short gpio_get_value(unsigned short gpio)
1112 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
1114 EXPORT_SYMBOL(gpio_get_value);
1118 void gpio_direction_input(unsigned short gpio)
1120 unsigned long flags;
1122 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1124 local_irq_save(flags);
1125 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1126 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1127 AWA_DUMMY_READ(inen);
1128 local_irq_restore(flags);
1130 EXPORT_SYMBOL(gpio_direction_input);
1132 void gpio_direction_output(unsigned short gpio)
1134 unsigned long flags;
1136 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1138 local_irq_save(flags);
1139 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1140 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1141 AWA_DUMMY_READ(dir);
1142 local_irq_restore(flags);
1144 EXPORT_SYMBOL(gpio_direction_output);
1146 /* If we are booting from SPI and our board lacks a strong enough pull up,
1147 * the core can reset and execute the bootrom faster than the resistor can
1148 * pull the signal logically high. To work around this (common) error in
1149 * board design, we explicitly set the pin back to GPIO mode, force /CS
1150 * high, and wait for the electrons to do their thing.
1152 * This function only makes sense to be called from reset code, but it
1153 * lives here as we need to force all the GPIO states w/out going through
1154 * BUG() checks and such.
1156 void bfin_gpio_reset_spi0_ssel1(void)
1158 u16 gpio = P_IDENT(P_SPI0_SSEL1);
1160 port_setup(gpio, GPIO_USAGE);
1161 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1165 #endif /*BF548_FAMILY */