2 * MPC8544 DS Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
14 compatible = "MPC8544DS", "MPC85xxDS";
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <0>;
32 clock-frequency = <0>;
37 device_type = "memory";
38 reg = <00000000 00000000>; // Filled by U-Boot
46 ranges = <00000000 e0000000 00100000>;
47 reg = <e0000000 00001000>; // CCSRBAR 1M
48 bus-frequency = <0>; // Filled out by uboot.
50 memory-controller@2000 {
51 compatible = "fsl,8544-memory-controller";
53 interrupt-parent = <&mpic>;
57 l2-cache-controller@20000 {
58 compatible = "fsl,8544-l2-cache-controller";
60 cache-line-size = <20>; // 32 bytes
61 cache-size = <40000>; // L2, 256K
62 interrupt-parent = <&mpic>;
68 compatible = "fsl-i2c";
71 interrupt-parent = <&mpic>;
79 compatible = "gianfar";
81 phy0: ethernet-phy@0 {
82 interrupt-parent = <&mpic>;
85 device_type = "ethernet-phy";
87 phy1: ethernet-phy@1 {
88 interrupt-parent = <&mpic>;
91 device_type = "ethernet-phy";
98 device_type = "network";
100 compatible = "gianfar";
102 local-mac-address = [ 00 00 00 00 00 00 ];
103 interrupts = <1d 2 1e 2 22 2>;
104 interrupt-parent = <&mpic>;
105 phy-handle = <&phy0>;
106 phy-connection-type = "rgmii-id";
110 #address-cells = <1>;
112 device_type = "network";
114 compatible = "gianfar";
116 local-mac-address = [ 00 00 00 00 00 00 ];
117 interrupts = <1f 2 20 2 21 2>;
118 interrupt-parent = <&mpic>;
119 phy-handle = <&phy1>;
120 phy-connection-type = "rgmii-id";
124 device_type = "serial";
125 compatible = "ns16550";
127 clock-frequency = <0>;
129 interrupt-parent = <&mpic>;
133 device_type = "serial";
134 compatible = "ns16550";
136 clock-frequency = <0>;
138 interrupt-parent = <&mpic>;
141 global-utilities@e0000 { //global utilities block
142 compatible = "fsl,mpc8548-guts";
148 clock-frequency = <0>;
149 interrupt-controller;
150 #address-cells = <0>;
151 #interrupt-cells = <2>;
153 compatible = "chrp,open-pic";
154 device_type = "open-pic";
160 compatible = "fsl,mpc8540-pci";
162 interrupt-map-mask = <f800 0 0 7>;
165 /* IDSEL 0x11 J17 Slot 1 */
171 /* IDSEL 0x12 J16 Slot 2 */
176 9000 0 0 4 &mpic 1 1>;
178 interrupt-parent = <&mpic>;
181 ranges = <02000000 0 c0000000 c0000000 0 20000000
182 01000000 0 00000000 e1000000 0 00010000>;
183 clock-frequency = <3f940aa>;
184 #interrupt-cells = <1>;
186 #address-cells = <3>;
187 reg = <e0008000 1000>;
191 compatible = "fsl,mpc8548-pcie";
193 #interrupt-cells = <1>;
195 #address-cells = <3>;
196 reg = <e0009000 1000>;
198 ranges = <02000000 0 80000000 80000000 0 20000000
199 01000000 0 00000000 e1010000 0 00010000>;
200 clock-frequency = <1fca055>;
201 interrupt-parent = <&mpic>;
203 interrupt-map-mask = <f800 0 0 7>;
214 #address-cells = <3>;
216 ranges = <02000000 0 80000000
227 compatible = "fsl,mpc8548-pcie";
229 #interrupt-cells = <1>;
231 #address-cells = <3>;
232 reg = <e000a000 1000>;
234 ranges = <02000000 0 a0000000 a0000000 0 10000000
235 01000000 0 00000000 e1020000 0 00010000>;
236 clock-frequency = <1fca055>;
237 interrupt-parent = <&mpic>;
239 interrupt-map-mask = <f800 0 0 7>;
250 #address-cells = <3>;
252 ranges = <02000000 0 a0000000
263 compatible = "fsl,mpc8548-pcie";
265 #interrupt-cells = <1>;
267 #address-cells = <3>;
268 reg = <e000b000 1000>;
270 ranges = <02000000 0 b0000000 b0000000 0 00100000
271 01000000 0 00000000 b0100000 0 00100000>;
272 clock-frequency = <1fca055>;
273 interrupt-parent = <&mpic>;
275 interrupt-map-mask = <ff00 0 0 1>;
278 e000 0 0 1 &i8259 c 2
279 e100 0 0 1 &i8259 9 2
280 e200 0 0 1 &i8259 a 2
281 e300 0 0 1 &i8259 b 2
284 e800 0 0 1 &i8259 6 2
287 f000 0 0 1 &i8259 7 2
288 f100 0 0 1 &i8259 7 2
290 // IDSEL 0x1f IDE/SATA
291 f800 0 0 1 &i8259 e 2
292 f900 0 0 1 &i8259 5 2
298 #address-cells = <3>;
300 ranges = <02000000 0 b0000000
311 #address-cells = <3>;
312 ranges = <02000000 0 b0000000
321 #interrupt-cells = <2>;
323 #address-cells = <2>;
324 reg = <f000 0 0 0 0>;
328 interrupt-parent = <&i8259>;
330 i8259: interrupt-controller@20 {
334 interrupt-controller;
335 device_type = "interrupt-controller";
336 #address-cells = <0>;
337 #interrupt-cells = <2>;
338 compatible = "chrp,iic";
340 interrupt-parent = <&mpic>;
345 #address-cells = <1>;
346 reg = <1 60 1 1 64 1>;
347 interrupts = <1 3 c 3>;
348 interrupt-parent = <&i8259>;
352 compatible = "pnpPNP,303";
357 compatible = "pnpPNP,f03";
362 compatible = "pnpPNP,b00";