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   1 /*
   2  * linux/arch/ia64/kernel/irq_ia64.c
   3  *
   4  * Copyright (C) 1998-2001 Hewlett-Packard Co
   5  *      Stephane Eranian <eranian@hpl.hp.com>
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *
   8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
   9  *           support for SMP and different interrupt controllers.
  10  *
  11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
  12  *                      PCI to vector allocation routine.
  13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
  14  *                                              Added CPU Hotplug handling for IPF.
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/jiffies.h>
  20 #include <linux/errno.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel_stat.h>
  25 #include <linux/slab.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/random.h>       /* for rand_initialize_irq() */
  28 #include <linux/signal.h>
  29 #include <linux/smp.h>
  30 #include <linux/threads.h>
  31 #include <linux/bitops.h>
  32 #include <linux/irq.h>
  33
  34 #include <asm/delay.h>
  35 #include <asm/intrinsics.h>
  36 #include <asm/io.h>
  37 #include <asm/hw_irq.h>
  38 #include <asm/machvec.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/system.h>
  41
  42 #ifdef CONFIG_PERFMON
  43 # include <asm/perfmon.h>
  44 #endif
  45
  46 #define IRQ_DEBUG       0
  47
  48 /* These can be overridden in platform_irq_init */
  49 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
  50 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
  51
  52 /* default base addr of IPI table */
  53 void __iomem *ipi_base_addr = ((void __iomem *)
  54                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
  55
  56 /*
  57  * Legacy IRQ to IA-64 vector translation table.
  58  */
  59 __u8 isa_irq_to_vector_map[16] = {
  60         /* 8259 IRQ translation, first 16 entries */
  61         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
  62         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
  63 };
  64 EXPORT_SYMBOL(isa_irq_to_vector_map);
  65
  66 static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_MAX_DEVICE_VECTORS)];
  67
  68 int
  69 assign_irq_vector (int irq)
  70 {
  71         int pos, vector;
  72  again:
  73         pos = find_first_zero_bit(ia64_vector_mask, IA64_NUM_DEVICE_VECTORS);
  74         vector = IA64_FIRST_DEVICE_VECTOR + pos;
  75         if (vector > IA64_LAST_DEVICE_VECTOR)
  76                 return -ENOSPC;
  77         if (test_and_set_bit(pos, ia64_vector_mask))
  78                 goto again;
  79         return vector;
  80 }
  81
  82 void
  83 free_irq_vector (int vector)
  84 {
  85         int pos;
  86
  87         if (vector < IA64_FIRST_DEVICE_VECTOR || vector > IA64_LAST_DEVICE_VECTOR)
  88                 return;
  89
  90         pos = vector - IA64_FIRST_DEVICE_VECTOR;
  91         if (!test_and_clear_bit(pos, ia64_vector_mask))
  92                 printk(KERN_WARNING "%s: double free!\n", __FUNCTION__);
  93 }
  94
  95 int
  96 reserve_irq_vector (int vector)
  97 {
  98         int pos;
  99
 100         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 101             vector > IA64_LAST_DEVICE_VECTOR)
 102                 return -EINVAL;
 103
 104         pos = vector - IA64_FIRST_DEVICE_VECTOR;
 105         return test_and_set_bit(pos, ia64_vector_mask);
 106 }
 107
 108 /*
 109  * Dynamic irq allocate and deallocation for MSI
 110  */
 111 int create_irq(void)
 112 {
 113         int vector = assign_irq_vector(AUTO_ASSIGN);
 114
 115         if (vector >= 0)
 116                 dynamic_irq_init(vector);
 117
 118         return vector;
 119 }
 120
 121 void destroy_irq(unsigned int irq)
 122 {
 123         dynamic_irq_cleanup(irq);
 124         free_irq_vector(irq);
 125 }
 126
 127 #ifdef CONFIG_SMP
 128 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
 129 #else
 130 #       define IS_RESCHEDULE(vec)       (0)
 131 #endif
 132 /*
 133  * That's where the IVT branches when we get an external
 134  * interrupt. This branches to the correct hardware IRQ handler via
 135  * function ptr.
 136  */
 137 void
 138 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 139 {
 140         struct pt_regs *old_regs = set_irq_regs(regs);
 141         unsigned long saved_tpr;
 142
 143 #if IRQ_DEBUG
 144         {
 145                 unsigned long bsp, sp;
 146
 147                 /*
 148                  * Note: if the interrupt happened while executing in
 149                  * the context switch routine (ia64_switch_to), we may
 150                  * get a spurious stack overflow here.  This is
 151                  * because the register and the memory stack are not
 152                  * switched atomically.
 153                  */
 154                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
 155                 sp = ia64_getreg(_IA64_REG_SP);
 156
 157                 if ((sp - bsp) < 1024) {
 158                         static unsigned char count;
 159                         static long last_time;
 160
 161                         if (jiffies - last_time > 5*HZ)
 162                                 count = 0;
 163                         if (++count < 5) {
 164                                 last_time = jiffies;
 165                                 printk("ia64_handle_irq: DANGER: less than "
 166                                        "1KB of free stack space!!\n"
 167                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
 168                         }
 169                 }
 170         }
 171 #endif /* IRQ_DEBUG */
 172
 173         /*
 174          * Always set TPR to limit maximum interrupt nesting depth to
 175          * 16 (without this, it would be ~240, which could easily lead
 176          * to kernel stack overflows).
 177          */
 178         irq_enter();
 179         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 180         ia64_srlz_d();
 181         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 182                 if (unlikely(IS_RESCHEDULE(vector)))
 183                          kstat_this_cpu.irqs[vector]++;
 184                 else {
 185                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 186                         ia64_srlz_d();
 187
 188                         generic_handle_irq(local_vector_to_irq(vector));
 189
 190                         /*
 191                          * Disable interrupts and send EOI:
 192                          */
 193                         local_irq_disable();
 194                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 195                 }
 196                 ia64_eoi();
 197                 vector = ia64_get_ivr();
 198         }
 199         /*
 200          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
 201          * handler needs to be able to wait for further keyboard interrupts, which can't
 202          * come through until ia64_eoi() has been done.
 203          */
 204         irq_exit();
 205         set_irq_regs(old_regs);
 206 }
 207
 208 #ifdef CONFIG_HOTPLUG_CPU
 209 /*
 210  * This function emulates a interrupt processing when a cpu is about to be
 211  * brought down.
 212  */
 213 void ia64_process_pending_intr(void)
 214 {
 215         ia64_vector vector;
 216         unsigned long saved_tpr;
 217         extern unsigned int vectors_in_migration[NR_IRQS];
 218
 219         vector = ia64_get_ivr();
 220
 221          irq_enter();
 222          saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 223          ia64_srlz_d();
 224
 225          /*
 226           * Perform normal interrupt style processing
 227           */
 228         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 229                 if (unlikely(IS_RESCHEDULE(vector)))
 230                          kstat_this_cpu.irqs[vector]++;
 231                 else {
 232                         struct pt_regs *old_regs = set_irq_regs(NULL);
 233
 234                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 235                         ia64_srlz_d();
 236
 237                         /*
 238                          * Now try calling normal ia64_handle_irq as it would have got called
 239                          * from a real intr handler. Try passing null for pt_regs, hopefully
 240                          * it will work. I hope it works!.
 241                          * Probably could shared code.
 242                          */
 243                         vectors_in_migration[local_vector_to_irq(vector)]=0;
 244                         generic_handle_irq(local_vector_to_irq(vector));
 245                         set_irq_regs(old_regs);
 246
 247                         /*
 248                          * Disable interrupts and send EOI
 249                          */
 250                         local_irq_disable();
 251                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 252                 }
 253                 ia64_eoi();
 254                 vector = ia64_get_ivr();
 255         }
 256         irq_exit();
 257 }
 258 #endif
 259
 260
 261 #ifdef CONFIG_SMP
 262 extern irqreturn_t handle_IPI (int irq, void *dev_id);
 263
 264 static irqreturn_t dummy_handler (int irq, void *dev_id)
 265 {
 266         BUG();
 267 }
 268
 269 static struct irqaction ipi_irqaction = {
 270         .handler =      handle_IPI,
 271         .flags =        IRQF_DISABLED,
 272         .name =         "IPI"
 273 };
 274
 275 static struct irqaction resched_irqaction = {
 276         .handler =      dummy_handler,
 277         .flags =        IRQF_DISABLED,
 278         .name =         "resched"
 279 };
 280 #endif
 281
 282 void
 283 register_percpu_irq (ia64_vector vec, struct irqaction *action)
 284 {
 285         irq_desc_t *desc;
 286         unsigned int irq;
 287
 288         for (irq = 0; irq < NR_IRQS; ++irq)
 289                 if (irq_to_vector(irq) == vec) {
 290                         desc = irq_desc + irq;
 291                         desc->status |= IRQ_PER_CPU;
 292                         desc->chip = &irq_type_ia64_lsapic;
 293                         if (action)
 294                                 setup_irq(irq, action);
 295                 }
 296 }
 297
 298 void __init
 299 init_IRQ (void)
 300 {
 301         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 302 #ifdef CONFIG_SMP
 303         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
 304         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
 305 #endif
 306 #ifdef CONFIG_PERFMON
 307         pfm_init_percpu();
 308 #endif
 309         platform_irq_init();
 310 }
 311
 312 void
 313 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 314 {
 315         void __iomem *ipi_addr;
 316         unsigned long ipi_data;
 317         unsigned long phys_cpu_id;
 318
 319 #ifdef CONFIG_SMP
 320         phys_cpu_id = cpu_physical_id(cpu);
 321 #else
 322         phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
 323 #endif
 324
 325         /*
 326          * cpu number is in 8bit ID and 8bit EID
 327          */
 328
 329         ipi_data = (delivery_mode << 8) | (vector & 0xff);
 330         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
 331
 332         writeq(ipi_data, ipi_addr);
 333 }