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   1 /* linux/drivers/video/sm501fb.c
   2  *
   3  * Copyright (c) 2006 Simtec Electronics
   4  *      Vincent Sanders <vince@simtec.co.uk>
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Framebuffer driver for the Silicon Motion SM501
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/tty.h>
  20 #include <linux/slab.h>
  21 #include <linux/delay.h>
  22 #include <linux/fb.h>
  23 #include <linux/init.h>
  24 #include <linux/vmalloc.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/workqueue.h>
  28 #include <linux/wait.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/clk.h>
  31 #include <linux/console.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/uaccess.h>
  35 #include <asm/div64.h>
  36
  37 #ifdef CONFIG_PM
  38 #include <linux/pm.h>
  39 #endif
  40
  41 #include <linux/sm501.h>
  42 #include <linux/sm501-regs.h>
  43
  44 #define NR_PALETTE      256
  45
  46 enum sm501_controller {
  47         HEAD_CRT        = 0,
  48         HEAD_PANEL      = 1,
  49 };
  50
  51 /* SM501 memory address.
  52  *
  53  * This structure is used to track memory usage within the SM501 framebuffer
  54  * allocation. The sm_addr field is stored as an offset as it is often used
  55  * against both the physical and mapped addresses.
  56  */
  57 struct sm501_mem {
  58         unsigned long    size;
  59         unsigned long    sm_addr;       /* offset from base of sm501 fb. */
  60         void __iomem    *k_addr;
  61 };
  62
  63 /* private data that is shared between all frambuffers* */
  64 struct sm501fb_info {
  65         struct device           *dev;
  66         struct fb_info          *fb[2];         /* fb info for both heads */
  67         struct resource         *fbmem_res;     /* framebuffer resource */
  68         struct resource         *regs_res;      /* registers resource */
  69         struct sm501_platdata_fb *pdata;        /* our platform data */
  70
  71         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
  72
  73         int                      irq;
  74         int                      swap_endian;   /* set to swap rgb=>bgr */
  75         void __iomem            *regs;          /* remapped registers */
  76         void __iomem            *fbmem;         /* remapped framebuffer */
  77         size_t                   fbmem_len;     /* length of remapped region */
  78 };
  79
  80 /* per-framebuffer private data */
  81 struct sm501fb_par {
  82         u32                      pseudo_palette[16];
  83
  84         enum sm501_controller    head;
  85         struct sm501_mem         cursor;
  86         struct sm501_mem         screen;
  87         struct fb_ops            ops;
  88
  89         void                    *store_fb;
  90         void                    *store_cursor;
  91         void __iomem            *cursor_regs;
  92         struct sm501fb_info     *info;
  93 };
  94
  95 /* Helper functions */
  96
  97 static inline int h_total(struct fb_var_screeninfo *var)
  98 {
  99         return var->xres + var->left_margin +
 100                 var->right_margin + var->hsync_len;
 101 }
 102
 103 static inline int v_total(struct fb_var_screeninfo *var)
 104 {
 105         return var->yres + var->upper_margin +
 106                 var->lower_margin + var->vsync_len;
 107 }
 108
 109 /* sm501fb_sync_regs()
 110  *
 111  * This call is mainly for PCI bus systems where we need to
 112  * ensure that any writes to the bus are completed before the
 113  * next phase, or after completing a function.
 114 */
 115
 116 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
 117 {
 118         readl(info->regs);
 119 }
 120
 121 /* sm501_alloc_mem
 122  *
 123  * This is an attempt to lay out memory for the two framebuffers and
 124  * everything else
 125  *
 126  * |fbmem_res->start                                           fbmem_res->end|
 127  * |                                                                         |
 128  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
 129  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
 130  *
 131  * The "spare" space is for the 2d engine data
 132  * the fixed is space for the cursors (2x1Kbyte)
 133  *
 134  * we need to allocate memory for the 2D acceleration engine
 135  * command list and the data for the engine to deal with.
 136  *
 137  * - all allocations must be 128bit aligned
 138  * - cursors are 64x64x2 bits (1Kbyte)
 139  *
 140  */
 141
 142 #define SM501_MEMF_CURSOR               (1)
 143 #define SM501_MEMF_PANEL                (2)
 144 #define SM501_MEMF_CRT                  (4)
 145 #define SM501_MEMF_ACCEL                (8)
 146
 147 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
 148                            unsigned int why, size_t size, u32 smem_len)
 149 {
 150         struct sm501fb_par *par;
 151         struct fb_info *fbi;
 152         unsigned int ptr;
 153         unsigned int end;
 154
 155         switch (why) {
 156         case SM501_MEMF_CURSOR:
 157                 ptr = inf->fbmem_len - size;
 158                 inf->fbmem_len = ptr;   /* adjust available memory. */
 159                 break;
 160
 161         case SM501_MEMF_PANEL:
 162                 if (size > inf->fbmem_len)
 163                         return -ENOMEM;
 164
 165                 ptr = inf->fbmem_len - size;
 166                 fbi = inf->fb[HEAD_CRT];
 167
 168                 /* round down, some programs such as directfb do not draw
 169                  * 0,0 correctly unless the start is aligned to a page start.
 170                  */
 171
 172                 if (ptr > 0)
 173                         ptr &= ~(PAGE_SIZE - 1);
 174
 175                 if (fbi && ptr < smem_len)
 176                         return -ENOMEM;
 177
 178                 break;
 179
 180         case SM501_MEMF_CRT:
 181                 ptr = 0;
 182
 183                 /* check to see if we have panel memory allocated
 184                  * which would put an limit on available memory. */
 185
 186                 fbi = inf->fb[HEAD_PANEL];
 187                 if (fbi) {
 188                         par = fbi->par;
 189                         end = par->screen.k_addr ? par->screen.sm_addr : inf->fbmem_len;
 190                 } else
 191                         end = inf->fbmem_len;
 192
 193                 if ((ptr + size) > end)
 194                         return -ENOMEM;
 195
 196                 break;
 197
 198         case SM501_MEMF_ACCEL:
 199                 fbi = inf->fb[HEAD_CRT];
 200                 ptr = fbi ? smem_len : 0;
 201
 202                 fbi = inf->fb[HEAD_PANEL];
 203                 if (fbi) {
 204                         par = fbi->par;
 205                         end = par->screen.sm_addr;
 206                 } else
 207                         end = inf->fbmem_len;
 208
 209                 if ((ptr + size) > end)
 210                         return -ENOMEM;
 211
 212                 break;
 213
 214         default:
 215                 return -EINVAL;
 216         }
 217
 218         mem->size    = size;
 219         mem->sm_addr = ptr;
 220         mem->k_addr  = inf->fbmem + ptr;
 221
 222         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
 223                 __func__, mem->sm_addr, mem->k_addr, why, size);
 224
 225         return 0;
 226 }
 227
 228 /* sm501fb_ps_to_hz
 229  *
 230  * Converts a period in picoseconds to Hz.
 231  *
 232  * Note, we try to keep this in Hz to minimise rounding with
 233  * the limited PLL settings on the SM501.
 234 */
 235
 236 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
 237 {
 238         unsigned long long numerator=1000000000000ULL;
 239
 240         /* 10^12 / picosecond period gives frequency in Hz */
 241         do_div(numerator, psvalue);
 242         return (unsigned long)numerator;
 243 }
 244
 245 /* sm501fb_hz_to_ps is identical to the oposite transform */
 246
 247 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
 248
 249 /* sm501fb_setup_gamma
 250  *
 251  * Programs a linear 1.0 gamma ramp in case the gamma
 252  * correction is enabled without programming anything else.
 253 */
 254
 255 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
 256                                 unsigned long palette)
 257 {
 258         unsigned long value = 0;
 259         int offset;
 260
 261         /* set gamma values */
 262         for (offset = 0; offset < 256 * 4; offset += 4) {
 263                 writel(value, fbi->regs + palette + offset);
 264                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
 265         }
 266 }
 267
 268 /* sm501fb_check_var
 269  *
 270  * check common variables for both panel and crt
 271 */
 272
 273 static int sm501fb_check_var(struct fb_var_screeninfo *var,
 274                              struct fb_info *info)
 275 {
 276         struct sm501fb_par  *par = info->par;
 277         struct sm501fb_info *sm  = par->info;
 278         unsigned long tmp;
 279
 280         /* check we can fit these values into the registers */
 281
 282         if (var->hsync_len > 255 || var->vsync_len > 63)
 283                 return -EINVAL;
 284
 285         /* hdisplay end and hsync start */
 286         if ((var->xres + var->right_margin) > 4096)
 287                 return -EINVAL;
 288
 289         /* vdisplay end and vsync start */
 290         if ((var->yres + var->lower_margin) > 2048)
 291                 return -EINVAL;
 292
 293         /* hard limits of device */
 294
 295         if (h_total(var) > 4096 || v_total(var) > 2048)
 296                 return -EINVAL;
 297
 298         /* check our line length is going to be 128 bit aligned */
 299
 300         tmp = (var->xres * var->bits_per_pixel) / 8;
 301         if ((tmp & 15) != 0)
 302                 return -EINVAL;
 303
 304         /* check the virtual size */
 305
 306         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
 307                 return -EINVAL;
 308
 309         /* can cope with 8,16 or 32bpp */
 310
 311         if (var->bits_per_pixel <= 8)
 312                 var->bits_per_pixel = 8;
 313         else if (var->bits_per_pixel <= 16)
 314                 var->bits_per_pixel = 16;
 315         else if (var->bits_per_pixel == 24)
 316                 var->bits_per_pixel = 32;
 317
 318         /* set r/g/b positions and validate bpp */
 319         switch(var->bits_per_pixel) {
 320         case 8:
 321                 var->red.length         = var->bits_per_pixel;
 322                 var->red.offset         = 0;
 323                 var->green.length       = var->bits_per_pixel;
 324                 var->green.offset       = 0;
 325                 var->blue.length        = var->bits_per_pixel;
 326                 var->blue.offset        = 0;
 327                 var->transp.length      = 0;
 328                 var->transp.offset      = 0;
 329
 330                 break;
 331
 332         case 16:
 333                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 334                         var->blue.offset        = 11;
 335                         var->green.offset       = 5;
 336                         var->red.offset         = 0;
 337                 } else {
 338                         var->red.offset         = 11;
 339                         var->green.offset       = 5;
 340                         var->blue.offset        = 0;
 341                 }
 342                 var->transp.offset      = 0;
 343
 344                 var->red.length         = 5;
 345                 var->green.length       = 6;
 346                 var->blue.length        = 5;
 347                 var->transp.length      = 0;
 348                 break;
 349
 350         case 32:
 351                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 352                         var->transp.offset      = 0;
 353                         var->red.offset         = 8;
 354                         var->green.offset       = 16;
 355                         var->blue.offset        = 24;
 356                 } else {
 357                         var->transp.offset      = 24;
 358                         var->red.offset         = 16;
 359                         var->green.offset       = 8;
 360                         var->blue.offset        = 0;
 361                 }
 362
 363                 var->red.length         = 8;
 364                 var->green.length       = 8;
 365                 var->blue.length        = 8;
 366                 var->transp.length      = 0;
 367                 break;
 368
 369         default:
 370                 return -EINVAL;
 371         }
 372
 373         return 0;
 374 }
 375
 376 /*
 377  * sm501fb_check_var_crt():
 378  *
 379  * check the parameters for the CRT head, and either bring them
 380  * back into range, or return -EINVAL.
 381 */
 382
 383 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
 384                                  struct fb_info *info)
 385 {
 386         return sm501fb_check_var(var, info);
 387 }
 388
 389 /* sm501fb_check_var_pnl():
 390  *
 391  * check the parameters for the CRT head, and either bring them
 392  * back into range, or return -EINVAL.
 393 */
 394
 395 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
 396                                  struct fb_info *info)
 397 {
 398         return sm501fb_check_var(var, info);
 399 }
 400
 401 /* sm501fb_set_par_common
 402  *
 403  * set common registers for framebuffers
 404 */
 405
 406 static int sm501fb_set_par_common(struct fb_info *info,
 407                                   struct fb_var_screeninfo *var)
 408 {
 409         struct sm501fb_par  *par = info->par;
 410         struct sm501fb_info *fbi = par->info;
 411         unsigned long pixclock;      /* pixelclock in Hz */
 412         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
 413         unsigned int mem_type;
 414         unsigned int clock_type;
 415         unsigned int head_addr;
 416         unsigned int smem_len;
 417
 418         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
 419                 __func__, var->xres, var->yres, var->bits_per_pixel,
 420                 var->xres_virtual, var->yres_virtual);
 421
 422         switch (par->head) {
 423         case HEAD_CRT:
 424                 mem_type = SM501_MEMF_CRT;
 425                 clock_type = SM501_CLOCK_V2XCLK;
 426                 head_addr = SM501_DC_CRT_FB_ADDR;
 427                 break;
 428
 429         case HEAD_PANEL:
 430                 mem_type = SM501_MEMF_PANEL;
 431                 clock_type = SM501_CLOCK_P2XCLK;
 432                 head_addr = SM501_DC_PANEL_FB_ADDR;
 433                 break;
 434
 435         default:
 436                 mem_type = 0;           /* stop compiler warnings */
 437                 head_addr = 0;
 438                 clock_type = 0;
 439         }
 440
 441         switch (var->bits_per_pixel) {
 442         case 8:
 443                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 444                 break;
 445
 446         case 16:
 447                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 448                 break;
 449
 450         case 32:
 451                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 452                 break;
 453         }
 454
 455         /* allocate fb memory within 501 */
 456         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
 457         smem_len = info->fix.line_length * var->yres_virtual;
 458
 459         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
 460                 info->fix.line_length);
 461
 462         if (sm501_alloc_mem(fbi, &par->screen, mem_type, smem_len, smem_len)) {
 463                 dev_err(fbi->dev, "no memory available\n");
 464                 return -ENOMEM;
 465         }
 466
 467         mutex_lock(&info->mm_lock);
 468         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
 469         info->fix.smem_len   = smem_len;
 470         mutex_unlock(&info->mm_lock);
 471
 472         info->screen_base = fbi->fbmem + par->screen.sm_addr;
 473         info->screen_size = info->fix.smem_len;
 474
 475         /* set start of framebuffer to the screen */
 476
 477         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
 478
 479         /* program CRT clock  */
 480
 481         pixclock = sm501fb_ps_to_hz(var->pixclock);
 482
 483         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
 484                                         pixclock);
 485
 486         /* update fb layer with actual clock used */
 487         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
 488
 489         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
 490                "sm501pixclock = %lu,  error = %ld%%\n",
 491                __func__, var->pixclock, pixclock, sm501pixclock,
 492                ((pixclock - sm501pixclock)*100)/pixclock);
 493
 494         return 0;
 495 }
 496
 497 /* sm501fb_set_par_geometry
 498  *
 499  * set the geometry registers for specified framebuffer.
 500 */
 501
 502 static void sm501fb_set_par_geometry(struct fb_info *info,
 503                                      struct fb_var_screeninfo *var)
 504 {
 505         struct sm501fb_par  *par = info->par;
 506         struct sm501fb_info *fbi = par->info;
 507         void __iomem *base = fbi->regs;
 508         unsigned long reg;
 509
 510         if (par->head == HEAD_CRT)
 511                 base += SM501_DC_CRT_H_TOT;
 512         else
 513                 base += SM501_DC_PANEL_H_TOT;
 514
 515         /* set framebuffer width and display width */
 516
 517         reg = info->fix.line_length;
 518         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
 519
 520         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
 521                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
 522
 523         /* program horizontal total */
 524
 525         reg  = (h_total(var) - 1) << 16;
 526         reg |= (var->xres - 1);
 527
 528         writel(reg, base + SM501_OFF_DC_H_TOT);
 529
 530         /* program horizontal sync */
 531
 532         reg  = var->hsync_len << 16;
 533         reg |= var->xres + var->right_margin - 1;
 534
 535         writel(reg, base + SM501_OFF_DC_H_SYNC);
 536
 537         /* program vertical total */
 538
 539         reg  = (v_total(var) - 1) << 16;
 540         reg |= (var->yres - 1);
 541
 542         writel(reg, base + SM501_OFF_DC_V_TOT);
 543
 544         /* program vertical sync */
 545         reg  = var->vsync_len << 16;
 546         reg |= var->yres + var->lower_margin - 1;
 547
 548         writel(reg, base + SM501_OFF_DC_V_SYNC);
 549 }
 550
 551 /* sm501fb_pan_crt
 552  *
 553  * pan the CRT display output within an virtual framebuffer
 554 */
 555
 556 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
 557                            struct fb_info *info)
 558 {
 559         struct sm501fb_par  *par = info->par;
 560         struct sm501fb_info *fbi = par->info;
 561         unsigned int bytes_pixel = var->bits_per_pixel / 8;
 562         unsigned long reg;
 563         unsigned long xoffs;
 564
 565         xoffs = var->xoffset * bytes_pixel;
 566
 567         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 568
 569         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
 570         reg |= ((xoffs & 15) / bytes_pixel) << 4;
 571         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
 572
 573         reg = (par->screen.sm_addr + xoffs +
 574                var->yoffset * info->fix.line_length);
 575         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
 576
 577         sm501fb_sync_regs(fbi);
 578         return 0;
 579 }
 580
 581 /* sm501fb_pan_pnl
 582  *
 583  * pan the panel display output within an virtual framebuffer
 584 */
 585
 586 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
 587                            struct fb_info *info)
 588 {
 589         struct sm501fb_par  *par = info->par;
 590         struct sm501fb_info *fbi = par->info;
 591         unsigned long reg;
 592
 593         reg = var->xoffset | (var->xres_virtual << 16);
 594         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
 595
 596         reg = var->yoffset | (var->yres_virtual << 16);
 597         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
 598
 599         sm501fb_sync_regs(fbi);
 600         return 0;
 601 }
 602
 603 /* sm501fb_set_par_crt
 604  *
 605  * Set the CRT video mode from the fb_info structure
 606 */
 607
 608 static int sm501fb_set_par_crt(struct fb_info *info)
 609 {
 610         struct sm501fb_par  *par = info->par;
 611         struct sm501fb_info *fbi = par->info;
 612         struct fb_var_screeninfo *var = &info->var;
 613         unsigned long control;       /* control register */
 614         int ret;
 615
 616         /* activate new configuration */
 617
 618         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 619
 620         /* enable CRT DAC - note 0 is on!*/
 621         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 622
 623         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 624
 625         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
 626                     SM501_DC_CRT_CONTROL_GAMMA |
 627                     SM501_DC_CRT_CONTROL_BLANK |
 628                     SM501_DC_CRT_CONTROL_SEL |
 629                     SM501_DC_CRT_CONTROL_CP |
 630                     SM501_DC_CRT_CONTROL_TVP);
 631
 632         /* set the sync polarities before we check data source  */
 633
 634         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 635                 control |= SM501_DC_CRT_CONTROL_HSP;
 636
 637         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 638                 control |= SM501_DC_CRT_CONTROL_VSP;
 639
 640         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
 641                 /* the head is displaying panel data... */
 642
 643                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0,
 644                                 info->fix.smem_len);
 645                 goto out_update;
 646         }
 647
 648         ret = sm501fb_set_par_common(info, var);
 649         if (ret) {
 650                 dev_err(fbi->dev, "failed to set common parameters\n");
 651                 return ret;
 652         }
 653
 654         sm501fb_pan_crt(var, info);
 655         sm501fb_set_par_geometry(info, var);
 656
 657         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 658
 659         switch(var->bits_per_pixel) {
 660         case 8:
 661                 control |= SM501_DC_CRT_CONTROL_8BPP;
 662                 break;
 663
 664         case 16:
 665                 control |= SM501_DC_CRT_CONTROL_16BPP;
 666                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 667                 break;
 668
 669         case 32:
 670                 control |= SM501_DC_CRT_CONTROL_32BPP;
 671                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 672                 break;
 673
 674         default:
 675                 BUG();
 676         }
 677
 678         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
 679         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
 680         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
 681
 682  out_update:
 683         dev_dbg(fbi->dev, "new control is %08lx\n", control);
 684
 685         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
 686         sm501fb_sync_regs(fbi);
 687
 688         return 0;
 689 }
 690
 691 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
 692 {
 693         unsigned long control;
 694         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
 695         struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
 696
 697         control = readl(ctrl_reg);
 698
 699         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
 700                 /* enable panel power */
 701
 702                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
 703                 writel(control, ctrl_reg);
 704                 sm501fb_sync_regs(fbi);
 705                 mdelay(10);
 706
 707                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
 708                 writel(control, ctrl_reg);
 709                 sm501fb_sync_regs(fbi);
 710                 mdelay(10);
 711
 712                 /* VBIASEN */
 713
 714                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
 715                         if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
 716                                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
 717                         else
 718                                 control |= SM501_DC_PANEL_CONTROL_BIAS;
 719
 720                         writel(control, ctrl_reg);
 721                         sm501fb_sync_regs(fbi);
 722                         mdelay(10);
 723                 }
 724
 725                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
 726                         if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
 727                                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
 728                         else
 729                                 control |= SM501_DC_PANEL_CONTROL_FPEN;
 730
 731                         writel(control, ctrl_reg);
 732                         sm501fb_sync_regs(fbi);
 733                         mdelay(10);
 734                 }
 735         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
 736                 /* disable panel power */
 737                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
 738                         if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
 739                                 control |= SM501_DC_PANEL_CONTROL_FPEN;
 740                         else
 741                                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
 742
 743                         writel(control, ctrl_reg);
 744                         sm501fb_sync_regs(fbi);
 745                         mdelay(10);
 746                 }
 747
 748                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
 749                         if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
 750                                 control |= SM501_DC_PANEL_CONTROL_BIAS;
 751                         else
 752                                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
 753
 754                         writel(control, ctrl_reg);
 755                         sm501fb_sync_regs(fbi);
 756                         mdelay(10);
 757                 }
 758
 759                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
 760                 writel(control, ctrl_reg);
 761                 sm501fb_sync_regs(fbi);
 762                 mdelay(10);
 763
 764                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
 765                 writel(control, ctrl_reg);
 766                 sm501fb_sync_regs(fbi);
 767                 mdelay(10);
 768         }
 769
 770         sm501fb_sync_regs(fbi);
 771 }
 772
 773 /* sm501fb_set_par_pnl
 774  *
 775  * Set the panel video mode from the fb_info structure
 776 */
 777
 778 static int sm501fb_set_par_pnl(struct fb_info *info)
 779 {
 780         struct sm501fb_par  *par = info->par;
 781         struct sm501fb_info *fbi = par->info;
 782         struct fb_var_screeninfo *var = &info->var;
 783         unsigned long control;
 784         unsigned long reg;
 785         int ret;
 786
 787         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 788
 789         /* activate this new configuration */
 790
 791         ret = sm501fb_set_par_common(info, var);
 792         if (ret)
 793                 return ret;
 794
 795         sm501fb_pan_pnl(var, info);
 796         sm501fb_set_par_geometry(info, var);
 797
 798         /* update control register */
 799
 800         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
 801         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
 802                     SM501_DC_PANEL_CONTROL_VDD  |
 803                     SM501_DC_PANEL_CONTROL_DATA |
 804                     SM501_DC_PANEL_CONTROL_BIAS |
 805                     SM501_DC_PANEL_CONTROL_FPEN |
 806                     SM501_DC_PANEL_CONTROL_CP |
 807                     SM501_DC_PANEL_CONTROL_CK |
 808                     SM501_DC_PANEL_CONTROL_HP |
 809                     SM501_DC_PANEL_CONTROL_VP |
 810                     SM501_DC_PANEL_CONTROL_HPD |
 811                     SM501_DC_PANEL_CONTROL_VPD);
 812
 813         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 814
 815         switch(var->bits_per_pixel) {
 816         case 8:
 817                 control |= SM501_DC_PANEL_CONTROL_8BPP;
 818                 break;
 819
 820         case 16:
 821                 control |= SM501_DC_PANEL_CONTROL_16BPP;
 822                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 823                 break;
 824
 825         case 32:
 826                 control |= SM501_DC_PANEL_CONTROL_32BPP;
 827                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 828                 break;
 829
 830         default:
 831                 BUG();
 832         }
 833
 834         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
 835
 836         /* panel plane top left and bottom right location */
 837
 838         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
 839
 840         reg  = var->xres - 1;
 841         reg |= (var->yres - 1) << 16;
 842
 843         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
 844
 845         /* program panel control register */
 846
 847         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
 848         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
 849
 850         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 851                 control |= SM501_DC_PANEL_CONTROL_HSP;
 852
 853         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 854                 control |= SM501_DC_PANEL_CONTROL_VSP;
 855
 856         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
 857         sm501fb_sync_regs(fbi);
 858
 859         /* ensure the panel interface is not tristated at this point */
 860
 861         sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
 862                          0, SM501_SYSCTRL_PANEL_TRISTATE);
 863
 864         /* power the panel up */
 865         sm501fb_panel_power(fbi, 1);
 866         return 0;
 867 }
 868
 869
 870 /* chan_to_field
 871  *
 872  * convert a colour value into a field position
 873  *
 874  * from pxafb.c
 875 */
 876
 877 static inline unsigned int chan_to_field(unsigned int chan,
 878                                          struct fb_bitfield *bf)
 879 {
 880         chan &= 0xffff;
 881         chan >>= 16 - bf->length;
 882         return chan << bf->offset;
 883 }
 884
 885 /* sm501fb_setcolreg
 886  *
 887  * set the colour mapping for modes that support palettised data
 888 */
 889
 890 static int sm501fb_setcolreg(unsigned regno,
 891                              unsigned red, unsigned green, unsigned blue,
 892                              unsigned transp, struct fb_info *info)
 893 {
 894         struct sm501fb_par  *par = info->par;
 895         struct sm501fb_info *fbi = par->info;
 896         void __iomem *base = fbi->regs;
 897         unsigned int val;
 898
 899         if (par->head == HEAD_CRT)
 900                 base += SM501_DC_CRT_PALETTE;
 901         else
 902                 base += SM501_DC_PANEL_PALETTE;
 903
 904         switch (info->fix.visual) {
 905         case FB_VISUAL_TRUECOLOR:
 906                 /* true-colour, use pseuo-palette */
 907
 908                 if (regno < 16) {
 909                         u32 *pal = par->pseudo_palette;
 910
 911                         val  = chan_to_field(red,   &info->var.red);
 912                         val |= chan_to_field(green, &info->var.green);
 913                         val |= chan_to_field(blue,  &info->var.blue);
 914
 915                         pal[regno] = val;
 916                 }
 917                 break;
 918
 919         case FB_VISUAL_PSEUDOCOLOR:
 920                 if (regno < 256) {
 921                         val = (red >> 8) << 16;
 922                         val |= (green >> 8) << 8;
 923                         val |= blue >> 8;
 924
 925                         writel(val, base + (regno * 4));
 926                 }
 927
 928                 break;
 929
 930         default:
 931                 return 1;   /* unknown type */
 932         }
 933
 934         return 0;
 935 }
 936
 937 /* sm501fb_blank_pnl
 938  *
 939  * Blank or un-blank the panel interface
 940 */
 941
 942 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
 943 {
 944         struct sm501fb_par  *par = info->par;
 945         struct sm501fb_info *fbi = par->info;
 946
 947         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 948
 949         switch (blank_mode) {
 950         case FB_BLANK_POWERDOWN:
 951                 sm501fb_panel_power(fbi, 0);
 952                 break;
 953
 954         case FB_BLANK_UNBLANK:
 955                 sm501fb_panel_power(fbi, 1);
 956                 break;
 957
 958         case FB_BLANK_NORMAL:
 959         case FB_BLANK_VSYNC_SUSPEND:
 960         case FB_BLANK_HSYNC_SUSPEND:
 961         default:
 962                 return 1;
 963         }
 964
 965         return 0;
 966 }
 967
 968 /* sm501fb_blank_crt
 969  *
 970  * Blank or un-blank the crt interface
 971 */
 972
 973 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
 974 {
 975         struct sm501fb_par  *par = info->par;
 976         struct sm501fb_info *fbi = par->info;
 977         unsigned long ctrl;
 978
 979         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 980
 981         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 982
 983         switch (blank_mode) {
 984         case FB_BLANK_POWERDOWN:
 985                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
 986                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
 987
 988         case FB_BLANK_NORMAL:
 989                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
 990                 break;
 991
 992         case FB_BLANK_UNBLANK:
 993                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
 994                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
 995                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 996                 break;
 997
 998         case FB_BLANK_VSYNC_SUSPEND:
 999         case FB_BLANK_HSYNC_SUSPEND:
1000         default:
1001                 return 1;
1002
1003         }
1004
1005         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
1006         sm501fb_sync_regs(fbi);
1007
1008         return 0;
1009 }
1010
1011 /* sm501fb_cursor
1012  *
1013  * set or change the hardware cursor parameters
1014 */
1015
1016 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1017 {
1018         struct sm501fb_par  *par = info->par;
1019         struct sm501fb_info *fbi = par->info;
1020         void __iomem *base = fbi->regs;
1021         unsigned long hwc_addr;
1022         unsigned long fg, bg;
1023
1024         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
1025
1026         if (par->head == HEAD_CRT)
1027                 base += SM501_DC_CRT_HWC_BASE;
1028         else
1029                 base += SM501_DC_PANEL_HWC_BASE;
1030
1031         /* check not being asked to exceed capabilities */
1032
1033         if (cursor->image.width > 64)
1034                 return -EINVAL;
1035
1036         if (cursor->image.height > 64)
1037                 return -EINVAL;
1038
1039         if (cursor->image.depth > 1)
1040                 return -EINVAL;
1041
1042         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
1043
1044         if (cursor->enable)
1045                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1046         else
1047                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1048
1049         /* set data */
1050         if (cursor->set & FB_CUR_SETPOS) {
1051                 unsigned int x = cursor->image.dx;
1052                 unsigned int y = cursor->image.dy;
1053
1054                 if (x >= 2048 || y >= 2048 )
1055                         return -EINVAL;
1056
1057                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
1058
1059                 //y += cursor->image.height;
1060
1061                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
1062         }
1063
1064         if (cursor->set & FB_CUR_SETCMAP) {
1065                 unsigned int bg_col = cursor->image.bg_color;
1066                 unsigned int fg_col = cursor->image.fg_color;
1067
1068                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1069                         __func__, bg_col, fg_col);
1070
1071                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1072                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
1073                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1074
1075                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1076                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
1077                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1078
1079                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1080
1081                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1082                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1083         }
1084
1085         if (cursor->set & FB_CUR_SETSIZE ||
1086             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1087                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1088                  * clears it to transparent then combines the cursor
1089                  * shape plane with the colour plane to set the
1090                  * cursor */
1091                 int x, y;
1092                 const unsigned char *pcol = cursor->image.data;
1093                 const unsigned char *pmsk = cursor->mask;
1094                 void __iomem   *dst = par->cursor.k_addr;
1095                 unsigned char  dcol = 0;
1096                 unsigned char  dmsk = 0;
1097                 unsigned int   op;
1098
1099                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1100                         __func__, cursor->image.width, cursor->image.height);
1101
1102                 for (op = 0; op < (64*64*2)/8; op+=4)
1103                         writel(0x0, dst + op);
1104
1105                 for (y = 0; y < cursor->image.height; y++) {
1106                         for (x = 0; x < cursor->image.width; x++) {
1107                                 if ((x % 8) == 0) {
1108                                         dcol = *pcol++;
1109                                         dmsk = *pmsk++;
1110                                 } else {
1111                                         dcol >>= 1;
1112                                         dmsk >>= 1;
1113                                 }
1114
1115                                 if (dmsk & 1) {
1116                                         op = (dcol & 1) ? 1 : 3;
1117                                         op <<= ((x % 4) * 2);
1118
1119                                         op |= readb(dst + (x / 4));
1120                                         writeb(op, dst + (x / 4));
1121                                 }
1122                         }
1123                         dst += (64*2)/8;
1124                 }
1125         }
1126
1127         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1128         return 0;
1129 }
1130
1131 /* sm501fb_crtsrc_show
1132  *
1133  * device attribute code to show where the crt output is sourced from
1134 */
1135
1136 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1137                                struct device_attribute *attr, char *buf)
1138 {
1139         struct sm501fb_info *info = dev_get_drvdata(dev);
1140         unsigned long ctrl;
1141
1142         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1143         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1144
1145         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1146 }
1147
1148 /* sm501fb_crtsrc_show
1149  *
1150  * device attribute code to set where the crt output is sourced from
1151 */
1152
1153 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1154                                 struct device_attribute *attr,
1155                                 const char *buf, size_t len)
1156 {
1157         struct sm501fb_info *info = dev_get_drvdata(dev);
1158         enum sm501_controller head;
1159         unsigned long ctrl;
1160
1161         if (len < 1)
1162                 return -EINVAL;
1163
1164         if (strnicmp(buf, "crt", 3) == 0)
1165                 head = HEAD_CRT;
1166         else if (strnicmp(buf, "panel", 5) == 0)
1167                 head = HEAD_PANEL;
1168         else
1169                 return -EINVAL;
1170
1171         dev_info(dev, "setting crt source to head %d\n", head);
1172
1173         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1174
1175         if (head == HEAD_CRT) {
1176                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1177                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1178                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1179         } else {
1180                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1181                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1182                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1183         }
1184
1185         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1186         sm501fb_sync_regs(info);
1187
1188         return len;
1189 }
1190
1191 /* Prepare the device_attr for registration with sysfs later */
1192 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1193
1194 /* sm501fb_show_regs
1195  *
1196  * show the primary sm501 registers
1197 */
1198 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1199                              unsigned int start, unsigned int len)
1200 {
1201         void __iomem *mem = info->regs;
1202         char *buf = ptr;
1203         unsigned int reg;
1204
1205         for (reg = start; reg < (len + start); reg += 4)
1206                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1207
1208         return ptr - buf;
1209 }
1210
1211 /* sm501fb_debug_show_crt
1212  *
1213  * show the crt control and cursor registers
1214 */
1215
1216 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1217                                   struct device_attribute *attr, char *buf)
1218 {
1219         struct sm501fb_info *info = dev_get_drvdata(dev);
1220         char *ptr = buf;
1221
1222         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1223         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1224
1225         return ptr - buf;
1226 }
1227
1228 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1229
1230 /* sm501fb_debug_show_pnl
1231  *
1232  * show the panel control and cursor registers
1233 */
1234
1235 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1236                                   struct device_attribute *attr, char *buf)
1237 {
1238         struct sm501fb_info *info = dev_get_drvdata(dev);
1239         char *ptr = buf;
1240
1241         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1242         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1243
1244         return ptr - buf;
1245 }
1246
1247 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1248
1249 /* framebuffer ops */
1250
1251 static struct fb_ops sm501fb_ops_crt = {
1252         .owner          = THIS_MODULE,
1253         .fb_check_var   = sm501fb_check_var_crt,
1254         .fb_set_par     = sm501fb_set_par_crt,
1255         .fb_blank       = sm501fb_blank_crt,
1256         .fb_setcolreg   = sm501fb_setcolreg,
1257         .fb_pan_display = sm501fb_pan_crt,
1258         .fb_cursor      = sm501fb_cursor,
1259         .fb_fillrect    = cfb_fillrect,
1260         .fb_copyarea    = cfb_copyarea,
1261         .fb_imageblit   = cfb_imageblit,
1262 };
1263
1264 static struct fb_ops sm501fb_ops_pnl = {
1265         .owner          = THIS_MODULE,
1266         .fb_check_var   = sm501fb_check_var_pnl,
1267         .fb_set_par     = sm501fb_set_par_pnl,
1268         .fb_pan_display = sm501fb_pan_pnl,
1269         .fb_blank       = sm501fb_blank_pnl,
1270         .fb_setcolreg   = sm501fb_setcolreg,
1271         .fb_cursor      = sm501fb_cursor,
1272         .fb_fillrect    = cfb_fillrect,
1273         .fb_copyarea    = cfb_copyarea,
1274         .fb_imageblit   = cfb_imageblit,
1275 };
1276
1277 /* sm501_init_cursor
1278  *
1279  * initialise hw cursor parameters
1280 */
1281
1282 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1283 {
1284         struct sm501fb_par *par;
1285         struct sm501fb_info *info;
1286         int ret;
1287
1288         if (fbi == NULL)
1289                 return 0;
1290
1291         par = fbi->par;
1292         info = par->info;
1293
1294         par->cursor_regs = info->regs + reg_base;
1295
1296         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024,
1297                               fbi->fix.smem_len);
1298         if (ret < 0)
1299                 return ret;
1300
1301         /* initialise the colour registers */
1302
1303         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1304
1305         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1306         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1307         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1308         sm501fb_sync_regs(info);
1309
1310         return 0;
1311 }
1312
1313 /* sm501fb_info_start
1314  *
1315  * fills the par structure claiming resources and remapping etc.
1316 */
1317
1318 static int sm501fb_start(struct sm501fb_info *info,
1319                          struct platform_device *pdev)
1320 {
1321         struct resource *res;
1322         struct device *dev = &pdev->dev;
1323         int k;
1324         int ret;
1325
1326         info->irq = ret = platform_get_irq(pdev, 0);
1327         if (ret < 0) {
1328                 /* we currently do not use the IRQ */
1329                 dev_warn(dev, "no irq for device\n");
1330         }
1331
1332         /* allocate, reserve and remap resources for registers */
1333         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1334         if (res == NULL) {
1335                 dev_err(dev, "no resource definition for registers\n");
1336                 ret = -ENOENT;
1337                 goto err_release;
1338         }
1339
1340         info->regs_res = request_mem_region(res->start,
1341                                             res->end - res->start,
1342                                             pdev->name);
1343
1344         if (info->regs_res == NULL) {
1345                 dev_err(dev, "cannot claim registers\n");
1346                 ret = -ENXIO;
1347                 goto err_release;
1348         }
1349
1350         info->regs = ioremap(res->start, (res->end - res->start)+1);
1351         if (info->regs == NULL) {
1352                 dev_err(dev, "cannot remap registers\n");
1353                 ret = -ENXIO;
1354                 goto err_regs_res;
1355         }
1356
1357         /* allocate, reserve resources for framebuffer */
1358         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1359         if (res == NULL) {
1360                 dev_err(dev, "no memory resource defined\n");
1361                 ret = -ENXIO;
1362                 goto err_regs_map;
1363         }
1364
1365         info->fbmem_res = request_mem_region(res->start,
1366                                              (res->end - res->start)+1,
1367                                              pdev->name);
1368         if (info->fbmem_res == NULL) {
1369                 dev_err(dev, "cannot claim framebuffer\n");
1370                 ret = -ENXIO;
1371                 goto err_regs_map;
1372         }
1373
1374         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1375         if (info->fbmem == NULL) {
1376                 dev_err(dev, "cannot remap framebuffer\n");
1377                 goto err_mem_res;
1378         }
1379
1380         info->fbmem_len = (res->end - res->start)+1;
1381
1382         /* clear framebuffer memory - avoids garbage data on unused fb */
1383         memset(info->fbmem, 0, info->fbmem_len);
1384
1385         /* clear palette ram - undefined at power on */
1386         for (k = 0; k < (256 * 3); k++)
1387                 writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1388
1389         /* enable display controller */
1390         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1391
1392         /* setup cursors */
1393
1394         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1395         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1396
1397         return 0; /* everything is setup */
1398
1399  err_mem_res:
1400         release_resource(info->fbmem_res);
1401         kfree(info->fbmem_res);
1402
1403  err_regs_map:
1404         iounmap(info->regs);
1405
1406  err_regs_res:
1407         release_resource(info->regs_res);
1408         kfree(info->regs_res);
1409
1410  err_release:
1411         return ret;
1412 }
1413
1414 static void sm501fb_stop(struct sm501fb_info *info)
1415 {
1416         /* disable display controller */
1417         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1418
1419         iounmap(info->fbmem);
1420         release_resource(info->fbmem_res);
1421         kfree(info->fbmem_res);
1422
1423         iounmap(info->regs);
1424         release_resource(info->regs_res);
1425         kfree(info->regs_res);
1426 }
1427
1428 static int sm501fb_init_fb(struct fb_info *fb,
1429                            enum sm501_controller head,
1430                            const char *fbname)
1431 {
1432         struct sm501_platdata_fbsub *pd;
1433         struct sm501fb_par *par = fb->par;
1434         struct sm501fb_info *info = par->info;
1435         unsigned long ctrl;
1436         unsigned int enable;
1437         int ret;
1438
1439         switch (head) {
1440         case HEAD_CRT:
1441                 pd = info->pdata->fb_crt;
1442                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1443                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1444
1445                 /* ensure we set the correct source register */
1446                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1447                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1448                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1449                 }
1450
1451                 break;
1452
1453         case HEAD_PANEL:
1454                 pd = info->pdata->fb_pnl;
1455                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1456                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1457                 break;
1458
1459         default:
1460                 pd = NULL;              /* stop compiler warnings */
1461                 ctrl = 0;
1462                 enable = 0;
1463                 BUG();
1464         }
1465
1466         dev_info(info->dev, "fb %s %sabled at start\n",
1467                  fbname, enable ? "en" : "dis");
1468
1469         /* check to see if our routing allows this */
1470
1471         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1472                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1473                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1474                 enable = 0;
1475         }
1476
1477         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1478
1479         memcpy(&par->ops,
1480                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1481                sizeof(struct fb_ops));
1482
1483         /* update ops dependant on what we've been passed */
1484
1485         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1486                 par->ops.fb_cursor = NULL;
1487
1488         fb->fbops = &par->ops;
1489         fb->flags = FBINFO_FLAG_DEFAULT |
1490                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1491
1492         /* fixed data */
1493
1494         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1495         fb->fix.type_aux        = 0;
1496         fb->fix.xpanstep        = 1;
1497         fb->fix.ypanstep        = 1;
1498         fb->fix.ywrapstep       = 0;
1499         fb->fix.accel           = FB_ACCEL_NONE;
1500
1501         /* screenmode */
1502
1503         fb->var.nonstd          = 0;
1504         fb->var.activate        = FB_ACTIVATE_NOW;
1505         fb->var.accel_flags     = 0;
1506         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1507         fb->var.bits_per_pixel  = 16;
1508
1509         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1510                 /* TODO read the mode from the current display */
1511
1512         } else {
1513                 if (pd->def_mode) {
1514                         dev_info(info->dev, "using supplied mode\n");
1515                         fb_videomode_to_var(&fb->var, pd->def_mode);
1516
1517                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1518                         fb->var.xres_virtual = fb->var.xres;
1519                         fb->var.yres_virtual = fb->var.yres;
1520                 } else {
1521                         ret = fb_find_mode(&fb->var, fb,
1522                                            NULL, NULL, 0, NULL, 8);
1523
1524                         if (ret == 0 || ret == 4) {
1525                                 dev_err(info->dev,
1526                                         "failed to get initial mode\n");
1527                                 return -EINVAL;
1528                         }
1529                 }
1530         }
1531
1532         /* initialise and set the palette */
1533         if (fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0)) {
1534                 dev_err(info->dev, "failed to allocate cmap memory\n");
1535                 return -ENOMEM;
1536         }
1537         fb_set_cmap(&fb->cmap, fb);
1538
1539         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1540         if (ret)
1541                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1542
1543         /* ensure we've activated our new configuration */
1544         (fb->fbops->fb_set_par)(fb);
1545
1546         return 0;
1547 }
1548
1549 /* default platform data if none is supplied (ie, PCI device) */
1550
1551 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1552         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1553                            SM501FB_FLAG_USE_HWCURSOR |
1554                            SM501FB_FLAG_USE_HWACCEL |
1555                            SM501FB_FLAG_DISABLE_AT_EXIT),
1556
1557 };
1558
1559 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1560         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1561                            SM501FB_FLAG_USE_HWCURSOR |
1562                            SM501FB_FLAG_USE_HWACCEL |
1563                            SM501FB_FLAG_DISABLE_AT_EXIT),
1564 };
1565
1566 static struct sm501_platdata_fb sm501fb_def_pdata = {
1567         .fb_route               = SM501_FB_OWN,
1568         .fb_crt                 = &sm501fb_pdata_crt,
1569         .fb_pnl                 = &sm501fb_pdata_pnl,
1570 };
1571
1572 static char driver_name_crt[] = "sm501fb-crt";
1573 static char driver_name_pnl[] = "sm501fb-panel";
1574
1575 static int __devinit sm501fb_probe_one(struct sm501fb_info *info,
1576                                        enum sm501_controller head)
1577 {
1578         unsigned char *name = (head == HEAD_CRT) ? "crt" : "panel";
1579         struct sm501_platdata_fbsub *pd;
1580         struct sm501fb_par *par;
1581         struct fb_info *fbi;
1582
1583         pd = (head == HEAD_CRT) ? info->pdata->fb_crt : info->pdata->fb_pnl;
1584
1585         /* Do not initialise if we've not been given any platform data */
1586         if (pd == NULL) {
1587                 dev_info(info->dev, "no data for fb %s (disabled)\n", name);
1588                 return 0;
1589         }
1590
1591         fbi = framebuffer_alloc(sizeof(struct sm501fb_par), info->dev);
1592         if (fbi == NULL) {
1593                 dev_err(info->dev, "cannot allocate %s framebuffer\n", name);
1594                 return -ENOMEM;
1595         }
1596
1597         par = fbi->par;
1598         par->info = info;
1599         par->head = head;
1600         fbi->pseudo_palette = &par->pseudo_palette;
1601
1602         info->fb[head] = fbi;
1603
1604         return 0;
1605 }
1606
1607 /* Free up anything allocated by sm501fb_init_fb */
1608
1609 static void sm501_free_init_fb(struct sm501fb_info *info,
1610                                 enum sm501_controller head)
1611 {
1612         struct fb_info *fbi = info->fb[head];
1613
1614         fb_dealloc_cmap(&fbi->cmap);
1615 }
1616
1617 static int __devinit sm501fb_start_one(struct sm501fb_info *info,
1618                                        enum sm501_controller head,
1619                                        const char *drvname)
1620 {
1621         struct fb_info *fbi = info->fb[head];
1622         int ret;
1623
1624         if (!fbi)
1625                 return 0;
1626
1627         mutex_init(&info->fb[head]->mm_lock);
1628
1629         ret = sm501fb_init_fb(info->fb[head], head, drvname);
1630         if (ret) {
1631                 dev_err(info->dev, "cannot initialise fb %s\n", drvname);
1632                 return ret;
1633         }
1634
1635         ret = register_framebuffer(info->fb[head]);
1636         if (ret) {
1637                 dev_err(info->dev, "failed to register fb %s\n", drvname);
1638                 sm501_free_init_fb(info, head);
1639                 return ret;
1640         }
1641
1642         dev_info(info->dev, "fb%d: %s frame buffer\n", fbi->node, fbi->fix.id);
1643
1644         return 0;
1645 }
1646
1647 static int __devinit sm501fb_probe(struct platform_device *pdev)
1648 {
1649         struct sm501fb_info *info;
1650         struct device *dev = &pdev->dev;
1651         int ret;
1652
1653         /* allocate our framebuffers */
1654
1655         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1656         if (!info) {
1657                 dev_err(dev, "failed to allocate state\n");
1658                 return -ENOMEM;
1659         }
1660
1661         info->dev = dev = &pdev->dev;
1662         platform_set_drvdata(pdev, info);
1663
1664         if (dev->parent->platform_data) {
1665                 struct sm501_platdata *pd = dev->parent->platform_data;
1666                 info->pdata = pd->fb;
1667         }
1668
1669         if (info->pdata == NULL) {
1670                 dev_info(dev, "using default configuration data\n");
1671                 info->pdata = &sm501fb_def_pdata;
1672         }
1673
1674         /* probe for the presence of each panel */
1675
1676         ret = sm501fb_probe_one(info, HEAD_CRT);
1677         if (ret < 0) {
1678                 dev_err(dev, "failed to probe CRT\n");
1679                 goto err_alloc;
1680         }
1681
1682         ret = sm501fb_probe_one(info, HEAD_PANEL);
1683         if (ret < 0) {
1684                 dev_err(dev, "failed to probe PANEL\n");
1685                 goto err_probed_crt;
1686         }
1687
1688         if (info->fb[HEAD_PANEL] == NULL &&
1689             info->fb[HEAD_CRT] == NULL) {
1690                 dev_err(dev, "no framebuffers found\n");
1691                 goto err_alloc;
1692         }
1693
1694         /* get the resources for both of the framebuffers */
1695
1696         ret = sm501fb_start(info, pdev);
1697         if (ret) {
1698                 dev_err(dev, "cannot initialise SM501\n");
1699                 goto err_probed_panel;
1700         }
1701
1702         ret = sm501fb_start_one(info, HEAD_CRT, driver_name_crt);
1703         if (ret) {
1704                 dev_err(dev, "failed to start CRT\n");
1705                 goto err_started;
1706         }
1707
1708         ret = sm501fb_start_one(info, HEAD_PANEL, driver_name_pnl);
1709         if (ret) {
1710                 dev_err(dev, "failed to start Panel\n");
1711                 goto err_started_crt;
1712         }
1713
1714         /* create device files */
1715
1716         ret = device_create_file(dev, &dev_attr_crt_src);
1717         if (ret)
1718                 goto err_started_panel;
1719
1720         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1721         if (ret)
1722                 goto err_attached_crtsrc_file;
1723
1724         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1725         if (ret)
1726                 goto err_attached_pnlregs_file;
1727
1728         /* we registered, return ok */
1729         return 0;
1730
1731 err_attached_pnlregs_file:
1732         device_remove_file(dev, &dev_attr_fbregs_pnl);
1733
1734 err_attached_crtsrc_file:
1735         device_remove_file(dev, &dev_attr_crt_src);
1736
1737 err_started_panel:
1738         unregister_framebuffer(info->fb[HEAD_PANEL]);
1739         sm501_free_init_fb(info, HEAD_PANEL);
1740
1741 err_started_crt:
1742         unregister_framebuffer(info->fb[HEAD_CRT]);
1743         sm501_free_init_fb(info, HEAD_CRT);
1744
1745 err_started:
1746         sm501fb_stop(info);
1747
1748 err_probed_panel:
1749         framebuffer_release(info->fb[HEAD_PANEL]);
1750
1751 err_probed_crt:
1752         framebuffer_release(info->fb[HEAD_CRT]);
1753
1754 err_alloc:
1755         kfree(info);
1756
1757         return ret;
1758 }
1759
1760
1761 /*
1762  *  Cleanup
1763  */
1764 static int sm501fb_remove(struct platform_device *pdev)
1765 {
1766         struct sm501fb_info *info = platform_get_drvdata(pdev);
1767         struct fb_info     *fbinfo_crt = info->fb[0];
1768         struct fb_info     *fbinfo_pnl = info->fb[1];
1769
1770         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1771         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1772         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1773
1774         sm501_free_init_fb(info, HEAD_CRT);
1775         sm501_free_init_fb(info, HEAD_PANEL);
1776
1777         unregister_framebuffer(fbinfo_crt);
1778         unregister_framebuffer(fbinfo_pnl);
1779
1780         sm501fb_stop(info);
1781         kfree(info);
1782
1783         framebuffer_release(fbinfo_pnl);
1784         framebuffer_release(fbinfo_crt);
1785
1786         return 0;
1787 }
1788
1789 #ifdef CONFIG_PM
1790
1791 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1792                               enum sm501_controller head)
1793 {
1794         struct fb_info *fbi = info->fb[head];
1795         struct sm501fb_par *par = fbi->par;
1796
1797         if (par->screen.size == 0)
1798                 return 0;
1799
1800         /* blank the relevant interface to ensure unit power minimised */
1801         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1802
1803         /* tell console/fb driver we are suspending */
1804
1805         acquire_console_sem();
1806         fb_set_suspend(fbi, 1);
1807         release_console_sem();
1808
1809         /* backup copies in case chip is powered down over suspend */
1810
1811         par->store_fb = vmalloc(par->screen.size);
1812         if (par->store_fb == NULL) {
1813                 dev_err(info->dev, "no memory to store screen\n");
1814                 return -ENOMEM;
1815         }
1816
1817         par->store_cursor = vmalloc(par->cursor.size);
1818         if (par->store_cursor == NULL) {
1819                 dev_err(info->dev, "no memory to store cursor\n");
1820                 goto err_nocursor;
1821         }
1822
1823         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1824         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1825
1826         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1827         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1828
1829         return 0;
1830
1831  err_nocursor:
1832         vfree(par->store_fb);
1833         par->store_fb = NULL;
1834
1835         return -ENOMEM;
1836 }
1837
1838 static void sm501fb_resume_fb(struct sm501fb_info *info,
1839                               enum sm501_controller head)
1840 {
1841         struct fb_info *fbi = info->fb[head];
1842         struct sm501fb_par *par = fbi->par;
1843
1844         if (par->screen.size == 0)
1845                 return;
1846
1847         /* re-activate the configuration */
1848
1849         (par->ops.fb_set_par)(fbi);
1850
1851         /* restore the data */
1852
1853         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1854         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1855
1856         if (par->store_fb)
1857                 memcpy_toio(par->screen.k_addr, par->store_fb,
1858                             par->screen.size);
1859
1860         if (par->store_cursor)
1861                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1862                             par->cursor.size);
1863
1864         acquire_console_sem();
1865         fb_set_suspend(fbi, 0);
1866         release_console_sem();
1867
1868         vfree(par->store_fb);
1869         vfree(par->store_cursor);
1870 }
1871
1872
1873 /* suspend and resume support */
1874
1875 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1876 {
1877         struct sm501fb_info *info = platform_get_drvdata(pdev);
1878
1879         /* store crt control to resume with */
1880         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1881
1882         sm501fb_suspend_fb(info, HEAD_CRT);
1883         sm501fb_suspend_fb(info, HEAD_PANEL);
1884
1885         /* turn off the clocks, in case the device is not powered down */
1886         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1887
1888         return 0;
1889 }
1890
1891 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1892                              SM501_DC_CRT_CONTROL_SEL)
1893
1894
1895 static int sm501fb_resume(struct platform_device *pdev)
1896 {
1897         struct sm501fb_info *info = platform_get_drvdata(pdev);
1898         unsigned long crt_ctrl;
1899
1900         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1901
1902         /* restore the items we want to be saved for crt control */
1903
1904         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1905         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1906         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1907         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1908
1909         sm501fb_resume_fb(info, HEAD_CRT);
1910         sm501fb_resume_fb(info, HEAD_PANEL);
1911
1912         return 0;
1913 }
1914
1915 #else
1916 #define sm501fb_suspend NULL
1917 #define sm501fb_resume  NULL
1918 #endif
1919
1920 static struct platform_driver sm501fb_driver = {
1921         .probe          = sm501fb_probe,
1922         .remove         = sm501fb_remove,
1923         .suspend        = sm501fb_suspend,
1924         .resume         = sm501fb_resume,
1925         .driver         = {
1926                 .name   = "sm501-fb",
1927                 .owner  = THIS_MODULE,
1928         },
1929 };
1930
1931 static int __devinit sm501fb_init(void)
1932 {
1933         return platform_driver_register(&sm501fb_driver);
1934 }
1935
1936 static void __exit sm501fb_cleanup(void)
1937 {
1938         platform_driver_unregister(&sm501fb_driver);
1939 }
1940
1941 module_init(sm501fb_init);
1942 module_exit(sm501fb_cleanup);
1943
1944 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1945 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1946 MODULE_LICENSE("GPL v2");