git.oblomov.eu Git - linux-2.6/blob - drivers/kvm/svm.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * AMD SVM support
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  *
   8  * Authors:
   9  *   Yaniv Kamay  <yaniv@qumranet.com>
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *
  12  * This work is licensed under the terms of the GNU GPL, version 2.  See
  13  * the COPYING file in the top-level directory.
  14  *
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/vmalloc.h>
  19 #include <linux/highmem.h>
  20 #include <asm/desc.h>
  21
  22 #include "kvm_svm.h"
  23 #include "x86_emulate.h"
  24
  25 MODULE_AUTHOR("Qumranet");
  26 MODULE_LICENSE("GPL");
  27
  28 #define IOPM_ALLOC_ORDER 2
  29 #define MSRPM_ALLOC_ORDER 1
  30
  31 #define DB_VECTOR 1
  32 #define UD_VECTOR 6
  33 #define GP_VECTOR 13
  34
  35 #define DR7_GD_MASK (1 << 13)
  36 #define DR6_BD_MASK (1 << 13)
  37 #define CR4_DE_MASK (1UL << 3)
  38
  39 #define SEG_TYPE_LDT 2
  40 #define SEG_TYPE_BUSY_TSS16 3
  41
  42 #define KVM_EFER_LMA (1 << 10)
  43 #define KVM_EFER_LME (1 << 8)
  44
  45 unsigned long iopm_base;
  46 unsigned long msrpm_base;
  47
  48 struct kvm_ldttss_desc {
  49         u16 limit0;
  50         u16 base0;
  51         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
  52         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
  53         u32 base3;
  54         u32 zero1;
  55 } __attribute__((packed));
  56
  57 struct svm_cpu_data {
  58         int cpu;
  59
  60         uint64_t asid_generation;
  61         uint32_t max_asid;
  62         uint32_t next_asid;
  63         struct kvm_ldttss_desc *tss_desc;
  64
  65         struct page *save_area;
  66 };
  67
  68 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
  69
  70 struct svm_init_data {
  71         int cpu;
  72         int r;
  73 };
  74
  75 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
  76
  77 #define NUM_MSR_MAPS (sizeof(msrpm_ranges) / sizeof(*msrpm_ranges))
  78 #define MSRS_RANGE_SIZE 2048
  79 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
  80
  81 #define MAX_INST_SIZE 15
  82
  83 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
  84 {
  85         struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
  86         u16 cs_attrib;
  87
  88         if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
  89                 return 2;
  90
  91         cs_attrib = sa->cs.attrib;
  92
  93         return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
  94                                 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
  95 }
  96
  97 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
  98 {
  99         int word_index = __ffs(vcpu->irq_summary);
 100         int bit_index = __ffs(vcpu->irq_pending[word_index]);
 101         int irq = word_index * BITS_PER_LONG + bit_index;
 102
 103         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
 104         if (!vcpu->irq_pending[word_index])
 105                 clear_bit(word_index, &vcpu->irq_summary);
 106         return irq;
 107 }
 108
 109 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
 110 {
 111         set_bit(irq, vcpu->irq_pending);
 112         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
 113 }
 114
 115 static inline void clgi(void)
 116 {
 117         asm volatile (SVM_CLGI);
 118 }
 119
 120 static inline void stgi(void)
 121 {
 122         asm volatile (SVM_STGI);
 123 }
 124
 125 static inline void invlpga(unsigned long addr, u32 asid)
 126 {
 127         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
 128 }
 129
 130 static inline unsigned long kvm_read_cr2(void)
 131 {
 132         unsigned long cr2;
 133
 134         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
 135         return cr2;
 136 }
 137
 138 static inline void kvm_write_cr2(unsigned long val)
 139 {
 140         asm volatile ("mov %0, %%cr2" :: "r" (val));
 141 }
 142
 143 static inline unsigned long read_dr6(void)
 144 {
 145         unsigned long dr6;
 146
 147         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
 148         return dr6;
 149 }
 150
 151 static inline void write_dr6(unsigned long val)
 152 {
 153         asm volatile ("mov %0, %%dr6" :: "r" (val));
 154 }
 155
 156 static inline unsigned long read_dr7(void)
 157 {
 158         unsigned long dr7;
 159
 160         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
 161         return dr7;
 162 }
 163
 164 static inline void write_dr7(unsigned long val)
 165 {
 166         asm volatile ("mov %0, %%dr7" :: "r" (val));
 167 }
 168
 169 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 170 {
 171         vcpu->svm->asid_generation--;
 172 }
 173
 174 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
 175 {
 176         force_new_asid(vcpu);
 177 }
 178
 179 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 180 {
 181         if (!(efer & KVM_EFER_LMA))
 182                 efer &= ~KVM_EFER_LME;
 183
 184         vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
 185         vcpu->shadow_efer = efer;
 186 }
 187
 188 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 189 {
 190         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 191                                                 SVM_EVTINJ_VALID_ERR |
 192                                                 SVM_EVTINJ_TYPE_EXEPT |
 193                                                 GP_VECTOR;
 194         vcpu->svm->vmcb->control.event_inj_err = error_code;
 195 }
 196
 197 static void inject_ud(struct kvm_vcpu *vcpu)
 198 {
 199         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 200                                                 SVM_EVTINJ_TYPE_EXEPT |
 201                                                 UD_VECTOR;
 202 }
 203
 204 static void inject_db(struct kvm_vcpu *vcpu)
 205 {
 206         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 207                                                 SVM_EVTINJ_TYPE_EXEPT |
 208                                                 DB_VECTOR;
 209 }
 210
 211 static int is_page_fault(uint32_t info)
 212 {
 213         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 214         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
 215 }
 216
 217 static int is_external_interrupt(u32 info)
 218 {
 219         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 220         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
 221 }
 222
 223 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 224 {
 225         if (!vcpu->svm->next_rip) {
 226                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
 227                 return;
 228         }
 229         if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
 230                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
 231                        __FUNCTION__,
 232                        vcpu->svm->vmcb->save.rip,
 233                        vcpu->svm->next_rip);
 234         }
 235
 236         vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
 237         vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 238
 239         vcpu->interrupt_window_open = 1;
 240 }
 241
 242 static int has_svm(void)
 243 {
 244         uint32_t eax, ebx, ecx, edx;
 245
 246         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
 247                 printk(KERN_INFO "has_svm: not amd\n");
 248                 return 0;
 249         }
 250
 251         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
 252         if (eax < SVM_CPUID_FUNC) {
 253                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
 254                 return 0;
 255         }
 256
 257         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
 258         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
 259                 printk(KERN_DEBUG "has_svm: svm not available\n");
 260                 return 0;
 261         }
 262         return 1;
 263 }
 264
 265 static void svm_hardware_disable(void *garbage)
 266 {
 267         struct svm_cpu_data *svm_data
 268                 = per_cpu(svm_data, raw_smp_processor_id());
 269
 270         if (svm_data) {
 271                 uint64_t efer;
 272
 273                 wrmsrl(MSR_VM_HSAVE_PA, 0);
 274                 rdmsrl(MSR_EFER, efer);
 275                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
 276                 per_cpu(svm_data, raw_smp_processor_id()) = 0;
 277                 __free_page(svm_data->save_area);
 278                 kfree(svm_data);
 279         }
 280 }
 281
 282 static void svm_hardware_enable(void *garbage)
 283 {
 284
 285         struct svm_cpu_data *svm_data;
 286         uint64_t efer;
 287 #ifdef CONFIG_X86_64
 288         struct desc_ptr gdt_descr;
 289 #else
 290         struct Xgt_desc_struct gdt_descr;
 291 #endif
 292         struct desc_struct *gdt;
 293         int me = raw_smp_processor_id();
 294
 295         if (!has_svm()) {
 296                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
 297                 return;
 298         }
 299         svm_data = per_cpu(svm_data, me);
 300
 301         if (!svm_data) {
 302                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
 303                        me);
 304                 return;
 305         }
 306
 307         svm_data->asid_generation = 1;
 308         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
 309         svm_data->next_asid = svm_data->max_asid + 1;
 310
 311         asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
 312         gdt = (struct desc_struct *)gdt_descr.address;
 313         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 314
 315         rdmsrl(MSR_EFER, efer);
 316         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
 317
 318         wrmsrl(MSR_VM_HSAVE_PA,
 319                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
 320 }
 321
 322 static int svm_cpu_init(int cpu)
 323 {
 324         struct svm_cpu_data *svm_data;
 325         int r;
 326
 327         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
 328         if (!svm_data)
 329                 return -ENOMEM;
 330         svm_data->cpu = cpu;
 331         svm_data->save_area = alloc_page(GFP_KERNEL);
 332         r = -ENOMEM;
 333         if (!svm_data->save_area)
 334                 goto err_1;
 335
 336         per_cpu(svm_data, cpu) = svm_data;
 337
 338         return 0;
 339
 340 err_1:
 341         kfree(svm_data);
 342         return r;
 343
 344 }
 345
 346 static int set_msr_interception(u32 *msrpm, unsigned msr,
 347                                 int read, int write)
 348 {
 349         int i;
 350
 351         for (i = 0; i < NUM_MSR_MAPS; i++) {
 352                 if (msr >= msrpm_ranges[i] &&
 353                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
 354                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
 355                                           msrpm_ranges[i]) * 2;
 356
 357                         u32 *base = msrpm + (msr_offset / 32);
 358                         u32 msr_shift = msr_offset % 32;
 359                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
 360                         *base = (*base & ~(0x3 << msr_shift)) |
 361                                 (mask << msr_shift);
 362                         return 1;
 363                 }
 364         }
 365         printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
 366         return 0;
 367 }
 368
 369 static __init int svm_hardware_setup(void)
 370 {
 371         int cpu;
 372         struct page *iopm_pages;
 373         struct page *msrpm_pages;
 374         void *msrpm_va;
 375         int r;
 376
 377         kvm_emulator_want_group7_invlpg();
 378
 379         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
 380
 381         if (!iopm_pages)
 382                 return -ENOMEM;
 383         memset(page_address(iopm_pages), 0xff,
 384                                         PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
 385         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
 386
 387
 388         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 389
 390         r = -ENOMEM;
 391         if (!msrpm_pages)
 392                 goto err_1;
 393
 394         msrpm_va = page_address(msrpm_pages);
 395         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
 396         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
 397
 398 #ifdef CONFIG_X86_64
 399         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
 400         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
 401         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
 402         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
 403         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
 404         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
 405 #endif
 406         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
 407         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
 408         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
 409         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
 410
 411         for_each_online_cpu(cpu) {
 412                 r = svm_cpu_init(cpu);
 413                 if (r)
 414                         goto err_2;
 415         }
 416         return 0;
 417
 418 err_2:
 419         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
 420         msrpm_base = 0;
 421 err_1:
 422         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
 423         iopm_base = 0;
 424         return r;
 425 }
 426
 427 static __exit void svm_hardware_unsetup(void)
 428 {
 429         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
 430         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
 431         iopm_base = msrpm_base = 0;
 432 }
 433
 434 static void init_seg(struct vmcb_seg *seg)
 435 {
 436         seg->selector = 0;
 437         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
 438                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
 439         seg->limit = 0xffff;
 440         seg->base = 0;
 441 }
 442
 443 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
 444 {
 445         seg->selector = 0;
 446         seg->attrib = SVM_SELECTOR_P_MASK | type;
 447         seg->limit = 0xffff;
 448         seg->base = 0;
 449 }
 450
 451 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
 452 {
 453         return 0;
 454 }
 455
 456 static void init_vmcb(struct vmcb *vmcb)
 457 {
 458         struct vmcb_control_area *control = &vmcb->control;
 459         struct vmcb_save_area *save = &vmcb->save;
 460         u64 tsc;
 461
 462         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
 463                                         INTERCEPT_CR3_MASK |
 464                                         INTERCEPT_CR4_MASK;
 465
 466         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
 467                                         INTERCEPT_CR3_MASK |
 468                                         INTERCEPT_CR4_MASK;
 469
 470         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
 471                                         INTERCEPT_DR1_MASK |
 472                                         INTERCEPT_DR2_MASK |
 473                                         INTERCEPT_DR3_MASK;
 474
 475         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
 476                                         INTERCEPT_DR1_MASK |
 477                                         INTERCEPT_DR2_MASK |
 478                                         INTERCEPT_DR3_MASK |
 479                                         INTERCEPT_DR5_MASK |
 480                                         INTERCEPT_DR7_MASK;
 481
 482         control->intercept_exceptions = 1 << PF_VECTOR;
 483
 484
 485         control->intercept =    (1ULL << INTERCEPT_INTR) |
 486                                 (1ULL << INTERCEPT_NMI) |
 487                 /*
 488                  * selective cr0 intercept bug?
 489                  *      0:   0f 22 d8                mov    %eax,%cr3
 490                  *      3:   0f 20 c0                mov    %cr0,%eax
 491                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
 492                  *      b:   0f 22 c0                mov    %eax,%cr0
 493                  * set cr3 ->interception
 494                  * get cr0 ->interception
 495                  * set cr0 -> no interception
 496                  */
 497                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
 498                                 (1ULL << INTERCEPT_CPUID) |
 499                                 (1ULL << INTERCEPT_HLT) |
 500                                 (1ULL << INTERCEPT_INVLPGA) |
 501                                 (1ULL << INTERCEPT_IOIO_PROT) |
 502                                 (1ULL << INTERCEPT_MSR_PROT) |
 503                                 (1ULL << INTERCEPT_TASK_SWITCH) |
 504                                 (1ULL << INTERCEPT_VMRUN) |
 505                                 (1ULL << INTERCEPT_VMMCALL) |
 506                                 (1ULL << INTERCEPT_VMLOAD) |
 507                                 (1ULL << INTERCEPT_VMSAVE) |
 508                                 (1ULL << INTERCEPT_STGI) |
 509                                 (1ULL << INTERCEPT_CLGI) |
 510                                 (1ULL << INTERCEPT_SKINIT);
 511
 512         control->iopm_base_pa = iopm_base;
 513         control->msrpm_base_pa = msrpm_base;
 514         rdtscll(tsc);
 515         control->tsc_offset = -tsc;
 516         control->int_ctl = V_INTR_MASKING_MASK;
 517
 518         init_seg(&save->es);
 519         init_seg(&save->ss);
 520         init_seg(&save->ds);
 521         init_seg(&save->fs);
 522         init_seg(&save->gs);
 523
 524         save->cs.selector = 0xf000;
 525         /* Executable/Readable Code Segment */
 526         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
 527                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
 528         save->cs.limit = 0xffff;
 529         save->cs.base = 0xffff0000;
 530
 531         save->gdtr.limit = 0xffff;
 532         save->idtr.limit = 0xffff;
 533
 534         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
 535         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 536
 537         save->efer = MSR_EFER_SVME_MASK;
 538
 539         save->dr6 = 0xffff0ff0;
 540         save->dr7 = 0x400;
 541         save->rflags = 2;
 542         save->rip = 0x0000fff0;
 543
 544         /*
 545          * cr0 val on cpu init should be 0x60000010, we enable cpu
 546          * cache by default. the orderly way is to enable cache in bios.
 547          */
 548         save->cr0 = 0x00000010 | CR0_PG_MASK;
 549         save->cr4 = CR4_PAE_MASK;
 550         /* rdx = ?? */
 551 }
 552
 553 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
 554 {
 555         struct page *page;
 556         int r;
 557
 558         r = -ENOMEM;
 559         vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
 560         if (!vcpu->svm)
 561                 goto out1;
 562         page = alloc_page(GFP_KERNEL);
 563         if (!page)
 564                 goto out2;
 565
 566         vcpu->svm->vmcb = page_address(page);
 567         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
 568         vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
 569         vcpu->svm->cr0 = 0x00000010;
 570         vcpu->svm->asid_generation = 0;
 571         memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
 572         init_vmcb(vcpu->svm->vmcb);
 573
 574         fx_init(vcpu);
 575
 576         return 0;
 577
 578 out2:
 579         kfree(vcpu->svm);
 580 out1:
 581         return r;
 582 }
 583
 584 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 585 {
 586         if (!vcpu->svm)
 587                 return;
 588         if (vcpu->svm->vmcb)
 589                 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
 590         kfree(vcpu->svm);
 591 }
 592
 593 static struct kvm_vcpu *svm_vcpu_load(struct kvm_vcpu *vcpu)
 594 {
 595         get_cpu();
 596         return vcpu;
 597 }
 598
 599 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 600 {
 601         put_cpu();
 602 }
 603
 604 static void svm_cache_regs(struct kvm_vcpu *vcpu)
 605 {
 606         vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
 607         vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
 608         vcpu->rip = vcpu->svm->vmcb->save.rip;
 609 }
 610
 611 static void svm_decache_regs(struct kvm_vcpu *vcpu)
 612 {
 613         vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
 614         vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
 615         vcpu->svm->vmcb->save.rip = vcpu->rip;
 616 }
 617
 618 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
 619 {
 620         return vcpu->svm->vmcb->save.rflags;
 621 }
 622
 623 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 624 {
 625         vcpu->svm->vmcb->save.rflags = rflags;
 626 }
 627
 628 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 629 {
 630         struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
 631
 632         switch (seg) {
 633         case VCPU_SREG_CS: return &save->cs;
 634         case VCPU_SREG_DS: return &save->ds;
 635         case VCPU_SREG_ES: return &save->es;
 636         case VCPU_SREG_FS: return &save->fs;
 637         case VCPU_SREG_GS: return &save->gs;
 638         case VCPU_SREG_SS: return &save->ss;
 639         case VCPU_SREG_TR: return &save->tr;
 640         case VCPU_SREG_LDTR: return &save->ldtr;
 641         }
 642         BUG();
 643         return 0;
 644 }
 645
 646 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 647 {
 648         struct vmcb_seg *s = svm_seg(vcpu, seg);
 649
 650         return s->base;
 651 }
 652
 653 static void svm_get_segment(struct kvm_vcpu *vcpu,
 654                             struct kvm_segment *var, int seg)
 655 {
 656         struct vmcb_seg *s = svm_seg(vcpu, seg);
 657
 658         var->base = s->base;
 659         var->limit = s->limit;
 660         var->selector = s->selector;
 661         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
 662         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
 663         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
 664         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
 665         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
 666         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 667         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 668         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 669         var->unusable = !var->present;
 670 }
 671
 672 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 673 {
 674         struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
 675
 676         *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 677         *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 678 }
 679
 680 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 681 {
 682         dt->limit = vcpu->svm->vmcb->save.ldtr.limit;
 683         dt->base = vcpu->svm->vmcb->save.ldtr.base;
 684 }
 685
 686 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 687 {
 688         vcpu->svm->vmcb->save.ldtr.limit = dt->limit;
 689         vcpu->svm->vmcb->save.ldtr.base = dt->base ;
 690 }
 691
 692 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 693 {
 694         dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
 695         dt->base = vcpu->svm->vmcb->save.gdtr.base;
 696 }
 697
 698 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 699 {
 700         vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
 701         vcpu->svm->vmcb->save.gdtr.base = dt->base ;
 702 }
 703
 704 static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
 705 {
 706 }
 707
 708 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 709 {
 710 #ifdef CONFIG_X86_64
 711         if (vcpu->shadow_efer & KVM_EFER_LME) {
 712                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
 713                         vcpu->shadow_efer |= KVM_EFER_LMA;
 714                         vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
 715                 }
 716
 717                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
 718                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
 719                         vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
 720                 }
 721         }
 722 #endif
 723         vcpu->svm->cr0 = cr0;
 724         vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK;
 725         vcpu->cr0 = cr0;
 726 }
 727
 728 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 729 {
 730        vcpu->cr4 = cr4;
 731        vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
 732 }
 733
 734 static void svm_set_segment(struct kvm_vcpu *vcpu,
 735                             struct kvm_segment *var, int seg)
 736 {
 737         struct vmcb_seg *s = svm_seg(vcpu, seg);
 738
 739         s->base = var->base;
 740         s->limit = var->limit;
 741         s->selector = var->selector;
 742         if (var->unusable)
 743                 s->attrib = 0;
 744         else {
 745                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
 746                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
 747                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
 748                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
 749                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
 750                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
 751                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
 752                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
 753         }
 754         if (seg == VCPU_SREG_CS)
 755                 vcpu->svm->vmcb->save.cpl
 756                         = (vcpu->svm->vmcb->save.cs.attrib
 757                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
 758
 759 }
 760
 761 /* FIXME:
 762
 763         vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
 764         vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
 765
 766 */
 767
 768 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 769 {
 770         return -EOPNOTSUPP;
 771 }
 772
 773 static void load_host_msrs(struct kvm_vcpu *vcpu)
 774 {
 775         int i;
 776
 777         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 778                 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 779 }
 780
 781 static void save_host_msrs(struct kvm_vcpu *vcpu)
 782 {
 783         int i;
 784
 785         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 786                 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 787 }
 788
 789 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
 790 {
 791         if (svm_data->next_asid > svm_data->max_asid) {
 792                 ++svm_data->asid_generation;
 793                 svm_data->next_asid = 1;
 794                 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
 795         }
 796
 797         vcpu->cpu = svm_data->cpu;
 798         vcpu->svm->asid_generation = svm_data->asid_generation;
 799         vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
 800 }
 801
 802 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
 803 {
 804         invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
 805 }
 806
 807 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 808 {
 809         return vcpu->svm->db_regs[dr];
 810 }
 811
 812 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 813                        int *exception)
 814 {
 815         *exception = 0;
 816
 817         if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
 818                 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
 819                 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
 820                 *exception = DB_VECTOR;
 821                 return;
 822         }
 823
 824         switch (dr) {
 825         case 0 ... 3:
 826                 vcpu->svm->db_regs[dr] = value;
 827                 return;
 828         case 4 ... 5:
 829                 if (vcpu->cr4 & CR4_DE_MASK) {
 830                         *exception = UD_VECTOR;
 831                         return;
 832                 }
 833         case 7: {
 834                 if (value & ~((1ULL << 32) - 1)) {
 835                         *exception = GP_VECTOR;
 836                         return;
 837                 }
 838                 vcpu->svm->vmcb->save.dr7 = value;
 839                 return;
 840         }
 841         default:
 842                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
 843                        __FUNCTION__, dr);
 844                 *exception = UD_VECTOR;
 845                 return;
 846         }
 847 }
 848
 849 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 850 {
 851         u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
 852         u64 fault_address;
 853         u32 error_code;
 854         enum emulation_result er;
 855
 856         if (is_external_interrupt(exit_int_info))
 857                 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
 858
 859         spin_lock(&vcpu->kvm->lock);
 860
 861         fault_address  = vcpu->svm->vmcb->control.exit_info_2;
 862         error_code = vcpu->svm->vmcb->control.exit_info_1;
 863         if (!kvm_mmu_page_fault(vcpu, fault_address, error_code)) {
 864                 spin_unlock(&vcpu->kvm->lock);
 865                 return 1;
 866         }
 867         er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
 868         spin_unlock(&vcpu->kvm->lock);
 869
 870         switch (er) {
 871         case EMULATE_DONE:
 872                 return 1;
 873         case EMULATE_DO_MMIO:
 874                 ++kvm_stat.mmio_exits;
 875                 kvm_run->exit_reason = KVM_EXIT_MMIO;
 876                 return 0;
 877         case EMULATE_FAIL:
 878                 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
 879                 break;
 880         default:
 881                 BUG();
 882         }
 883
 884         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
 885         return 0;
 886 }
 887
 888 static int io_get_override(struct kvm_vcpu *vcpu,
 889                           struct vmcb_seg **seg,
 890                           int *addr_override)
 891 {
 892         u8 inst[MAX_INST_SIZE];
 893         unsigned ins_length;
 894         gva_t rip;
 895         int i;
 896
 897         rip =  vcpu->svm->vmcb->save.rip;
 898         ins_length = vcpu->svm->next_rip - rip;
 899         rip += vcpu->svm->vmcb->save.cs.base;
 900
 901         if (ins_length > MAX_INST_SIZE)
 902                 printk(KERN_DEBUG
 903                        "%s: inst length err, cs base 0x%llx rip 0x%llx "
 904                        "next rip 0x%llx ins_length %u\n",
 905                        __FUNCTION__,
 906                        vcpu->svm->vmcb->save.cs.base,
 907                        vcpu->svm->vmcb->save.rip,
 908                        vcpu->svm->vmcb->control.exit_info_2,
 909                        ins_length);
 910
 911         if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
 912                 /* #PF */
 913                 return 0;
 914
 915         *addr_override = 0;
 916         *seg = 0;
 917         for (i = 0; i < ins_length; i++)
 918                 switch (inst[i]) {
 919                 case 0xf0:
 920                 case 0xf2:
 921                 case 0xf3:
 922                 case 0x66:
 923                         continue;
 924                 case 0x67:
 925                         *addr_override = 1;
 926                         continue;
 927                 case 0x2e:
 928                         *seg = &vcpu->svm->vmcb->save.cs;
 929                         continue;
 930                 case 0x36:
 931                         *seg = &vcpu->svm->vmcb->save.ss;
 932                         continue;
 933                 case 0x3e:
 934                         *seg = &vcpu->svm->vmcb->save.ds;
 935                         continue;
 936                 case 0x26:
 937                         *seg = &vcpu->svm->vmcb->save.es;
 938                         continue;
 939                 case 0x64:
 940                         *seg = &vcpu->svm->vmcb->save.fs;
 941                         continue;
 942                 case 0x65:
 943                         *seg = &vcpu->svm->vmcb->save.gs;
 944                         continue;
 945                 default:
 946                         return 1;
 947                 }
 948         printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
 949         return 0;
 950 }
 951
 952 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, u64 *address)
 953 {
 954         unsigned long addr_mask;
 955         unsigned long *reg;
 956         struct vmcb_seg *seg;
 957         int addr_override;
 958         struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
 959         u16 cs_attrib = save_area->cs.attrib;
 960         unsigned addr_size = get_addr_size(vcpu);
 961
 962         if (!io_get_override(vcpu, &seg, &addr_override))
 963                 return 0;
 964
 965         if (addr_override)
 966                 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
 967
 968         if (ins) {
 969                 reg = &vcpu->regs[VCPU_REGS_RDI];
 970                 seg = &vcpu->svm->vmcb->save.es;
 971         } else {
 972                 reg = &vcpu->regs[VCPU_REGS_RSI];
 973                 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
 974         }
 975
 976         addr_mask = ~0ULL >> (64 - (addr_size * 8));
 977
 978         if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
 979             !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
 980                 *address = (*reg & addr_mask);
 981                 return addr_mask;
 982         }
 983
 984         if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
 985                 svm_inject_gp(vcpu, 0);
 986                 return 0;
 987         }
 988
 989         *address = (*reg & addr_mask) + seg->base;
 990         return addr_mask;
 991 }
 992
 993 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 994 {
 995         u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
 996         int _in = io_info & SVM_IOIO_TYPE_MASK;
 997
 998         ++kvm_stat.io_exits;
 999
1000         vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1001
1002         kvm_run->exit_reason = KVM_EXIT_IO;
1003         kvm_run->io.port = io_info >> 16;
1004         kvm_run->io.direction = (_in) ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1005         kvm_run->io.size = ((io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT);
1006         kvm_run->io.string = (io_info & SVM_IOIO_STR_MASK) != 0;
1007         kvm_run->io.rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1008
1009         if (kvm_run->io.string) {
1010                 unsigned addr_mask;
1011
1012                 addr_mask = io_adress(vcpu, _in, &kvm_run->io.address);
1013                 if (!addr_mask) {
1014                         printk(KERN_DEBUG "%s: get io address failed\n", __FUNCTION__);
1015                         return 1;
1016                 }
1017
1018                 if (kvm_run->io.rep) {
1019                         kvm_run->io.count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1020                         kvm_run->io.string_down = (vcpu->svm->vmcb->save.rflags
1021                                                    & X86_EFLAGS_DF) != 0;
1022                 }
1023         } else {
1024                 kvm_run->io.value = vcpu->svm->vmcb->save.rax;
1025         }
1026         return 0;
1027 }
1028
1029
1030 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1031 {
1032         return 1;
1033 }
1034
1035 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1036 {
1037         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1038         skip_emulated_instruction(vcpu);
1039         if (vcpu->irq_summary)
1040                 return 1;
1041
1042         kvm_run->exit_reason = KVM_EXIT_HLT;
1043         ++kvm_stat.halt_exits;
1044         return 0;
1045 }
1046
1047 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1048 {
1049         inject_ud(vcpu);
1050         return 1;
1051 }
1052
1053 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1054 {
1055         printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1056         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1057         return 0;
1058 }
1059
1060 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1061 {
1062         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1063         kvm_run->exit_reason = KVM_EXIT_CPUID;
1064         return 0;
1065 }
1066
1067 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1068 {
1069         if (emulate_instruction(vcpu, 0, 0, 0) != EMULATE_DONE)
1070                 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1071         return 1;
1072 }
1073
1074 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1075 {
1076         switch (ecx) {
1077         case MSR_IA32_TIME_STAMP_COUNTER: {
1078                 u64 tsc;
1079
1080                 rdtscll(tsc);
1081                 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1082                 break;
1083         }
1084         case MSR_K6_STAR:
1085                 *data = vcpu->svm->vmcb->save.star;
1086                 break;
1087 #ifdef CONFIG_X86_64
1088         case MSR_LSTAR:
1089                 *data = vcpu->svm->vmcb->save.lstar;
1090                 break;
1091         case MSR_CSTAR:
1092                 *data = vcpu->svm->vmcb->save.cstar;
1093                 break;
1094         case MSR_KERNEL_GS_BASE:
1095                 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1096                 break;
1097         case MSR_SYSCALL_MASK:
1098                 *data = vcpu->svm->vmcb->save.sfmask;
1099                 break;
1100 #endif
1101         case MSR_IA32_SYSENTER_CS:
1102                 *data = vcpu->svm->vmcb->save.sysenter_cs;
1103                 break;
1104         case MSR_IA32_SYSENTER_EIP:
1105                 *data = vcpu->svm->vmcb->save.sysenter_eip;
1106                 break;
1107         case MSR_IA32_SYSENTER_ESP:
1108                 *data = vcpu->svm->vmcb->save.sysenter_esp;
1109                 break;
1110         default:
1111                 return kvm_get_msr_common(vcpu, ecx, data);
1112         }
1113         return 0;
1114 }
1115
1116 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1117 {
1118         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1119         u64 data;
1120
1121         if (svm_get_msr(vcpu, ecx, &data))
1122                 svm_inject_gp(vcpu, 0);
1123         else {
1124                 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1125                 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1126                 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1127                 skip_emulated_instruction(vcpu);
1128         }
1129         return 1;
1130 }
1131
1132 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1133 {
1134         switch (ecx) {
1135         case MSR_IA32_TIME_STAMP_COUNTER: {
1136                 u64 tsc;
1137
1138                 rdtscll(tsc);
1139                 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1140                 break;
1141         }
1142         case MSR_K6_STAR:
1143                 vcpu->svm->vmcb->save.star = data;
1144                 break;
1145 #ifdef CONFIG_X86_64_
1146         case MSR_LSTAR:
1147                 vcpu->svm->vmcb->save.lstar = data;
1148                 break;
1149         case MSR_CSTAR:
1150                 vcpu->svm->vmcb->save.cstar = data;
1151                 break;
1152         case MSR_KERNEL_GS_BASE:
1153                 vcpu->svm->vmcb->save.kernel_gs_base = data;
1154                 break;
1155         case MSR_SYSCALL_MASK:
1156                 vcpu->svm->vmcb->save.sfmask = data;
1157                 break;
1158 #endif
1159         case MSR_IA32_SYSENTER_CS:
1160                 vcpu->svm->vmcb->save.sysenter_cs = data;
1161                 break;
1162         case MSR_IA32_SYSENTER_EIP:
1163                 vcpu->svm->vmcb->save.sysenter_eip = data;
1164                 break;
1165         case MSR_IA32_SYSENTER_ESP:
1166                 vcpu->svm->vmcb->save.sysenter_esp = data;
1167                 break;
1168         default:
1169                 return kvm_set_msr_common(vcpu, ecx, data);
1170         }
1171         return 0;
1172 }
1173
1174 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1175 {
1176         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1177         u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1178                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1179         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1180         if (svm_set_msr(vcpu, ecx, data))
1181                 svm_inject_gp(vcpu, 0);
1182         else
1183                 skip_emulated_instruction(vcpu);
1184         return 1;
1185 }
1186
1187 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1188 {
1189         if (vcpu->svm->vmcb->control.exit_info_1)
1190                 return wrmsr_interception(vcpu, kvm_run);
1191         else
1192                 return rdmsr_interception(vcpu, kvm_run);
1193 }
1194
1195 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1196                                    struct kvm_run *kvm_run)
1197 {
1198         /*
1199          * If the user space waits to inject interrupts, exit as soon as
1200          * possible
1201          */
1202         if (kvm_run->request_interrupt_window &&
1203             !vcpu->irq_summary &&
1204             (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF)) {
1205                 ++kvm_stat.irq_window_exits;
1206                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1207                 return 0;
1208         }
1209
1210         return 1;
1211 }
1212
1213 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1214                                       struct kvm_run *kvm_run) = {
1215         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1216         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1217         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1218         /* for now: */
1219         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1220         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1221         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1222         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1223         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1224         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1225         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1226         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1227         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1228         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1229         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1230         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1231         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1232         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1233         [SVM_EXIT_INTR]                         = nop_on_interception,
1234         [SVM_EXIT_NMI]                          = nop_on_interception,
1235         [SVM_EXIT_SMI]                          = nop_on_interception,
1236         [SVM_EXIT_INIT]                         = nop_on_interception,
1237         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
1238         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1239         [SVM_EXIT_CPUID]                        = cpuid_interception,
1240         [SVM_EXIT_HLT]                          = halt_interception,
1241         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1242         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1243         [SVM_EXIT_IOIO]                         = io_interception,
1244         [SVM_EXIT_MSR]                          = msr_interception,
1245         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1246         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1247         [SVM_EXIT_VMMCALL]                      = invalid_op_interception,
1248         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1249         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1250         [SVM_EXIT_STGI]                         = invalid_op_interception,
1251         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1252         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1253 };
1254
1255
1256 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1257 {
1258         u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1259
1260         kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1261
1262         if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1263             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1264                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1265                        "exit_code 0x%x\n",
1266                        __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1267                        exit_code);
1268
1269         if (exit_code >= sizeof(svm_exit_handlers) / sizeof(*svm_exit_handlers)
1270             || svm_exit_handlers[exit_code] == 0) {
1271                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1272                 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1273                        __FUNCTION__,
1274                        exit_code,
1275                        vcpu->svm->vmcb->save.rip,
1276                        vcpu->cr0,
1277                        vcpu->svm->vmcb->save.rflags);
1278                 return 0;
1279         }
1280
1281         return svm_exit_handlers[exit_code](vcpu, kvm_run);
1282 }
1283
1284 static void reload_tss(struct kvm_vcpu *vcpu)
1285 {
1286         int cpu = raw_smp_processor_id();
1287
1288         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1289         svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1290         load_TR_desc();
1291 }
1292
1293 static void pre_svm_run(struct kvm_vcpu *vcpu)
1294 {
1295         int cpu = raw_smp_processor_id();
1296
1297         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1298
1299         vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1300         if (vcpu->cpu != cpu ||
1301             vcpu->svm->asid_generation != svm_data->asid_generation)
1302                 new_asid(vcpu, svm_data);
1303 }
1304
1305
1306 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1307 {
1308         struct vmcb_control_area *control;
1309
1310         control = &vcpu->svm->vmcb->control;
1311         control->int_vector = pop_irq(vcpu);
1312         control->int_ctl &= ~V_INTR_PRIO_MASK;
1313         control->int_ctl |= V_IRQ_MASK |
1314                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1315 }
1316
1317 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1318 {
1319         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1320
1321         if (control->int_ctl & V_IRQ_MASK) {
1322                 control->int_ctl &= ~V_IRQ_MASK;
1323                 push_irq(vcpu, control->int_vector);
1324         }
1325
1326         vcpu->interrupt_window_open =
1327                 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1328 }
1329
1330 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1331                                        struct kvm_run *kvm_run)
1332 {
1333         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1334
1335         vcpu->interrupt_window_open =
1336                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1337                  (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1338
1339         if (vcpu->interrupt_window_open && vcpu->irq_summary)
1340                 /*
1341                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1342                  */
1343                 kvm_do_inject_irq(vcpu);
1344
1345         /*
1346          * Interrupts blocked.  Wait for unblock.
1347          */
1348         if (!vcpu->interrupt_window_open &&
1349             (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1350                 control->intercept |= 1ULL << INTERCEPT_VINTR;
1351         } else
1352                 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1353 }
1354
1355 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1356                               struct kvm_run *kvm_run)
1357 {
1358         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1359                                                   vcpu->irq_summary == 0);
1360         kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1361         kvm_run->cr8 = vcpu->cr8;
1362         kvm_run->apic_base = vcpu->apic_base;
1363 }
1364
1365 /*
1366  * Check if userspace requested an interrupt window, and that the
1367  * interrupt window is open.
1368  *
1369  * No need to exit to userspace if we already have an interrupt queued.
1370  */
1371 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1372                                           struct kvm_run *kvm_run)
1373 {
1374         return (!vcpu->irq_summary &&
1375                 kvm_run->request_interrupt_window &&
1376                 vcpu->interrupt_window_open &&
1377                 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1378 }
1379
1380 static void save_db_regs(unsigned long *db_regs)
1381 {
1382         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1383         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1384         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1385         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1386 }
1387
1388 static void load_db_regs(unsigned long *db_regs)
1389 {
1390         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1391         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1392         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1393         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1394 }
1395
1396 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1397 {
1398         u16 fs_selector;
1399         u16 gs_selector;
1400         u16 ldt_selector;
1401
1402 again:
1403         do_interrupt_requests(vcpu, kvm_run);
1404
1405         clgi();
1406
1407         pre_svm_run(vcpu);
1408
1409         save_host_msrs(vcpu);
1410         fs_selector = read_fs();
1411         gs_selector = read_gs();
1412         ldt_selector = read_ldt();
1413         vcpu->svm->host_cr2 = kvm_read_cr2();
1414         vcpu->svm->host_dr6 = read_dr6();
1415         vcpu->svm->host_dr7 = read_dr7();
1416         vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1417
1418         if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1419                 write_dr7(0);
1420                 save_db_regs(vcpu->svm->host_db_regs);
1421                 load_db_regs(vcpu->svm->db_regs);
1422         }
1423
1424         fx_save(vcpu->host_fx_image);
1425         fx_restore(vcpu->guest_fx_image);
1426
1427         asm volatile (
1428 #ifdef CONFIG_X86_64
1429                 "push %%rbx; push %%rcx; push %%rdx;"
1430                 "push %%rsi; push %%rdi; push %%rbp;"
1431                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1432                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1433 #else
1434                 "push %%ebx; push %%ecx; push %%edx;"
1435                 "push %%esi; push %%edi; push %%ebp;"
1436 #endif
1437
1438 #ifdef CONFIG_X86_64
1439                 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1440                 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1441                 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1442                 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1443                 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1444                 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1445                 "mov %c[r8](%[vcpu]),  %%r8  \n\t"
1446                 "mov %c[r9](%[vcpu]),  %%r9  \n\t"
1447                 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1448                 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1449                 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1450                 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1451                 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1452                 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1453 #else
1454                 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1455                 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1456                 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1457                 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1458                 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1459                 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1460 #endif
1461
1462 #ifdef CONFIG_X86_64
1463                 /* Enter guest mode */
1464                 "push %%rax \n\t"
1465                 "mov %c[svm](%[vcpu]), %%rax \n\t"
1466                 "mov %c[vmcb](%%rax), %%rax \n\t"
1467                 SVM_VMLOAD "\n\t"
1468                 SVM_VMRUN "\n\t"
1469                 SVM_VMSAVE "\n\t"
1470                 "pop %%rax \n\t"
1471 #else
1472                 /* Enter guest mode */
1473                 "push %%eax \n\t"
1474                 "mov %c[svm](%[vcpu]), %%eax \n\t"
1475                 "mov %c[vmcb](%%eax), %%eax \n\t"
1476                 SVM_VMLOAD "\n\t"
1477                 SVM_VMRUN "\n\t"
1478                 SVM_VMSAVE "\n\t"
1479                 "pop %%eax \n\t"
1480 #endif
1481
1482                 /* Save guest registers, load host registers */
1483 #ifdef CONFIG_X86_64
1484                 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1485                 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1486                 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1487                 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1488                 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1489                 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1490                 "mov %%r8,  %c[r8](%[vcpu]) \n\t"
1491                 "mov %%r9,  %c[r9](%[vcpu]) \n\t"
1492                 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1493                 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1494                 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1495                 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1496                 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1497                 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1498
1499                 "pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1500                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1501                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1502                 "pop  %%rdx; pop  %%rcx; pop  %%rbx; \n\t"
1503 #else
1504                 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1505                 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1506                 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1507                 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1508                 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1509                 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1510
1511                 "pop  %%ebp; pop  %%edi; pop  %%esi;"
1512                 "pop  %%edx; pop  %%ecx; pop  %%ebx; \n\t"
1513 #endif
1514                 :
1515                 : [vcpu]"a"(vcpu),
1516                   [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1517                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1518                   [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1519                   [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1520                   [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1521                   [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1522                   [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1523                   [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1524 #ifdef CONFIG_X86_64
1525                   ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1526                   [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1527                   [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1528                   [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1529                   [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1530                   [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1531                   [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1532                   [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1533 #endif
1534                 : "cc", "memory" );
1535
1536         fx_save(vcpu->guest_fx_image);
1537         fx_restore(vcpu->host_fx_image);
1538
1539         if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1540                 load_db_regs(vcpu->svm->host_db_regs);
1541
1542         vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1543
1544         write_dr6(vcpu->svm->host_dr6);
1545         write_dr7(vcpu->svm->host_dr7);
1546         kvm_write_cr2(vcpu->svm->host_cr2);
1547
1548         load_fs(fs_selector);
1549         load_gs(gs_selector);
1550         load_ldt(ldt_selector);
1551         load_host_msrs(vcpu);
1552
1553         reload_tss(vcpu);
1554
1555         stgi();
1556
1557         kvm_reput_irq(vcpu);
1558
1559         vcpu->svm->next_rip = 0;
1560
1561         if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1562                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1563                 kvm_run->exit_reason = vcpu->svm->vmcb->control.exit_code;
1564                 post_kvm_run_save(vcpu, kvm_run);
1565                 return 0;
1566         }
1567
1568         if (handle_exit(vcpu, kvm_run)) {
1569                 if (signal_pending(current)) {
1570                         ++kvm_stat.signal_exits;
1571                         post_kvm_run_save(vcpu, kvm_run);
1572                         return -EINTR;
1573                 }
1574
1575                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1576                         ++kvm_stat.request_irq_exits;
1577                         post_kvm_run_save(vcpu, kvm_run);
1578                         return -EINTR;
1579                 }
1580                 kvm_resched(vcpu);
1581                 goto again;
1582         }
1583         post_kvm_run_save(vcpu, kvm_run);
1584         return 0;
1585 }
1586
1587 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1588 {
1589         force_new_asid(vcpu);
1590 }
1591
1592 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1593 {
1594         vcpu->svm->vmcb->save.cr3 = root;
1595         force_new_asid(vcpu);
1596 }
1597
1598 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1599                                   unsigned long  addr,
1600                                   uint32_t err_code)
1601 {
1602         uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1603
1604         ++kvm_stat.pf_guest;
1605
1606         if (is_page_fault(exit_int_info)) {
1607
1608                 vcpu->svm->vmcb->control.event_inj_err = 0;
1609                 vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1610                                                         SVM_EVTINJ_VALID_ERR |
1611                                                         SVM_EVTINJ_TYPE_EXEPT |
1612                                                         DF_VECTOR;
1613                 return;
1614         }
1615         vcpu->cr2 = addr;
1616         vcpu->svm->vmcb->save.cr2 = addr;
1617         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1618                                                 SVM_EVTINJ_VALID_ERR |
1619                                                 SVM_EVTINJ_TYPE_EXEPT |
1620                                                 PF_VECTOR;
1621         vcpu->svm->vmcb->control.event_inj_err = err_code;
1622 }
1623
1624
1625 static int is_disabled(void)
1626 {
1627         return 0;
1628 }
1629
1630 static struct kvm_arch_ops svm_arch_ops = {
1631         .cpu_has_kvm_support = has_svm,
1632         .disabled_by_bios = is_disabled,
1633         .hardware_setup = svm_hardware_setup,
1634         .hardware_unsetup = svm_hardware_unsetup,
1635         .hardware_enable = svm_hardware_enable,
1636         .hardware_disable = svm_hardware_disable,
1637
1638         .vcpu_create = svm_create_vcpu,
1639         .vcpu_free = svm_free_vcpu,
1640
1641         .vcpu_load = svm_vcpu_load,
1642         .vcpu_put = svm_vcpu_put,
1643
1644         .set_guest_debug = svm_guest_debug,
1645         .get_msr = svm_get_msr,
1646         .set_msr = svm_set_msr,
1647         .get_segment_base = svm_get_segment_base,
1648         .get_segment = svm_get_segment,
1649         .set_segment = svm_set_segment,
1650         .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1651         .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
1652         .set_cr0 = svm_set_cr0,
1653         .set_cr0_no_modeswitch = svm_set_cr0,
1654         .set_cr3 = svm_set_cr3,
1655         .set_cr4 = svm_set_cr4,
1656         .set_efer = svm_set_efer,
1657         .get_idt = svm_get_idt,
1658         .set_idt = svm_set_idt,
1659         .get_gdt = svm_get_gdt,
1660         .set_gdt = svm_set_gdt,
1661         .get_dr = svm_get_dr,
1662         .set_dr = svm_set_dr,
1663         .cache_regs = svm_cache_regs,
1664         .decache_regs = svm_decache_regs,
1665         .get_rflags = svm_get_rflags,
1666         .set_rflags = svm_set_rflags,
1667
1668         .invlpg = svm_invlpg,
1669         .tlb_flush = svm_flush_tlb,
1670         .inject_page_fault = svm_inject_page_fault,
1671
1672         .inject_gp = svm_inject_gp,
1673
1674         .run = svm_vcpu_run,
1675         .skip_emulated_instruction = skip_emulated_instruction,
1676         .vcpu_setup = svm_vcpu_setup,
1677 };
1678
1679 static int __init svm_init(void)
1680 {
1681         return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1682 }
1683
1684 static void __exit svm_exit(void)
1685 {
1686         kvm_exit_arch();
1687 }
1688
1689 module_init(svm_init)
1690 module_exit(svm_exit)