git.oblomov.eu Git - linux-2.6/blob - drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #include        "firmware.h"
  42 #include <linux/bitrev.h>
  43
  44 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  45 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  46                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  47                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  48                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  49                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  50                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  51                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  52                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  53
  54 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  55
  56 const unsigned short ccitt_16Table[] = {
  57         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  58         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  59         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  60         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  61         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  62         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  63         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  64         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  65         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  66         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  67         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  68         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  69         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  70         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  71         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  72         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  73         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  74         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  75         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  76         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  77         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  78         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  79         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  80         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  81         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  82         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  83         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  84         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  85         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  86         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  87         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  88         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  89 };
  90 #define ByteCRC16(v, crc) \
  91         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
  92
  93 //
  94 // BBP register initialization set
  95 //
  96 REG_PAIR   BBPRegTable[] = {
  97         {BBP_R65,               0x2C},          // fix rssi issue
  98         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  99         {BBP_R69,               0x12},
 100         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 101         {BBP_R73,               0x10},
 102         {BBP_R81,               0x37},
 103         {BBP_R82,               0x62},
 104         {BBP_R83,               0x6A},
 105         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 106         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 107         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 108         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 109         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 110         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 111 };
 112 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 113
 114 //
 115 // RF register initialization set
 116 //
 117
 118 //
 119 // ASIC register initialization sets
 120 //
 121
 122 RTMP_REG_PAIR   MACRegTable[] = {
 123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 124         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 125         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 127         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 128         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 129 #else
 130     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 131 #endif // HW_BEACON_OFFSET //
 132
 133         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 134         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 135         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 136         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 137         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 138         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 139         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 140         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 141         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 142         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 143         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 144         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 145         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 146         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 147         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 148         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 149         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 150         {GF40_PROT_CFG,                 0x03F44084},
 151         {MM20_PROT_CFG,                 0x01744004},
 152         {MM40_PROT_CFG,                 0x03F54084},
 153         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 154         {TX_RTS_CFG,                    0x00092b20},
 155         {EXP_ACK_TIME,                  0x002400ca},    // default value
 156         {TXOP_HLDR_ET,                  0x00000002},
 157
 158         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 159                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 160                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 161                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 162         {XIFS_TIME_CFG,                 0x33a41010},
 163         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 164 };
 165
 166
 167 #ifdef CONFIG_STA_SUPPORT
 168 RTMP_REG_PAIR   STAMACRegTable[] =      {
 169         {WMM_AIFSN_CFG,         0x00002273},
 170         {WMM_CWMIN_CFG, 0x00002344},
 171         {WMM_CWMAX_CFG, 0x000034aa},
 172 };
 173 #endif // CONFIG_STA_SUPPORT //
 174
 175 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 176 #ifdef CONFIG_STA_SUPPORT
 177 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 178 #endif // CONFIG_STA_SUPPORT //
 179
 180
 181 // New 8k byte firmware size for RT3071/RT3072
 182 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 183 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 184 #define FIRMWARE_MAJOR_VERSION  0
 185
 186 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 187 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 188
 189 #define FIRMWARE_MINOR_VERSION  2
 190
 191
 192 /*
 193         ========================================================================
 194
 195         Routine Description:
 196                 Allocate RTMP_ADAPTER data block and do some initialization
 197
 198         Arguments:
 199                 Adapter         Pointer to our adapter
 200
 201         Return Value:
 202                 NDIS_STATUS_SUCCESS
 203                 NDIS_STATUS_FAILURE
 204
 205         IRQL = PASSIVE_LEVEL
 206
 207         Note:
 208
 209         ========================================================================
 210 */
 211 NDIS_STATUS     RTMPAllocAdapterBlock(
 212         IN  PVOID       handle,
 213         OUT     PRTMP_ADAPTER   *ppAdapter)
 214 {
 215         PRTMP_ADAPTER   pAd;
 216         NDIS_STATUS             Status;
 217         INT                     index;
 218         UCHAR                   *pBeaconBuf = NULL;
 219
 220         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 221
 222         *ppAdapter = NULL;
 223
 224         do
 225         {
 226                 // Allocate RTMP_ADAPTER memory block
 227                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 228                 if (pBeaconBuf == NULL)
 229                 {
 230                         Status = NDIS_STATUS_FAILURE;
 231                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 232                         break;
 233                 }
 234
 235                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 236                 if (Status != NDIS_STATUS_SUCCESS)
 237                 {
 238                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 239                         break;
 240                 }
 241                 pAd->BeaconBuf = pBeaconBuf;
 242                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 243
 244
 245                 // Init spin locks
 246                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 247                 NdisAllocateSpinLock(&pAd->RxRingLock);
 248
 249                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 250                 {
 251                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 252                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 253                         pAd->DeQueueRunning[index] = FALSE;
 254                 }
 255
 256                 NdisAllocateSpinLock(&pAd->irq_lock);
 257
 258         } while (FALSE);
 259
 260         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 261                 kfree(pBeaconBuf);
 262
 263         *ppAdapter = pAd;
 264
 265         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 266         return Status;
 267 }
 268
 269 /*
 270         ========================================================================
 271
 272         Routine Description:
 273                 Read initial Tx power per MCS and BW from EEPROM
 274
 275         Arguments:
 276                 Adapter                                         Pointer to our adapter
 277
 278         Return Value:
 279                 None
 280
 281         IRQL = PASSIVE_LEVEL
 282
 283         Note:
 284
 285         ========================================================================
 286 */
 287 VOID    RTMPReadTxPwrPerRate(
 288         IN      PRTMP_ADAPTER   pAd)
 289 {
 290         ULONG           data, Adata, Gdata;
 291         USHORT          i, value, value2;
 292         INT                     Apwrdelta, Gpwrdelta;
 293         UCHAR           t1,t2,t3,t4;
 294         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 295
 296         //
 297         // Get power delta for 20MHz and 40MHz.
 298         //
 299         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 300         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 301         Apwrdelta = 0;
 302         Gpwrdelta = 0;
 303
 304         if ((value2 & 0xff) != 0xff)
 305         {
 306                 if ((value2 & 0x80))
 307                         Gpwrdelta = (value2&0xf);
 308
 309                 if ((value2 & 0x40))
 310                         bGpwrdeltaMinus = FALSE;
 311                 else
 312                         bGpwrdeltaMinus = TRUE;
 313         }
 314         if ((value2 & 0xff00) != 0xff00)
 315         {
 316                 if ((value2 & 0x8000))
 317                         Apwrdelta = ((value2&0xf00)>>8);
 318
 319                 if ((value2 & 0x4000))
 320                         bApwrdeltaMinus = FALSE;
 321                 else
 322                         bApwrdeltaMinus = TRUE;
 323         }
 324         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 325
 326         //
 327         // Get Txpower per MCS for 20MHz in 2.4G.
 328         //
 329         for (i=0; i<5; i++)
 330         {
 331                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 332                 data = value;
 333                 if (bApwrdeltaMinus == FALSE)
 334                 {
 335                         t1 = (value&0xf)+(Apwrdelta);
 336                         if (t1 > 0xf)
 337                                 t1 = 0xf;
 338                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 339                         if (t2 > 0xf)
 340                                 t2 = 0xf;
 341                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 342                         if (t3 > 0xf)
 343                                 t3 = 0xf;
 344                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 345                         if (t4 > 0xf)
 346                                 t4 = 0xf;
 347                 }
 348                 else
 349                 {
 350                         if ((value&0xf) > Apwrdelta)
 351                                 t1 = (value&0xf)-(Apwrdelta);
 352                         else
 353                                 t1 = 0;
 354                         if (((value&0xf0)>>4) > Apwrdelta)
 355                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 356                         else
 357                                 t2 = 0;
 358                         if (((value&0xf00)>>8) > Apwrdelta)
 359                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 360                         else
 361                                 t3 = 0;
 362                         if (((value&0xf000)>>12) > Apwrdelta)
 363                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 364                         else
 365                                 t4 = 0;
 366                 }
 367                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 368                 if (bGpwrdeltaMinus == FALSE)
 369                 {
 370                         t1 = (value&0xf)+(Gpwrdelta);
 371                         if (t1 > 0xf)
 372                                 t1 = 0xf;
 373                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 374                         if (t2 > 0xf)
 375                                 t2 = 0xf;
 376                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 377                         if (t3 > 0xf)
 378                                 t3 = 0xf;
 379                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 380                         if (t4 > 0xf)
 381                                 t4 = 0xf;
 382                 }
 383                 else
 384                 {
 385                         if ((value&0xf) > Gpwrdelta)
 386                                 t1 = (value&0xf)-(Gpwrdelta);
 387                         else
 388                                 t1 = 0;
 389                         if (((value&0xf0)>>4) > Gpwrdelta)
 390                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 391                         else
 392                                 t2 = 0;
 393                         if (((value&0xf00)>>8) > Gpwrdelta)
 394                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 395                         else
 396                                 t3 = 0;
 397                         if (((value&0xf000)>>12) > Gpwrdelta)
 398                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 399                         else
 400                                 t4 = 0;
 401                 }
 402                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 403
 404                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 405                 if (bApwrdeltaMinus == FALSE)
 406                 {
 407                         t1 = (value&0xf)+(Apwrdelta);
 408                         if (t1 > 0xf)
 409                                 t1 = 0xf;
 410                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 411                         if (t2 > 0xf)
 412                                 t2 = 0xf;
 413                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 414                         if (t3 > 0xf)
 415                                 t3 = 0xf;
 416                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 417                         if (t4 > 0xf)
 418                                 t4 = 0xf;
 419                 }
 420                 else
 421                 {
 422                         if ((value&0xf) > Apwrdelta)
 423                                 t1 = (value&0xf)-(Apwrdelta);
 424                         else
 425                                 t1 = 0;
 426                         if (((value&0xf0)>>4) > Apwrdelta)
 427                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 428                         else
 429                                 t2 = 0;
 430                         if (((value&0xf00)>>8) > Apwrdelta)
 431                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 432                         else
 433                                 t3 = 0;
 434                         if (((value&0xf000)>>12) > Apwrdelta)
 435                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 436                         else
 437                                 t4 = 0;
 438                 }
 439                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 440                 if (bGpwrdeltaMinus == FALSE)
 441                 {
 442                         t1 = (value&0xf)+(Gpwrdelta);
 443                         if (t1 > 0xf)
 444                                 t1 = 0xf;
 445                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 446                         if (t2 > 0xf)
 447                                 t2 = 0xf;
 448                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 449                         if (t3 > 0xf)
 450                                 t3 = 0xf;
 451                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 452                         if (t4 > 0xf)
 453                                 t4 = 0xf;
 454                 }
 455                 else
 456                 {
 457                         if ((value&0xf) > Gpwrdelta)
 458                                 t1 = (value&0xf)-(Gpwrdelta);
 459                         else
 460                                 t1 = 0;
 461                         if (((value&0xf0)>>4) > Gpwrdelta)
 462                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 463                         else
 464                                 t2 = 0;
 465                         if (((value&0xf00)>>8) > Gpwrdelta)
 466                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 467                         else
 468                                 t3 = 0;
 469                         if (((value&0xf000)>>12) > Gpwrdelta)
 470                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 471                         else
 472                                 t4 = 0;
 473                 }
 474                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 475                 data |= (value<<16);
 476
 477                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 478                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 479
 480                 if (data != 0xffffffff)
 481                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 482                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 483         }
 484
 485         //
 486         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 487         //
 488         bValid = TRUE;
 489         for (i=0; i<6; i++)
 490         {
 491                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 492                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 493                 {
 494                         bValid = FALSE;
 495                         break;
 496                 }
 497         }
 498
 499         //
 500         // Get Txpower per MCS for 40MHz in 2.4G.
 501         //
 502         if (bValid)
 503         {
 504                 for (i=0; i<4; i++)
 505                 {
 506                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 507                         if (bGpwrdeltaMinus == FALSE)
 508                         {
 509                                 t1 = (value&0xf)+(Gpwrdelta);
 510                                 if (t1 > 0xf)
 511                                         t1 = 0xf;
 512                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 513                                 if (t2 > 0xf)
 514                                         t2 = 0xf;
 515                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 516                                 if (t3 > 0xf)
 517                                         t3 = 0xf;
 518                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 519                                 if (t4 > 0xf)
 520                                         t4 = 0xf;
 521                         }
 522                         else
 523                         {
 524                                 if ((value&0xf) > Gpwrdelta)
 525                                         t1 = (value&0xf)-(Gpwrdelta);
 526                                 else
 527                                         t1 = 0;
 528                                 if (((value&0xf0)>>4) > Gpwrdelta)
 529                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 530                                 else
 531                                         t2 = 0;
 532                                 if (((value&0xf00)>>8) > Gpwrdelta)
 533                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 534                                 else
 535                                         t3 = 0;
 536                                 if (((value&0xf000)>>12) > Gpwrdelta)
 537                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 538                                 else
 539                                         t4 = 0;
 540                         }
 541                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 542
 543                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 544                         if (bGpwrdeltaMinus == FALSE)
 545                         {
 546                                 t1 = (value&0xf)+(Gpwrdelta);
 547                                 if (t1 > 0xf)
 548                                         t1 = 0xf;
 549                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 550                                 if (t2 > 0xf)
 551                                         t2 = 0xf;
 552                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 553                                 if (t3 > 0xf)
 554                                         t3 = 0xf;
 555                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 556                                 if (t4 > 0xf)
 557                                         t4 = 0xf;
 558                         }
 559                         else
 560                         {
 561                                 if ((value&0xf) > Gpwrdelta)
 562                                         t1 = (value&0xf)-(Gpwrdelta);
 563                                 else
 564                                         t1 = 0;
 565                                 if (((value&0xf0)>>4) > Gpwrdelta)
 566                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 567                                 else
 568                                         t2 = 0;
 569                                 if (((value&0xf00)>>8) > Gpwrdelta)
 570                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 571                                 else
 572                                         t3 = 0;
 573                                 if (((value&0xf000)>>12) > Gpwrdelta)
 574                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 575                                 else
 576                                         t4 = 0;
 577                         }
 578                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 579
 580                         if (i == 0)
 581                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 582                         else
 583                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 584
 585                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 586                 }
 587         }
 588
 589         //
 590         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 591         //
 592         bValid = TRUE;
 593         for (i=0; i<8; i++)
 594         {
 595                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 596                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 597                 {
 598                         bValid = FALSE;
 599                         break;
 600                 }
 601         }
 602
 603         //
 604         // Get Txpower per MCS for 20MHz in 5G.
 605         //
 606         if (bValid)
 607         {
 608                 for (i=0; i<5; i++)
 609                 {
 610                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 611                         if (bApwrdeltaMinus == FALSE)
 612                         {
 613                                 t1 = (value&0xf)+(Apwrdelta);
 614                                 if (t1 > 0xf)
 615                                         t1 = 0xf;
 616                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 617                                 if (t2 > 0xf)
 618                                         t2 = 0xf;
 619                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 620                                 if (t3 > 0xf)
 621                                         t3 = 0xf;
 622                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 623                                 if (t4 > 0xf)
 624                                         t4 = 0xf;
 625                         }
 626                         else
 627                         {
 628                                 if ((value&0xf) > Apwrdelta)
 629                                         t1 = (value&0xf)-(Apwrdelta);
 630                                 else
 631                                         t1 = 0;
 632                                 if (((value&0xf0)>>4) > Apwrdelta)
 633                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 634                                 else
 635                                         t2 = 0;
 636                                 if (((value&0xf00)>>8) > Apwrdelta)
 637                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 638                                 else
 639                                         t3 = 0;
 640                                 if (((value&0xf000)>>12) > Apwrdelta)
 641                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 642                                 else
 643                                         t4 = 0;
 644                         }
 645                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 646
 647                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 648                         if (bApwrdeltaMinus == FALSE)
 649                         {
 650                                 t1 = (value&0xf)+(Apwrdelta);
 651                                 if (t1 > 0xf)
 652                                         t1 = 0xf;
 653                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 654                                 if (t2 > 0xf)
 655                                         t2 = 0xf;
 656                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 657                                 if (t3 > 0xf)
 658                                         t3 = 0xf;
 659                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 660                                 if (t4 > 0xf)
 661                                         t4 = 0xf;
 662                         }
 663                         else
 664                         {
 665                                 if ((value&0xf) > Apwrdelta)
 666                                         t1 = (value&0xf)-(Apwrdelta);
 667                                 else
 668                                         t1 = 0;
 669                                 if (((value&0xf0)>>4) > Apwrdelta)
 670                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 671                                 else
 672                                         t2 = 0;
 673                                 if (((value&0xf00)>>8) > Apwrdelta)
 674                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 675                                 else
 676                                         t3 = 0;
 677                                 if (((value&0xf000)>>12) > Apwrdelta)
 678                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 679                                 else
 680                                         t4 = 0;
 681                         }
 682                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 683
 684                         if (i == 0)
 685                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 686                         else
 687                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 688
 689                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 690                 }
 691         }
 692
 693         //
 694         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 695         //
 696         bValid = TRUE;
 697         for (i=0; i<6; i++)
 698         {
 699                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 700                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 701                 {
 702                         bValid = FALSE;
 703                         break;
 704                 }
 705         }
 706
 707         //
 708         // Get Txpower per MCS for 40MHz in 5G.
 709         //
 710         if (bValid)
 711         {
 712                 for (i=0; i<4; i++)
 713                 {
 714                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 715                         if (bApwrdeltaMinus == FALSE)
 716                         {
 717                                 t1 = (value&0xf)+(Apwrdelta);
 718                                 if (t1 > 0xf)
 719                                         t1 = 0xf;
 720                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 721                                 if (t2 > 0xf)
 722                                         t2 = 0xf;
 723                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 724                                 if (t3 > 0xf)
 725                                         t3 = 0xf;
 726                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 727                                 if (t4 > 0xf)
 728                                         t4 = 0xf;
 729                         }
 730                         else
 731                         {
 732                                 if ((value&0xf) > Apwrdelta)
 733                                         t1 = (value&0xf)-(Apwrdelta);
 734                                 else
 735                                         t1 = 0;
 736                                 if (((value&0xf0)>>4) > Apwrdelta)
 737                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 738                                 else
 739                                         t2 = 0;
 740                                 if (((value&0xf00)>>8) > Apwrdelta)
 741                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 742                                 else
 743                                         t3 = 0;
 744                                 if (((value&0xf000)>>12) > Apwrdelta)
 745                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 746                                 else
 747                                         t4 = 0;
 748                         }
 749                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 750
 751                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 752                         if (bApwrdeltaMinus == FALSE)
 753                         {
 754                                 t1 = (value&0xf)+(Apwrdelta);
 755                                 if (t1 > 0xf)
 756                                         t1 = 0xf;
 757                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 758                                 if (t2 > 0xf)
 759                                         t2 = 0xf;
 760                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 761                                 if (t3 > 0xf)
 762                                         t3 = 0xf;
 763                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 764                                 if (t4 > 0xf)
 765                                         t4 = 0xf;
 766                         }
 767                         else
 768                         {
 769                                 if ((value&0xf) > Apwrdelta)
 770                                         t1 = (value&0xf)-(Apwrdelta);
 771                                 else
 772                                         t1 = 0;
 773                                 if (((value&0xf0)>>4) > Apwrdelta)
 774                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 775                                 else
 776                                         t2 = 0;
 777                                 if (((value&0xf00)>>8) > Apwrdelta)
 778                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 779                                 else
 780                                         t3 = 0;
 781                                 if (((value&0xf000)>>12) > Apwrdelta)
 782                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 783                                 else
 784                                         t4 = 0;
 785                         }
 786                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 787
 788                         if (i == 0)
 789                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 790                         else
 791                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 792
 793                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 794                 }
 795         }
 796 }
 797
 798
 799 /*
 800         ========================================================================
 801
 802         Routine Description:
 803                 Read initial channel power parameters from EEPROM
 804
 805         Arguments:
 806                 Adapter                                         Pointer to our adapter
 807
 808         Return Value:
 809                 None
 810
 811         IRQL = PASSIVE_LEVEL
 812
 813         Note:
 814
 815         ========================================================================
 816 */
 817 VOID    RTMPReadChannelPwr(
 818         IN      PRTMP_ADAPTER   pAd)
 819 {
 820         UCHAR                           i, choffset;
 821         EEPROM_TX_PWR_STRUC         Power;
 822         EEPROM_TX_PWR_STRUC         Power2;
 823
 824         // Read Tx power value for all channels
 825         // Value from 1 - 0x7f. Default value is 24.
 826         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 827         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 828
 829         // 0. 11b/g, ch1 - ch 14
 830         for (i = 0; i < 7; i++)
 831         {
 832                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 833                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 834                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 835                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 836
 837                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 838                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 839                 else
 840                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 841
 842                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 843                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 844                 else
 845                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 846
 847                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 848                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 849                 else
 850                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 851
 852                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 853                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 854                 else
 855                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 856         }
 857
 858         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 859         // 1.1 Fill up channel
 860         choffset = 14;
 861         for (i = 0; i < 4; i++)
 862         {
 863                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 864                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 865                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 866
 867                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 868                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 869                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 870
 871                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 872                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 873                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 874         }
 875
 876         // 1.2 Fill up power
 877         for (i = 0; i < 6; i++)
 878         {
 879                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 880                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 881
 882                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 883                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 884
 885                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 886                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 887
 888                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 889                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 890
 891                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 892                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 893         }
 894
 895         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 896         // 2.1 Fill up channel
 897         choffset = 14 + 12;
 898         for (i = 0; i < 5; i++)
 899         {
 900                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 901                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 902                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 903
 904                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 905                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 906                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 907
 908                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 909                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 910                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 911         }
 912         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 913         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 914         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 915
 916         // 2.2 Fill up power
 917         for (i = 0; i < 8; i++)
 918         {
 919                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 920                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 921
 922                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 923                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 924
 925                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 926                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 927
 928                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 929                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 930
 931                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 932                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 933         }
 934
 935         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
 936         // 3.1 Fill up channel
 937         choffset = 14 + 12 + 16;
 938         for (i = 0; i < 2; i++)
 939         {
 940                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 941                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 942                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 943
 944                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 945                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 946                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 947
 948                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 949                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 950                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 951         }
 952         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
 953         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 954         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 955
 956         // 3.2 Fill up power
 957         for (i = 0; i < 4; i++)
 958         {
 959                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 960                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 961
 962                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 963                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 964
 965                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 966                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 967
 968                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 969                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 970
 971                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 972                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 973         }
 974
 975         // 4. Print and Debug
 976         choffset = 14 + 12 + 16 + 7;
 977
 978
 979 #if 0
 980         // Init the 802.11j channel number for TX channel power
 981         // 0. 20MHz
 982         for (i = 0; i < 3; i++)
 983         {
 984                 pAd->TxPower11J[i].Channel = 8 + i * 4;
 985                 pAd->TxPower11J[i].BW = BW_20;
 986         }
 987
 988         for (i = 0; i < 4; i++)
 989         {
 990                 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
 991                 pAd->TxPower11J[i + 3].BW = BW_20;
 992         }
 993
 994         for (i = 0; i < 4; i++)
 995         {
 996                 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
 997                 pAd->TxPower11J[i + 7].BW = BW_20;
 998         }
 999
1000         // 0. 10MHz
1001         for (i = 0; i < 2; i++)
1002         {
1003                 pAd->TxPower11J[i + 11].Channel = 7 + i;
1004                 pAd->TxPower11J[i + 11].BW = BW_10;
1005         }
1006         pAd->TxPower11J[13].Channel = 11;
1007         pAd->TxPower11J[13].BW = BW_10;
1008
1009         for (i = 0; i < 3; i++)
1010         {
1011                 pAd->TxPower11J[i + 14].Channel = 183 + i;
1012                 pAd->TxPower11J[i + 14].BW= BW_10;
1013         }
1014
1015         for (i = 0; i < 3; i++)
1016         {
1017                 pAd->TxPower11J[i + 17].Channel = 187 + i;
1018                 pAd->TxPower11J[i + 17].BW = BW_10;
1019         }
1020         for (i = 0; i < 10; i++)
1021         {
1022                 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1023                 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1024
1025                 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1026                         pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1027
1028                 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1029                         pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1030
1031                 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1032                         pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1033
1034                 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1035                         pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1036         }
1037 #endif
1038 }
1039
1040 /*
1041         ========================================================================
1042
1043         Routine Description:
1044                 Read the following from the registry
1045                 1. All the parameters
1046                 2. NetworkAddres
1047
1048         Arguments:
1049                 Adapter                                         Pointer to our adapter
1050                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1051
1052         Return Value:
1053                 NDIS_STATUS_SUCCESS
1054                 NDIS_STATUS_FAILURE
1055                 NDIS_STATUS_RESOURCES
1056
1057         IRQL = PASSIVE_LEVEL
1058
1059         Note:
1060
1061         ========================================================================
1062 */
1063 NDIS_STATUS     NICReadRegParameters(
1064         IN      PRTMP_ADAPTER           pAd,
1065         IN      NDIS_HANDLE                     WrapperConfigurationContext
1066         )
1067 {
1068         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1069         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1070         return Status;
1071 }
1072
1073
1074
1075
1076 /*
1077         ========================================================================
1078
1079         Routine Description:
1080                 Read initial parameters from EEPROM
1081
1082         Arguments:
1083                 Adapter                                         Pointer to our adapter
1084
1085         Return Value:
1086                 None
1087
1088         IRQL = PASSIVE_LEVEL
1089
1090         Note:
1091
1092         ========================================================================
1093 */
1094 VOID    NICReadEEPROMParameters(
1095         IN      PRTMP_ADAPTER   pAd,
1096         IN      PUCHAR                  mac_addr)
1097 {
1098         UINT32                  data = 0;
1099         USHORT                  i, value, value2;
1100         UCHAR                   TmpPhy;
1101         EEPROM_TX_PWR_STRUC         Power;
1102         EEPROM_VERSION_STRUC    Version;
1103         EEPROM_ANTENNA_STRUC    Antenna;
1104         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1105
1106         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1107
1108         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1109         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1110         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1111
1112         if((data & 0x30) == 0)
1113                 pAd->EEPROMAddressNum = 6;              // 93C46
1114         else if((data & 0x30) == 0x10)
1115                 pAd->EEPROMAddressNum = 8;     // 93C66
1116         else
1117                 pAd->EEPROMAddressNum = 8;     // 93C86
1118         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1119
1120         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1121         // MAC address registers according to E2PROM setting
1122         if (mac_addr == NULL ||
1123                 strlen(mac_addr) != 17 ||
1124                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1125                 mac_addr[11] != ':' || mac_addr[14] != ':')
1126         {
1127                 USHORT  Addr01,Addr23,Addr45 ;
1128
1129                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1130                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1131                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1132
1133                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1134                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1135                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1136                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1137                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1138                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1139
1140                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1141         }
1142         else
1143         {
1144                 INT             j;
1145                 PUCHAR  macptr;
1146
1147                 macptr = mac_addr;
1148
1149                 for (j=0; j<MAC_ADDR_LEN; j++)
1150                 {
1151                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1152                         macptr=macptr+3;
1153                 }
1154
1155                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1156         }
1157
1158
1159         {
1160                 //more conveninet to test mbssid, so ap's bssid &0xf1
1161                 if (pAd->PermanentAddress[0] == 0xff)
1162                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1163
1164                 //if (pAd->PermanentAddress[5] == 0xff)
1165                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1166
1167                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1168                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1169                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1170                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1171                 if (pAd->bLocalAdminMAC == FALSE)
1172                 {
1173                         MAC_DW0_STRUC csr2;
1174                         MAC_DW1_STRUC csr3;
1175                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1176                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1177                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1178                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1179                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1180                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1181                         csr3.word = 0;
1182                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1183                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1184                         csr3.field.U2MeMask = 0xff;
1185                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1186                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1187                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1188                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1189                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1190                 }
1191         }
1192
1193         // if not return early. cause fail at emulation.
1194         // Init the channel number for TX channel power
1195         RTMPReadChannelPwr(pAd);
1196
1197         // if E2PROM version mismatch with driver's expectation, then skip
1198         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1199         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1200         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1201         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1202
1203         if (Version.field.Version > VALID_EEPROM_VERSION)
1204         {
1205                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1206                 /*pAd->SystemErrorBitmap |= 0x00000001;
1207
1208                 // hard-code default value when no proper E2PROM installed
1209                 pAd->bAutoTxAgcA = FALSE;
1210                 pAd->bAutoTxAgcG = FALSE;
1211
1212                 // Default the channel power
1213                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1214                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1215
1216                 // Default the channel power
1217                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1218                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1219
1220                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1221                         pAd->EEPROMDefaultValue[i] = 0xffff;
1222                 return;  */
1223         }
1224
1225         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1226         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1227         pAd->EEPROMDefaultValue[0] = value;
1228
1229         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1230         pAd->EEPROMDefaultValue[1] = value;
1231
1232         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1233         pAd->EEPROMDefaultValue[2] = value;
1234
1235         for(i = 0; i < 8; i++)
1236         {
1237                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1238                 pAd->EEPROMDefaultValue[i+3] = value;
1239         }
1240
1241         // We have to parse NIC configuration 0 at here.
1242         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1243         // Therefore, we have to read TxAutoAgc control beforehand.
1244         // Read Tx AGC control bit
1245         Antenna.word = pAd->EEPROMDefaultValue[0];
1246         if (Antenna.word == 0xFFFF)
1247         {
1248                 Antenna.word = 0;
1249                 Antenna.field.RfIcType = RFIC_2820;
1250                 Antenna.field.TxPath = 1;
1251                 Antenna.field.RxPath = 2;
1252                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1253         }
1254
1255         // Choose the desired Tx&Rx stream.
1256         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1257                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1258
1259         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1260         {
1261                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1262
1263                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1264                         (pAd->CommonCfg.RxStream > 2))
1265                 {
1266                         // only 2 Rx streams for RT2860 series
1267                         pAd->CommonCfg.RxStream = 2;
1268                 }
1269         }
1270
1271         // 3*3
1272         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1273         // yet implement
1274         for(i=0; i<3; i++)
1275         {
1276         }
1277
1278         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1279
1280
1281
1282 #ifdef CONFIG_STA_SUPPORT
1283         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1284         {
1285                 NicConfig2.word = 0;
1286                 if ((NicConfig2.word & 0x00ff) == 0xff)
1287                 {
1288                         NicConfig2.word &= 0xff00;
1289                 }
1290
1291                 if ((NicConfig2.word >> 8) == 0xff)
1292                 {
1293                         NicConfig2.word &= 0x00ff;
1294                 }
1295         }
1296 #endif // CONFIG_STA_SUPPORT //
1297
1298         if (NicConfig2.field.DynamicTxAgcControl == 1)
1299                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1300         else
1301                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1302
1303         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1304
1305         // Save the antenna for future use
1306         pAd->Antenna.word = Antenna.word;
1307
1308         //
1309         // Reset PhyMode if we don't support 802.11a
1310         // Only RFIC_2850 & RFIC_2750 support 802.11a
1311         //
1312         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1313         {
1314                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1315                         (pAd->CommonCfg.PhyMode == PHY_11A))
1316                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1317 #ifdef DOT11_N_SUPPORT
1318                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1319                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1320                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1321                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1322                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1323 #endif // DOT11_N_SUPPORT //
1324         }
1325
1326         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1327         // 0. 11b/g
1328         {
1329                 /* these are tempature reference value (0x00 ~ 0xFE)
1330                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1331                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1332                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1333                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1334                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1335                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1336                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1337                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1338                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1339                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1340                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1341                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1342                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1343                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1344                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1345                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1346                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1347                 pAd->TxAgcStepG = Power.field.Byte1;
1348                 pAd->TxAgcCompensateG = 0;
1349                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1350                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1351
1352                 // Disable TxAgc if the based value is not right
1353                 if (pAd->TssiRefG == 0xff)
1354                         pAd->bAutoTxAgcG = FALSE;
1355
1356                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1357                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1358                         pAd->TssiRefG,
1359                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1360                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1361         }
1362         // 1. 11a
1363         {
1364                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1365                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1366                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1367                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1368                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1369                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1370                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1371                 pAd->TssiRefA   = Power.field.Byte0;
1372                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1373                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1374                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1375                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1376                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1377                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1378                 pAd->TxAgcStepA = Power.field.Byte1;
1379                 pAd->TxAgcCompensateA = 0;
1380                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1381                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1382
1383                 // Disable TxAgc if the based value is not right
1384                 if (pAd->TssiRefA == 0xff)
1385                         pAd->bAutoTxAgcA = FALSE;
1386
1387                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1388                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1389                         pAd->TssiRefA,
1390                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1391                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1392         }
1393         pAd->BbpRssiToDbmDelta = 0x0;
1394
1395         // Read frequency offset setting for RF
1396         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1397         if ((value & 0x00FF) != 0x00FF)
1398                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1399         else
1400                 pAd->RfFreqOffset = 0;
1401         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1402
1403         //CountryRegion byte offset (38h)
1404         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1405         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1406
1407         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1408         {
1409                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1410                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1411                 TmpPhy = pAd->CommonCfg.PhyMode;
1412                 pAd->CommonCfg.PhyMode = 0xff;
1413                 RTMPSetPhyMode(pAd, TmpPhy);
1414 #ifdef DOT11_N_SUPPORT
1415                 SetCommonHT(pAd);
1416 #endif // DOT11_N_SUPPORT //
1417         }
1418
1419         //
1420         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1421         // The valid value are (-10 ~ 10)
1422         //
1423         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1424         pAd->BGRssiOffset0 = value & 0x00ff;
1425         pAd->BGRssiOffset1 = (value >> 8);
1426         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1427         pAd->BGRssiOffset2 = value & 0x00ff;
1428         pAd->ALNAGain1 = (value >> 8);
1429         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1430         pAd->BLNAGain = value & 0x00ff;
1431         pAd->ALNAGain0 = (value >> 8);
1432
1433         // Validate 11b/g RSSI_0 offset.
1434         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1435                 pAd->BGRssiOffset0 = 0;
1436
1437         // Validate 11b/g RSSI_1 offset.
1438         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1439                 pAd->BGRssiOffset1 = 0;
1440
1441         // Validate 11b/g RSSI_2 offset.
1442         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1443                 pAd->BGRssiOffset2 = 0;
1444
1445         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1446         pAd->ARssiOffset0 = value & 0x00ff;
1447         pAd->ARssiOffset1 = (value >> 8);
1448         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1449         pAd->ARssiOffset2 = value & 0x00ff;
1450         pAd->ALNAGain2 = (value >> 8);
1451
1452         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1453                 pAd->ALNAGain1 = pAd->ALNAGain0;
1454         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1455                 pAd->ALNAGain2 = pAd->ALNAGain0;
1456
1457         // Validate 11a RSSI_0 offset.
1458         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1459                 pAd->ARssiOffset0 = 0;
1460
1461         // Validate 11a RSSI_1 offset.
1462         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1463                 pAd->ARssiOffset1 = 0;
1464
1465         //Validate 11a RSSI_2 offset.
1466         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1467                 pAd->ARssiOffset2 = 0;
1468
1469         //
1470         // Get LED Setting.
1471         //
1472         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1473         pAd->LedCntl.word = (value&0xff00) >> 8;
1474         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1475         pAd->Led1 = value;
1476         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1477         pAd->Led2 = value;
1478         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1479         pAd->Led3 = value;
1480
1481         RTMPReadTxPwrPerRate(pAd);
1482
1483         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1484 }
1485
1486 /*
1487         ========================================================================
1488
1489         Routine Description:
1490                 Set default value from EEPROM
1491
1492         Arguments:
1493                 Adapter                                         Pointer to our adapter
1494
1495         Return Value:
1496                 None
1497
1498         IRQL = PASSIVE_LEVEL
1499
1500         Note:
1501
1502         ========================================================================
1503 */
1504 VOID    NICInitAsicFromEEPROM(
1505         IN      PRTMP_ADAPTER   pAd)
1506 {
1507 #ifdef CONFIG_STA_SUPPORT
1508         UINT32                                  data = 0;
1509         UCHAR   BBPR1 = 0;
1510 #endif // CONFIG_STA_SUPPORT //
1511         USHORT                                  i;
1512         EEPROM_ANTENNA_STRUC    Antenna;
1513         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1514         UCHAR   BBPR3 = 0;
1515
1516         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1517         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1518         {
1519                 UCHAR BbpRegIdx, BbpValue;
1520
1521                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1522                 {
1523                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1524                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1525                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1526                 }
1527         }
1528
1529         Antenna.word = pAd->Antenna.word;
1530         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1531         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1532
1533         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1534
1535
1536         // Save the antenna for future use
1537         pAd->NicConfig2.word = NicConfig2.word;
1538
1539         //
1540         // Send LED Setting to MCU.
1541         //
1542         if (pAd->LedCntl.word == 0xFF)
1543         {
1544                 pAd->LedCntl.word = 0x01;
1545                 pAd->Led1 = 0x5555;
1546                 pAd->Led2 = 0x2221;
1547                 pAd->Led3 = 0xA9F8;
1548         }
1549
1550         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1551         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1552         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1553     pAd->LedIndicatorStregth = 0xFF;
1554     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1555
1556 #ifdef CONFIG_STA_SUPPORT
1557         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1558         {
1559                 // Read Hardware controlled Radio state enable bit
1560                 if (NicConfig2.field.HardwareRadioControl == 1)
1561                 {
1562                         pAd->StaCfg.bHardwareRadio = TRUE;
1563
1564                         // Read GPIO pin2 as Hardware controlled radio state
1565                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1566                         if ((data & 0x04) == 0)
1567                         {
1568                                 pAd->StaCfg.bHwRadio = FALSE;
1569                                 pAd->StaCfg.bRadio = FALSE;
1570                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1571                         }
1572                 }
1573                 else
1574                         pAd->StaCfg.bHardwareRadio = FALSE;
1575
1576                 if (pAd->StaCfg.bRadio == FALSE)
1577                 {
1578                         RTMPSetLED(pAd, LED_RADIO_OFF);
1579                 }
1580                 else
1581                 {
1582                         RTMPSetLED(pAd, LED_RADIO_ON);
1583                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1584                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1585                         // 2-1. wait command ok.
1586                         AsicCheckCommanOk(pAd, PowerWakeCID);
1587                 }
1588         }
1589 #endif // CONFIG_STA_SUPPORT //
1590
1591         // Turn off patching for cardbus controller
1592         if (NicConfig2.field.CardbusAcceleration == 1)
1593         {
1594         }
1595
1596         if (NicConfig2.field.DynamicTxAgcControl == 1)
1597                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1598         else
1599                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1600         //
1601         // Since BBP has been progamed, to make sure BBP setting will be
1602         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1603         //
1604         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1605
1606         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1607         BBPR3 &= (~0x18);
1608         if(pAd->Antenna.field.RxPath == 3)
1609         {
1610                 BBPR3 |= (0x10);
1611         }
1612         else if(pAd->Antenna.field.RxPath == 2)
1613         {
1614                 BBPR3 |= (0x8);
1615         }
1616         else if(pAd->Antenna.field.RxPath == 1)
1617         {
1618                 BBPR3 |= (0x0);
1619         }
1620         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1621
1622 #ifdef CONFIG_STA_SUPPORT
1623         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1624         {
1625                 // Handle the difference when 1T
1626                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1627                 if(pAd->Antenna.field.TxPath == 1)
1628                 {
1629                 BBPR1 &= (~0x18);
1630                 }
1631                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1632
1633                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1634         }
1635 #endif // CONFIG_STA_SUPPORT //
1636         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1637         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1638 }
1639
1640 /*
1641         ========================================================================
1642
1643         Routine Description:
1644                 Initialize NIC hardware
1645
1646         Arguments:
1647                 Adapter                                         Pointer to our adapter
1648
1649         Return Value:
1650                 None
1651
1652         IRQL = PASSIVE_LEVEL
1653
1654         Note:
1655
1656         ========================================================================
1657 */
1658 NDIS_STATUS     NICInitializeAdapter(
1659         IN      PRTMP_ADAPTER   pAd,
1660         IN   BOOLEAN    bHardReset)
1661 {
1662         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1663         WPDMA_GLO_CFG_STRUC     GloCfg;
1664         UINT32                  Value;
1665         DELAY_INT_CFG_STRUC     IntCfg;
1666         ULONG   i =0, j=0;
1667         AC_TXOP_CSR0_STRUC      csr0;
1668
1669         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1670
1671         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1672 retry:
1673         i = 0;
1674         do
1675         {
1676                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1677                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1678                         break;
1679
1680                 RTMPusecDelay(1000);
1681                 i++;
1682         }while ( i<100);
1683         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1684         GloCfg.word &= 0xff0;
1685         GloCfg.field.EnTXWriteBackDDONE =1;
1686         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1687
1688         // Record HW Beacon offset
1689         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1690         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1691         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1692         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1693         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1694         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1695         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1696         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1697
1698         //
1699         // write all shared Ring's base address into ASIC
1700         //
1701
1702         // asic simulation sequence put this ahead before loading firmware.
1703         // pbf hardware reset
1704         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1705         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1706         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1707
1708         // Initialze ASIC for TX & Rx operation
1709         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1710         {
1711                 if (j++ == 0)
1712                 {
1713                         NICLoadFirmware(pAd);
1714                         goto retry;
1715                 }
1716                 return NDIS_STATUS_FAILURE;
1717         }
1718
1719
1720         // Write AC_BK base address register
1721         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1722         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1723         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1724
1725         // Write AC_BE base address register
1726         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1727         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1728         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1729
1730         // Write AC_VI base address register
1731         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1732         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1733         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1734
1735         // Write AC_VO base address register
1736         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1737         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1738         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1739
1740         // Write HCCA base address register
1741           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1742           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1743         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1744
1745         // Write MGMT_BASE_CSR register
1746         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1747         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1748         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1749
1750         // Write RX_BASE_CSR register
1751         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1752         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1753         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1754
1755         // Init RX Ring index pointer
1756         pAd->RxRing.RxSwReadIdx = 0;
1757         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1758         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1759
1760         // Init TX rings index pointer
1761         {
1762                 for (i=0; i<NUM_OF_TX_RING; i++)
1763                 {
1764                         pAd->TxRing[i].TxSwFreeIdx = 0;
1765                         pAd->TxRing[i].TxCpuIdx = 0;
1766                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1767                 }
1768         }
1769
1770         // init MGMT ring index pointer
1771         pAd->MgmtRing.TxSwFreeIdx = 0;
1772         pAd->MgmtRing.TxCpuIdx = 0;
1773         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1774
1775         //
1776         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1777         //
1778
1779         // Write TX_RING_CSR0 register
1780         Value = TX_RING_SIZE;
1781         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1782         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1783         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1784         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1785         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1786         Value = MGMT_RING_SIZE;
1787         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1788
1789         // Write RX_RING_CSR register
1790         Value = RX_RING_SIZE;
1791         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1792
1793
1794         // WMM parameter
1795         csr0.word = 0;
1796         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1797         if (pAd->CommonCfg.PhyMode == PHY_11B)
1798         {
1799                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1800                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1801         }
1802         else
1803         {
1804                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1805                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1806         }
1807         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1808
1809
1810         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1811         i = 0;
1812         do
1813         {
1814                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1815                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1816                         break;
1817
1818                 RTMPusecDelay(1000);
1819                 i++;
1820         }while ( i < 100);
1821
1822         GloCfg.word &= 0xff0;
1823         GloCfg.field.EnTXWriteBackDDONE =1;
1824         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1825
1826         IntCfg.word = 0;
1827         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1828
1829
1830         // reset action
1831         // Load firmware
1832         //  Status = NICLoadFirmware(pAd);
1833
1834         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1835         return Status;
1836 }
1837
1838 /*
1839         ========================================================================
1840
1841         Routine Description:
1842                 Initialize ASIC
1843
1844         Arguments:
1845                 Adapter                                         Pointer to our adapter
1846
1847         Return Value:
1848                 None
1849
1850         IRQL = PASSIVE_LEVEL
1851
1852         Note:
1853
1854         ========================================================================
1855 */
1856 NDIS_STATUS     NICInitializeAsic(
1857         IN      PRTMP_ADAPTER   pAd,
1858         IN  BOOLEAN             bHardReset)
1859 {
1860         ULONG                   Index = 0;
1861         UCHAR                   R0 = 0xff;
1862         UINT32                  MacCsr12 = 0, Counter = 0;
1863         USHORT                  KeyIdx;
1864         INT                             i,apidx;
1865
1866         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1867
1868         if (bHardReset == TRUE)
1869         {
1870                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1871         }
1872         else
1873                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1874
1875         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1876         // Initialize MAC register to default value
1877         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1878         {
1879                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1880         }
1881
1882
1883 #ifdef CONFIG_STA_SUPPORT
1884         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1885         {
1886                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1887                 {
1888                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1889                 }
1890         }
1891 #endif // CONFIG_STA_SUPPORT //
1892
1893
1894         //
1895         // Before program BBP, we need to wait BBP/RF get wake up.
1896         //
1897         Index = 0;
1898         do
1899         {
1900                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1901
1902                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1903                         break;
1904
1905                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1906                 RTMPusecDelay(1000);
1907         } while (Index++ < 100);
1908
1909     // The commands to firmware should be after these commands, these commands will init firmware
1910         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1911         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1912         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1913         RTMPusecDelay(1000);
1914
1915         // Read BBP register, make sure BBP is up and running before write new data
1916         Index = 0;
1917         do
1918         {
1919                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1920                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1921         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1922         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1923
1924         if ((R0 == 0xff) || (R0 == 0x00))
1925                 return NDIS_STATUS_FAILURE;
1926
1927         // Initialize BBP register to default value
1928         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1929         {
1930                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1931         }
1932
1933         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1934         if ((pAd->MACVersion&0xffff) != 0x0101)
1935                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1936
1937
1938         if (pAd->MACVersion == 0x28600100)
1939         {
1940                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1941                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1942     }
1943
1944         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1945         {
1946                 // enlarge MAX_LEN_CFG
1947                 UINT32 csr;
1948                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1949                 csr &= 0xFFF;
1950                 csr |= 0x2000;
1951                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1952         }
1953
1954
1955         // Add radio off control
1956 #ifdef CONFIG_STA_SUPPORT
1957         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1958         {
1959                 if (pAd->StaCfg.bRadio == FALSE)
1960                 {
1961 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1962                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1963                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1964                 }
1965         }
1966 #endif // CONFIG_STA_SUPPORT //
1967
1968         // Clear raw counters
1969         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1970         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1971         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1972         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1973         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1974         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1975
1976         // ASIC will keep garbage value after boot
1977         // Clear all seared key table when initial
1978         // This routine can be ignored in radio-ON/OFF operation.
1979         if (bHardReset)
1980         {
1981                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1982                 {
1983                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1984                 }
1985
1986                 // Clear all pairwise key table when initial
1987                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1988                 {
1989                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1990                 }
1991         }
1992
1993
1994         // It isn't necessary to clear this space when not hard reset.
1995         if (bHardReset == TRUE)
1996         {
1997                 // clear all on-chip BEACON frame space
1998                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1999                 {
2000                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2001                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2002                 }
2003         }
2004
2005 #ifdef CONFIG_STA_SUPPORT
2006         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2007         {
2008                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2009                 if ((pAd->MACVersion&0xffff) != 0x0101)
2010                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2011         }
2012 #endif // CONFIG_STA_SUPPORT //
2013
2014         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2015         return NDIS_STATUS_SUCCESS;
2016 }
2017
2018
2019 VOID NICRestoreBBPValue(
2020         IN PRTMP_ADAPTER pAd)
2021 {
2022         UCHAR           index;
2023         UCHAR           Value = 0;
2024         ULONG           Data;
2025
2026         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2027         // Initialize BBP register to default value (rtmp_init.c)
2028         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2029         {
2030                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2031         }
2032         // copy from (rtmp_init.c)
2033         if (pAd->MACVersion == 0x28600100)
2034         {
2035                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2036                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2037         }
2038
2039         // copy from (connect.c LinkUp function)
2040         if (INFRA_ON(pAd))
2041         {
2042                 // Change to AP channel
2043                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2044                 {
2045                         // Must using 40MHz.
2046                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2047                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2048                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2049
2050                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2051                         Value &= (~0x18);
2052                         Value |= 0x10;
2053                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2054
2055                         //  RX : control channel at lower
2056                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2057                         Value &= (~0x20);
2058                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2059                         // Record BBPR3 setting, But don't keep R Antenna # information.
2060                         pAd->StaCfg.BBPR3 = Value;
2061
2062                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2063                         Data &= 0xfffffffe;
2064                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2065
2066                         if (pAd->MACVersion == 0x28600100)
2067                         {
2068                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2069                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2070                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2071                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2072                         }
2073
2074                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2075                 }
2076                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2077                 {
2078                         // Must using 40MHz.
2079                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2080                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2081                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2082
2083                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2084                         Value &= (~0x18);
2085                         Value |= 0x10;
2086                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2087
2088                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2089                         Data |= 0x1;
2090                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2091
2092                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2093                         Value |= (0x20);
2094                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2095                         // Record BBPR3 setting, But don't keep R Antenna # information.
2096                         pAd->StaCfg.BBPR3 = Value;
2097
2098                         if (pAd->MACVersion == 0x28600100)
2099                         {
2100                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2101                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2102                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2103                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2104                         }
2105
2106                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2107                 }
2108                 else
2109                 {
2110                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2111                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2112                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2113
2114                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2115                         Value &= (~0x18);
2116                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2117
2118                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2119                         Data &= 0xfffffffe;
2120                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2121
2122                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2123                         Value &= (~0x20);
2124                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2125                         // Record BBPR3 setting, But don't keep R Antenna # information.
2126                         pAd->StaCfg.BBPR3 = Value;
2127
2128                         if (pAd->MACVersion == 0x28600100)
2129                         {
2130                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2131                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2132                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2133                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2134                         }
2135
2136                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2137                 }
2138         }
2139
2140         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2141 }
2142
2143 /*
2144         ========================================================================
2145
2146         Routine Description:
2147                 Reset NIC Asics
2148
2149         Arguments:
2150                 Adapter                                         Pointer to our adapter
2151
2152         Return Value:
2153                 None
2154
2155         IRQL = PASSIVE_LEVEL
2156
2157         Note:
2158                 Reset NIC to initial state AS IS system boot up time.
2159
2160         ========================================================================
2161 */
2162 VOID    NICIssueReset(
2163         IN      PRTMP_ADAPTER   pAd)
2164 {
2165         UINT32  Value = 0;
2166         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2167
2168         // Disable Rx, register value supposed will remain after reset
2169         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2170         Value &= (0xfffffff3);
2171         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2172
2173         // Issue reset and clear from reset state
2174         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2175         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2176
2177         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2178 }
2179
2180 /*
2181         ========================================================================
2182
2183         Routine Description:
2184                 Check ASIC registers and find any reason the system might hang
2185
2186         Arguments:
2187                 Adapter                                         Pointer to our adapter
2188
2189         Return Value:
2190                 None
2191
2192         IRQL = DISPATCH_LEVEL
2193
2194         ========================================================================
2195 */
2196 BOOLEAN NICCheckForHang(
2197         IN      PRTMP_ADAPTER   pAd)
2198 {
2199         return (FALSE);
2200 }
2201
2202 VOID NICUpdateFifoStaCounters(
2203         IN PRTMP_ADAPTER pAd)
2204 {
2205         TX_STA_FIFO_STRUC       StaFifo;
2206         MAC_TABLE_ENTRY         *pEntry;
2207         UCHAR                           i = 0;
2208         UCHAR                   pid = 0, wcid = 0;
2209         CHAR                            reTry;
2210         UCHAR                           succMCS;
2211
2212                 do
2213                 {
2214                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2215
2216                         if (StaFifo.field.bValid == 0)
2217                                 break;
2218
2219                         wcid = (UCHAR)StaFifo.field.wcid;
2220
2221
2222                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2223                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2224                         {
2225                                 i++;
2226                                 continue;
2227                         }
2228
2229                         /* PID store Tx MCS Rate */
2230                         pid = (UCHAR)StaFifo.field.PidType;
2231
2232                         pEntry = &pAd->MacTab.Content[wcid];
2233
2234                         pEntry->DebugFIFOCount++;
2235
2236 #ifdef DOT11_N_SUPPORT
2237                         if (StaFifo.field.TxBF) // 3*3
2238                                 pEntry->TxBFCount++;
2239 #endif // DOT11_N_SUPPORT //
2240
2241 #ifdef UAPSD_AP_SUPPORT
2242                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2243 #endif // UAPSD_AP_SUPPORT //
2244
2245                         if (!StaFifo.field.TxSuccess)
2246                         {
2247                                 pEntry->FIFOCount++;
2248                                 pEntry->OneSecTxFailCount++;
2249
2250                                 if (pEntry->FIFOCount >= 1)
2251                                 {
2252                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2253 #if 0
2254                                         SendRefreshBAR(pAd, pEntry);
2255                                         pEntry->NoBADataCountDown = 64;
2256 #else
2257 #ifdef DOT11_N_SUPPORT
2258                                         pEntry->NoBADataCountDown = 64;
2259 #endif // DOT11_N_SUPPORT //
2260
2261                                         if(pEntry->PsMode == PWR_ACTIVE)
2262                                         {
2263 #ifdef DOT11_N_SUPPORT
2264                                                 int tid;
2265                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2266                                                 {
2267                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2268                                                 }
2269 #endif // DOT11_N_SUPPORT //
2270
2271                                                 // Update the continuous transmission counter except PS mode
2272                                                 pEntry->ContinueTxFailCnt++;
2273                                         }
2274                                         else
2275                                         {
2276                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2277                                                 //     this tx error happened due to sta just go to sleep.
2278                                                 pEntry->FIFOCount = 0;
2279                                                 pEntry->ContinueTxFailCnt = 0;
2280                                         }
2281 #endif
2282                                         //pEntry->FIFOCount = 0;
2283                                 }
2284                                 //pEntry->bSendBAR = TRUE;
2285                         }
2286                         else
2287                         {
2288 #ifdef DOT11_N_SUPPORT
2289                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2290                                 {
2291                                         pEntry->NoBADataCountDown--;
2292                                         if (pEntry->NoBADataCountDown==0)
2293                                         {
2294                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2295                                         }
2296                                 }
2297 #endif // DOT11_N_SUPPORT //
2298                                 pEntry->FIFOCount = 0;
2299                                 pEntry->OneSecTxNoRetryOkCount++;
2300                                 // update NoDataIdleCount when sucessful send packet to STA.
2301                                 pEntry->NoDataIdleCount = 0;
2302                                 pEntry->ContinueTxFailCnt = 0;
2303                         }
2304
2305                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2306
2307                         reTry = pid - succMCS;
2308
2309                         if (StaFifo.field.TxSuccess)
2310                         {
2311                                 pEntry->TXMCSExpected[pid]++;
2312                                 if (pid == succMCS)
2313                                 {
2314                                         pEntry->TXMCSSuccessful[pid]++;
2315                                 }
2316                                 else
2317                                 {
2318                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2319                                 }
2320                         }
2321                         else
2322                         {
2323                                 pEntry->TXMCSFailed[pid]++;
2324                         }
2325
2326                         if (reTry > 0)
2327                         {
2328                                 if ((pid >= 12) && succMCS <=7)
2329                                 {
2330                                         reTry -= 4;
2331                                 }
2332                                 pEntry->OneSecTxRetryOkCount += reTry;
2333                         }
2334
2335                         i++;
2336                         // ASIC store 16 stack
2337                 } while ( i < (2*TX_RING_SIZE) );
2338
2339 }
2340
2341 /*
2342         ========================================================================
2343
2344         Routine Description:
2345                 Read statistical counters from hardware registers and record them
2346                 in software variables for later on query
2347
2348         Arguments:
2349                 pAd                                     Pointer to our adapter
2350
2351         Return Value:
2352                 None
2353
2354         IRQL = DISPATCH_LEVEL
2355
2356         ========================================================================
2357 */
2358 VOID NICUpdateRawCounters(
2359         IN PRTMP_ADAPTER pAd)
2360 {
2361         UINT32  OldValue;
2362         RX_STA_CNT0_STRUC        RxStaCnt0;
2363         RX_STA_CNT1_STRUC   RxStaCnt1;
2364         RX_STA_CNT2_STRUC   RxStaCnt2;
2365         TX_STA_CNT0_STRUC        TxStaCnt0;
2366         TX_STA_CNT1_STRUC        StaTx1;
2367         TX_STA_CNT2_STRUC        StaTx2;
2368         TX_AGG_CNT_STRUC        TxAggCnt;
2369         TX_AGG_CNT0_STRUC       TxAggCnt0;
2370         TX_AGG_CNT1_STRUC       TxAggCnt1;
2371         TX_AGG_CNT2_STRUC       TxAggCnt2;
2372         TX_AGG_CNT3_STRUC       TxAggCnt3;
2373         TX_AGG_CNT4_STRUC       TxAggCnt4;
2374         TX_AGG_CNT5_STRUC       TxAggCnt5;
2375         TX_AGG_CNT6_STRUC       TxAggCnt6;
2376         TX_AGG_CNT7_STRUC       TxAggCnt7;
2377
2378         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2379         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2380
2381         {
2382                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2383             // Update RX PLCP error counter
2384             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2385                 // Update False CCA counter
2386                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2387         }
2388
2389         // Update FCS counters
2390         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2391         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2392         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2393                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2394
2395         // Add FCS error count to private counters
2396         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2397         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2398         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2399         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2400                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2401
2402         // Update Duplicate Rcv check
2403         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2404         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2405         // Update RX Overflow counter
2406         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2407
2408         if (!pAd->bUpdateBcnCntDone)
2409         {
2410         // Update BEACON sent count
2411         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2412         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2413         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2414         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2415         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2416         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2417         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2418         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2419         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2420         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2421         }
2422
2423         {
2424                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2425                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2426                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2427                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2428                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2429                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2430                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2431                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2432                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2433                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2434                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2435                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2436                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2437
2438                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2439                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2440                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2441                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2442
2443                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2444                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2445                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2446                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2447
2448                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2449                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2450                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2451                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2452
2453                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2454                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2455
2456                 // Calculate the transmitted A-MPDU count
2457                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2458                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2459
2460                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2461                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2462
2463                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2464                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2465
2466                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2467                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2468
2469                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2470                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2471
2472                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2473                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2474
2475                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2476                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2477
2478                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2479                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2480         }
2481
2482 #ifdef DBG_DIAGNOSE
2483         {
2484                 RtmpDiagStruct  *pDiag;
2485                 COUNTER_RALINK  *pRalinkCounters;
2486                 UCHAR                   ArrayCurIdx, i;
2487
2488                 pDiag = &pAd->DiagStruct;
2489                 pRalinkCounters = &pAd->RalinkCounters;
2490                 ArrayCurIdx = pDiag->ArrayCurIdx;
2491
2492                 if (pDiag->inited == 0)
2493                 {
2494                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2495                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2496                         pDiag->inited = 1;
2497                 }
2498                 else
2499                 {
2500                         // Tx
2501                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2502                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2503                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2504                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2505                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2506                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2507                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2508                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2509                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2510                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2511                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2512                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2513                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2514                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2515                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2516                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2517                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2518                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2519                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2520
2521                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2522
2523                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2524                         ArrayCurIdx = pDiag->ArrayCurIdx;
2525                         for (i =0; i < 9; i++)
2526                         {
2527                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2528                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2529                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2530                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2531                         }
2532                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2533                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2534                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2535                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2536                         for (i = 9; i < 24; i++) // 3*3
2537                         {
2538                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2539                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2540                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2541 }
2542
2543                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2544                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2545                 }
2546
2547         }
2548 #endif // DBG_DIAGNOSE //
2549
2550
2551 }
2552
2553
2554 /*
2555         ========================================================================
2556
2557         Routine Description:
2558                 Reset NIC from error
2559
2560         Arguments:
2561                 Adapter                                         Pointer to our adapter
2562
2563         Return Value:
2564                 None
2565
2566         IRQL = PASSIVE_LEVEL
2567
2568         Note:
2569                 Reset NIC from error state
2570
2571         ========================================================================
2572 */
2573 VOID    NICResetFromError(
2574         IN      PRTMP_ADAPTER   pAd)
2575 {
2576         // Reset BBP (according to alex, reset ASIC will force reset BBP
2577         // Therefore, skip the reset BBP
2578         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2579
2580         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2581         // Remove ASIC from reset state
2582         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2583
2584         NICInitializeAdapter(pAd, FALSE);
2585         NICInitAsicFromEEPROM(pAd);
2586
2587         // Switch to current channel, since during reset process, the connection should remains on.
2588         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2589         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2590 }
2591
2592 /*
2593         ========================================================================
2594
2595         Routine Description:
2596                 erase 8051 firmware image in MAC ASIC
2597
2598         Arguments:
2599                 Adapter                                         Pointer to our adapter
2600
2601         IRQL = PASSIVE_LEVEL
2602
2603         ========================================================================
2604 */
2605 VOID NICEraseFirmware(
2606         IN PRTMP_ADAPTER pAd)
2607 {
2608         ULONG i;
2609
2610         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2611                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2612
2613 }/* End of NICEraseFirmware */
2614
2615 /*
2616         ========================================================================
2617
2618         Routine Description:
2619                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2620
2621         Arguments:
2622                 Adapter                                         Pointer to our adapter
2623
2624         Return Value:
2625                 NDIS_STATUS_SUCCESS         firmware image load ok
2626                 NDIS_STATUS_FAILURE         image not found
2627
2628         IRQL = PASSIVE_LEVEL
2629
2630         ========================================================================
2631 */
2632 NDIS_STATUS NICLoadFirmware(
2633         IN PRTMP_ADAPTER pAd)
2634 {
2635         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2636         PUCHAR                  pFirmwareImage;
2637         ULONG                   FileLength, Index;
2638         //ULONG                 firm;
2639         UINT32                  MacReg = 0;
2640
2641         pFirmwareImage = FirmwareImage;
2642         FileLength = sizeof(FirmwareImage);
2643         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2644
2645         /* check if MCU is ready */
2646         Index = 0;
2647         do
2648         {
2649                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2650
2651                 if (MacReg & 0x80)
2652                         break;
2653
2654                 RTMPusecDelay(1000);
2655         } while (Index++ < 1000);
2656
2657     if (Index >= 1000)
2658         {
2659                 Status = NDIS_STATUS_FAILURE;
2660                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2661         } /* End of if */
2662
2663     DBGPRINT(RT_DEBUG_TRACE,
2664                          ("<=== %s (status=%d)\n", __func__, Status));
2665     return Status;
2666 } /* End of NICLoadFirmware */
2667
2668
2669 /*
2670         ========================================================================
2671
2672         Routine Description:
2673                 Load Tx rate switching parameters
2674
2675         Arguments:
2676                 Adapter                                         Pointer to our adapter
2677
2678         Return Value:
2679                 NDIS_STATUS_SUCCESS         firmware image load ok
2680                 NDIS_STATUS_FAILURE         image not found
2681
2682         IRQL = PASSIVE_LEVEL
2683
2684         Rate Table Format:
2685                 1. (B0: Valid Item number) (B1:Initial item from zero)
2686                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2687
2688         ========================================================================
2689 */
2690 NDIS_STATUS NICLoadRateSwitchingParams(
2691         IN PRTMP_ADAPTER pAd)
2692 {
2693         return NDIS_STATUS_SUCCESS;
2694 }
2695
2696 /*
2697         ========================================================================
2698
2699         Routine Description:
2700                 if  pSrc1 all zero with length Length, return 0.
2701                 If not all zero, return 1
2702
2703         Arguments:
2704                 pSrc1
2705
2706         Return Value:
2707                 1:                      not all zero
2708                 0:                      all zero
2709
2710         IRQL = DISPATCH_LEVEL
2711
2712         Note:
2713
2714         ========================================================================
2715 */
2716 ULONG   RTMPNotAllZero(
2717         IN      PVOID   pSrc1,
2718         IN      ULONG   Length)
2719 {
2720         PUCHAR  pMem1;
2721         ULONG   Index = 0;
2722
2723         pMem1 = (PUCHAR) pSrc1;
2724
2725         for (Index = 0; Index < Length; Index++)
2726         {
2727                 if (pMem1[Index] != 0x0)
2728                 {
2729                         break;
2730                 }
2731         }
2732
2733         if (Index == Length)
2734         {
2735                 return (0);
2736         }
2737         else
2738         {
2739                 return (1);
2740         }
2741 }
2742
2743 /*
2744         ========================================================================
2745
2746         Routine Description:
2747                 Compare two memory block
2748
2749         Arguments:
2750                 pSrc1           Pointer to first memory address
2751                 pSrc2           Pointer to second memory address
2752
2753         Return Value:
2754                 0:                      memory is equal
2755                 1:                      pSrc1 memory is larger
2756                 2:                      pSrc2 memory is larger
2757
2758         IRQL = DISPATCH_LEVEL
2759
2760         Note:
2761
2762         ========================================================================
2763 */
2764 ULONG   RTMPCompareMemory(
2765         IN      PVOID   pSrc1,
2766         IN      PVOID   pSrc2,
2767         IN      ULONG   Length)
2768 {
2769         PUCHAR  pMem1;
2770         PUCHAR  pMem2;
2771         ULONG   Index = 0;
2772
2773         pMem1 = (PUCHAR) pSrc1;
2774         pMem2 = (PUCHAR) pSrc2;
2775
2776         for (Index = 0; Index < Length; Index++)
2777         {
2778                 if (pMem1[Index] > pMem2[Index])
2779                         return (1);
2780                 else if (pMem1[Index] < pMem2[Index])
2781                         return (2);
2782         }
2783
2784         // Equal
2785         return (0);
2786 }
2787
2788 /*
2789         ========================================================================
2790
2791         Routine Description:
2792                 Zero out memory block
2793
2794         Arguments:
2795                 pSrc1           Pointer to memory address
2796                 Length          Size
2797
2798         Return Value:
2799                 None
2800
2801         IRQL = PASSIVE_LEVEL
2802         IRQL = DISPATCH_LEVEL
2803
2804         Note:
2805
2806         ========================================================================
2807 */
2808 VOID    RTMPZeroMemory(
2809         IN      PVOID   pSrc,
2810         IN      ULONG   Length)
2811 {
2812         PUCHAR  pMem;
2813         ULONG   Index = 0;
2814
2815         pMem = (PUCHAR) pSrc;
2816
2817         for (Index = 0; Index < Length; Index++)
2818         {
2819                 pMem[Index] = 0x00;
2820         }
2821 }
2822
2823 VOID    RTMPFillMemory(
2824         IN      PVOID   pSrc,
2825         IN      ULONG   Length,
2826         IN      UCHAR   Fill)
2827 {
2828         PUCHAR  pMem;
2829         ULONG   Index = 0;
2830
2831         pMem = (PUCHAR) pSrc;
2832
2833         for (Index = 0; Index < Length; Index++)
2834         {
2835                 pMem[Index] = Fill;
2836         }
2837 }
2838
2839 /*
2840         ========================================================================
2841
2842         Routine Description:
2843                 Copy data from memory block 1 to memory block 2
2844
2845         Arguments:
2846                 pDest           Pointer to destination memory address
2847                 pSrc            Pointer to source memory address
2848                 Length          Copy size
2849
2850         Return Value:
2851                 None
2852
2853         IRQL = PASSIVE_LEVEL
2854         IRQL = DISPATCH_LEVEL
2855
2856         Note:
2857
2858         ========================================================================
2859 */
2860 VOID    RTMPMoveMemory(
2861         OUT     PVOID   pDest,
2862         IN      PVOID   pSrc,
2863         IN      ULONG   Length)
2864 {
2865         PUCHAR  pMem1;
2866         PUCHAR  pMem2;
2867         UINT    Index;
2868
2869         ASSERT((Length==0) || (pDest && pSrc));
2870
2871         pMem1 = (PUCHAR) pDest;
2872         pMem2 = (PUCHAR) pSrc;
2873
2874         for (Index = 0; Index < Length; Index++)
2875         {
2876                 pMem1[Index] = pMem2[Index];
2877         }
2878 }
2879
2880 /*
2881         ========================================================================
2882
2883         Routine Description:
2884                 Initialize port configuration structure
2885
2886         Arguments:
2887                 Adapter                                         Pointer to our adapter
2888
2889         Return Value:
2890                 None
2891
2892         IRQL = PASSIVE_LEVEL
2893
2894         Note:
2895
2896         ========================================================================
2897 */
2898 VOID    UserCfgInit(
2899         IN      PRTMP_ADAPTER pAd)
2900 {
2901     UINT key_index, bss_index;
2902
2903         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2904
2905         //
2906         //  part I. intialize common configuration
2907         //
2908
2909         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2910         {
2911                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2912                 {
2913                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2914                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2915                 }
2916         }
2917
2918         pAd->Antenna.word = 0;
2919         pAd->CommonCfg.BBPCurrentBW = BW_20;
2920
2921         pAd->LedCntl.word = 0;
2922         pAd->LedIndicatorStregth = 0;
2923         pAd->RLnkCtrlOffset = 0;
2924         pAd->HostLnkCtrlOffset = 0;
2925         pAd->CheckDmaBusyCount = 0;
2926
2927         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2928         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2929         pAd->RfIcType = RFIC_2820;
2930
2931         // Init timer for reset complete event
2932         pAd->CommonCfg.CentralChannel = 1;
2933         pAd->bForcePrintTX = FALSE;
2934         pAd->bForcePrintRX = FALSE;
2935         pAd->bStaFifoTest = FALSE;
2936         pAd->bProtectionTest = FALSE;
2937         pAd->bHCCATest = FALSE;
2938         pAd->bGenOneHCCA = FALSE;
2939         pAd->CommonCfg.Dsifs = 10;      // in units of usec
2940         pAd->CommonCfg.TxPower = 100; //mW
2941         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2942         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2943         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2944         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2945         pAd->CommonCfg.RtsThreshold = 2347;
2946         pAd->CommonCfg.FragmentThreshold = 2346;
2947         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2948         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2949         pAd->CommonCfg.PhyMode = 0xff;     // unknown
2950         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2951         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2952         pAd->CommonCfg.RadarDetect.CSCount = 0;
2953         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2954         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2955         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2956         pAd->CommonCfg.bAPSDCapable = FALSE;
2957         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2958         pAd->CommonCfg.TriggerTimerCount = 0;
2959         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2960         pAd->CommonCfg.bCountryFlag = FALSE;
2961         pAd->CommonCfg.TxStream = 0;
2962         pAd->CommonCfg.RxStream = 0;
2963
2964         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2965
2966 #ifdef DOT11_N_SUPPORT
2967         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2968         pAd->HTCEnable = FALSE;
2969         pAd->bBroadComHT = FALSE;
2970         pAd->CommonCfg.bRdg = FALSE;
2971
2972 #ifdef DOT11N_DRAFT3
2973         pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;   // Unit : TU. 5~1000
2974         pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;     // Unit : TU. 10~1000
2975         pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;  // Unit : Second
2976         pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;       // Unit : TU. 200~10000
2977         pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
2978         pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
2979         pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;       // Unit : percentage
2980         pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
2981 #endif  // DOT11N_DRAFT3 //
2982
2983         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2984         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2985         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2986         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2987         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2988         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2989         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2990
2991         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2992         BATableInit(pAd, &pAd->BATable);
2993
2994         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2995         pAd->CommonCfg.bHTProtect = 1;
2996         pAd->CommonCfg.bMIMOPSEnable = TRUE;
2997         pAd->CommonCfg.bBADecline = FALSE;
2998         pAd->CommonCfg.bDisableReordering = FALSE;
2999
3000         pAd->CommonCfg.TxBASize = 7;
3001
3002         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3003 #endif // DOT11_N_SUPPORT //
3004
3005         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3006         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3007         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3008         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3009         pAd->CommonCfg.TxRate = RATE_6;
3010
3011         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3012         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3013         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3014
3015         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3016
3017         //
3018         // part II. intialize STA specific configuration
3019         //
3020 #ifdef CONFIG_STA_SUPPORT
3021         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3022         {
3023                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3024                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3025                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3026                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3027
3028                 pAd->StaCfg.Psm = PWR_ACTIVE;
3029
3030                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3031                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3032                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3033                 pAd->StaCfg.bMixCipher = FALSE;
3034                 pAd->StaCfg.DefaultKeyId = 0;
3035
3036                 // 802.1x port control
3037                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3038                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3039                 pAd->StaCfg.LastMicErrorTime = 0;
3040                 pAd->StaCfg.MicErrCnt        = 0;
3041                 pAd->StaCfg.bBlockAssoc      = FALSE;
3042                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3043
3044                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3045
3046                 pAd->StaCfg.RssiTrigger = 0;
3047                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3048                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3049                 pAd->StaCfg.AtimWin = 0;
3050                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3051                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3052                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3053                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3054                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3055
3056                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3057                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3058         }
3059 #endif // CONFIG_STA_SUPPORT //
3060
3061         // global variables mXXXX used in MAC protocol state machines
3062         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3063         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3064         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3065
3066         // PHY specification
3067         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3068         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3069
3070 #ifdef CONFIG_STA_SUPPORT
3071         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3072         {
3073                 // user desired power mode
3074                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3075                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3076                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3077
3078 #ifdef LEAP_SUPPORT
3079                 // CCX v1.0 releated init value
3080                 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3081                 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3082                 pAd->StaCfg.bCkipOn = FALSE;
3083 #endif // LEAP_SUPPORT //
3084
3085                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3086                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3087
3088                 // Patch for Ndtest
3089                 pAd->StaCfg.ScanCnt = 0;
3090
3091                 // CCX 2.0 control flag init
3092                 pAd->StaCfg.CCXEnable = FALSE;
3093                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3094                 pAd->StaCfg.CCXQosECWMin        = 4;
3095                 pAd->StaCfg.CCXQosECWMax        = 10;
3096
3097                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3098                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3099                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3100                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3101                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3102
3103                 // Nitro mode control
3104                 pAd->StaCfg.bAutoReconnect = TRUE;
3105
3106                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3107                 // This patch is for driver wake up from standby mode, system will do scan right away.
3108                 pAd->StaCfg.LastScanTime = 0;
3109                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3110                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3111                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3112 #ifdef WPA_SUPPLICANT_SUPPORT
3113                 pAd->StaCfg.IEEE8021X = FALSE;
3114                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3115                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3116 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3117                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3118 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3119 #endif // WPA_SUPPLICANT_SUPPORT //
3120
3121         }
3122 #endif // CONFIG_STA_SUPPORT //
3123
3124         // Default for extra information is not valid
3125         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3126
3127         // Default Config change flag
3128         pAd->bConfigChanged = FALSE;
3129
3130         //
3131         // part III. AP configurations
3132         //
3133
3134
3135         //
3136         // part IV. others
3137         //
3138         // dynamic BBP R66:sensibity tuning to overcome background noise
3139         pAd->BbpTuning.bEnable                = TRUE;
3140         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3141         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3142         pAd->BbpTuning.R66Delta               = 4;
3143         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3144
3145         //
3146         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3147         // if not initial this value, the default value will be 0.
3148         //
3149         pAd->BbpTuning.R66CurrentValue = 0x38;
3150
3151         pAd->Bbp94 = BBPR94_DEFAULT;
3152         pAd->BbpForCCK = FALSE;
3153
3154         // initialize MAC table and allocate spin lock
3155         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3156         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3157         NdisAllocateSpinLock(&pAd->MacTabLock);
3158
3159         pAd->CommonCfg.bWiFiTest = FALSE;
3160         pAd->bPCIclkOff = FALSE;
3161
3162         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3163         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3164 }
3165
3166 // IRQL = PASSIVE_LEVEL
3167 UCHAR BtoH(char ch)
3168 {
3169         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3170         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3171         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3172         return(255);
3173 }
3174
3175 //
3176 //  FUNCTION: AtoH(char *, UCHAR *, int)
3177 //
3178 //  PURPOSE:  Converts ascii string to network order hex
3179 //
3180 //  PARAMETERS:
3181 //    src    - pointer to input ascii string
3182 //    dest   - pointer to output hex
3183 //    destlen - size of dest
3184 //
3185 //  COMMENTS:
3186 //
3187 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3188 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3189 //
3190 // IRQL = PASSIVE_LEVEL
3191
3192 void AtoH(char * src, UCHAR * dest, int destlen)
3193 {
3194         char * srcptr;
3195         PUCHAR destTemp;
3196
3197         srcptr = src;
3198         destTemp = (PUCHAR) dest;
3199
3200         while(destlen--)
3201         {
3202                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3203                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3204                 destTemp++;
3205         }
3206 }
3207
3208 VOID    RTMPPatchMacBbpBug(
3209         IN      PRTMP_ADAPTER   pAd)
3210 {
3211         ULONG   Index;
3212
3213         // Initialize BBP register to default value
3214         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3215         {
3216                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3217         }
3218
3219         // Initialize RF register to default value
3220         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3221         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3222
3223         // Re-init BBP register from EEPROM value
3224         NICInitAsicFromEEPROM(pAd);
3225 }
3226
3227 /*
3228         ========================================================================
3229
3230         Routine Description:
3231                 Init timer objects
3232
3233         Arguments:
3234                 pAd                     Pointer to our adapter
3235                 pTimer                          Timer structure
3236                 pTimerFunc                      Function to execute when timer expired
3237                 Repeat                          Ture for period timer
3238
3239         Return Value:
3240                 None
3241
3242         Note:
3243
3244         ========================================================================
3245 */
3246 VOID    RTMPInitTimer(
3247         IN      PRTMP_ADAPTER                   pAd,
3248         IN      PRALINK_TIMER_STRUCT    pTimer,
3249         IN      PVOID                                   pTimerFunc,
3250         IN      PVOID                                   pData,
3251         IN      BOOLEAN                                 Repeat)
3252 {
3253         //
3254         // Set Valid to TRUE for later used.
3255         // It will crash if we cancel a timer or set a timer
3256         // that we haven't initialize before.
3257         //
3258         pTimer->Valid      = TRUE;
3259
3260         pTimer->PeriodicType = Repeat;
3261         pTimer->State      = FALSE;
3262         pTimer->cookie = (ULONG) pData;
3263
3264
3265         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3266 }
3267
3268 /*
3269         ========================================================================
3270
3271         Routine Description:
3272                 Init timer objects
3273
3274         Arguments:
3275                 pTimer                          Timer structure
3276                 Value                           Timer value in milliseconds
3277
3278         Return Value:
3279                 None
3280
3281         Note:
3282                 To use this routine, must call RTMPInitTimer before.
3283
3284         ========================================================================
3285 */
3286 VOID    RTMPSetTimer(
3287         IN      PRALINK_TIMER_STRUCT    pTimer,
3288         IN      ULONG                                   Value)
3289 {
3290         if (pTimer->Valid)
3291         {
3292                 pTimer->TimerValue = Value;
3293                 pTimer->State      = FALSE;
3294                 if (pTimer->PeriodicType == TRUE)
3295                 {
3296                         pTimer->Repeat = TRUE;
3297                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3298                 }
3299                 else
3300                 {
3301                         pTimer->Repeat = FALSE;
3302                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3303                 }
3304         }
3305         else
3306         {
3307                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3308         }
3309 }
3310
3311
3312 /*
3313         ========================================================================
3314
3315         Routine Description:
3316                 Init timer objects
3317
3318         Arguments:
3319                 pTimer                          Timer structure
3320                 Value                           Timer value in milliseconds
3321
3322         Return Value:
3323                 None
3324
3325         Note:
3326                 To use this routine, must call RTMPInitTimer before.
3327
3328         ========================================================================
3329 */
3330 VOID    RTMPModTimer(
3331         IN      PRALINK_TIMER_STRUCT    pTimer,
3332         IN      ULONG                                   Value)
3333 {
3334         BOOLEAN Cancel;
3335
3336         if (pTimer->Valid)
3337         {
3338                 pTimer->TimerValue = Value;
3339                 pTimer->State      = FALSE;
3340                 if (pTimer->PeriodicType == TRUE)
3341                 {
3342                         RTMPCancelTimer(pTimer, &Cancel);
3343                         RTMPSetTimer(pTimer, Value);
3344                 }
3345                 else
3346                 {
3347                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3348                 }
3349         }
3350         else
3351         {
3352                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3353         }
3354 }
3355
3356 /*
3357         ========================================================================
3358
3359         Routine Description:
3360                 Cancel timer objects
3361
3362         Arguments:
3363                 Adapter                                         Pointer to our adapter
3364
3365         Return Value:
3366                 None
3367
3368         IRQL = PASSIVE_LEVEL
3369         IRQL = DISPATCH_LEVEL
3370
3371         Note:
3372                 1.) To use this routine, must call RTMPInitTimer before.
3373                 2.) Reset NIC to initial state AS IS system boot up time.
3374
3375         ========================================================================
3376 */
3377 VOID    RTMPCancelTimer(
3378         IN      PRALINK_TIMER_STRUCT    pTimer,
3379         OUT     BOOLEAN                                 *pCancelled)
3380 {
3381         if (pTimer->Valid)
3382         {
3383                 if (pTimer->State == FALSE)
3384                         pTimer->Repeat = FALSE;
3385                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3386
3387                 if (*pCancelled == TRUE)
3388                         pTimer->State = TRUE;
3389
3390         }
3391         else
3392         {
3393                 //
3394                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3395                 // And don't set the "Valid" to False. So that we can use this timer again.
3396                 //
3397                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3398         }
3399 }
3400
3401 /*
3402         ========================================================================
3403
3404         Routine Description:
3405                 Set LED Status
3406
3407         Arguments:
3408                 pAd                                             Pointer to our adapter
3409                 Status                                  LED Status
3410
3411         Return Value:
3412                 None
3413
3414         IRQL = PASSIVE_LEVEL
3415         IRQL = DISPATCH_LEVEL
3416
3417         Note:
3418
3419         ========================================================================
3420 */
3421 VOID RTMPSetLED(
3422         IN PRTMP_ADAPTER        pAd,
3423         IN UCHAR                        Status)
3424 {
3425         //ULONG                 data;
3426         UCHAR                   HighByte = 0;
3427         UCHAR                   LowByte;
3428
3429         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3430         switch (Status)
3431         {
3432                 case LED_LINK_DOWN:
3433                         HighByte = 0x20;
3434                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3435                         pAd->LedIndicatorStregth = 0;
3436                         break;
3437                 case LED_LINK_UP:
3438                         if (pAd->CommonCfg.Channel > 14)
3439                                 HighByte = 0xa0;
3440                         else
3441                                 HighByte = 0x60;
3442                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3443                         break;
3444                 case LED_RADIO_ON:
3445                         HighByte = 0x20;
3446                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3447                         break;
3448                 case LED_HALT:
3449                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3450                 case LED_RADIO_OFF:
3451                         HighByte = 0;
3452                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3453                         break;
3454         case LED_WPS:
3455                         HighByte = 0x10;
3456                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3457                         break;
3458                 case LED_ON_SITE_SURVEY:
3459                         HighByte = 0x08;
3460                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3461                         break;
3462                 case LED_POWER_UP:
3463                         HighByte = 0x04;
3464                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3465                         break;
3466                 default:
3467                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3468                         break;
3469         }
3470
3471     //
3472         // Keep LED status for LED SiteSurvey mode.
3473         // After SiteSurvey, we will set the LED mode to previous status.
3474         //
3475         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3476                 pAd->LedStatus = Status;
3477
3478         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3479 }
3480
3481 /*
3482         ========================================================================
3483
3484         Routine Description:
3485                 Set LED Signal Stregth
3486
3487         Arguments:
3488                 pAd                                             Pointer to our adapter
3489                 Dbm                                             Signal Stregth
3490
3491         Return Value:
3492                 None
3493
3494         IRQL = PASSIVE_LEVEL
3495
3496         Note:
3497                 Can be run on any IRQL level.
3498
3499                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3500                 <= -90  No Signal
3501                 <= -81  Very Low
3502                 <= -71  Low
3503                 <= -67  Good
3504                 <= -57  Very Good
3505                  > -57  Excellent
3506         ========================================================================
3507 */
3508 VOID RTMPSetSignalLED(
3509         IN PRTMP_ADAPTER        pAd,
3510         IN NDIS_802_11_RSSI Dbm)
3511 {
3512         UCHAR           nLed = 0;
3513
3514         //
3515         // if not Signal Stregth, then do nothing.
3516         //
3517         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3518         {
3519                 return;
3520         }
3521
3522         if (Dbm <= -90)
3523                 nLed = 0;
3524         else if (Dbm <= -81)
3525                 nLed = 1;
3526         else if (Dbm <= -71)
3527                 nLed = 3;
3528         else if (Dbm <= -67)
3529                 nLed = 7;
3530         else if (Dbm <= -57)
3531                 nLed = 15;
3532         else
3533                 nLed = 31;
3534
3535         //
3536         // Update Signal Stregth to firmware if changed.
3537         //
3538         if (pAd->LedIndicatorStregth != nLed)
3539         {
3540                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3541                 pAd->LedIndicatorStregth = nLed;
3542         }
3543 }
3544
3545 /*
3546         ========================================================================
3547
3548         Routine Description:
3549                 Enable RX
3550
3551         Arguments:
3552                 pAd                                             Pointer to our adapter
3553
3554         Return Value:
3555                 None
3556
3557         IRQL <= DISPATCH_LEVEL
3558
3559         Note:
3560                 Before Enable RX, make sure you have enabled Interrupt.
3561         ========================================================================
3562 */
3563 VOID RTMPEnableRxTx(
3564         IN PRTMP_ADAPTER        pAd)
3565 {
3566         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3567
3568         // Enable Rx DMA.
3569         RT28XXDMAEnable(pAd);
3570
3571         // enable RX of MAC block
3572         if (pAd->OpMode == OPMODE_AP)
3573         {
3574                 UINT32 rx_filter_flag = APNORMAL;
3575
3576
3577                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3578         }
3579         else
3580         {
3581                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3582         }
3583
3584         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3585         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3586 }
3587
3588