git.oblomov.eu Git - linux-2.6/blob - drivers/usb/gadget/pxa2xx_udc.c

   1 /*
   2  * linux/drivers/usb/gadget/pxa2xx_udc.c
   3  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
   4  *
   5  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
   6  * Copyright (C) 2003 Robert Schwebel, Pengutronix
   7  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
   8  * Copyright (C) 2003 David Brownell
   9  * Copyright (C) 2003 Joshua Wise
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24  *
  25  */
  26
  27 // #define      VERBOSE DBG_VERBOSE
  28
  29 #include <linux/device.h>
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/ioport.h>
  33 #include <linux/types.h>
  34 #include <linux/errno.h>
  35 #include <linux/delay.h>
  36 #include <linux/slab.h>
  37 #include <linux/init.h>
  38 #include <linux/timer.h>
  39 #include <linux/list.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/proc_fs.h>
  42 #include <linux/mm.h>
  43 #include <linux/platform_device.h>
  44 #include <linux/dma-mapping.h>
  45 #include <linux/irq.h>
  46 #include <linux/clk.h>
  47 #include <linux/err.h>
  48
  49 #include <asm/byteorder.h>
  50 #include <asm/dma.h>
  51 #include <asm/gpio.h>
  52 #include <asm/io.h>
  53 #include <asm/system.h>
  54 #include <asm/mach-types.h>
  55 #include <asm/unaligned.h>
  56 #include <asm/hardware.h>
  57
  58 #include <linux/usb/ch9.h>
  59 #include <linux/usb/gadget.h>
  60
  61 #include <asm/mach/udc_pxa2xx.h>
  62
  63
  64 /*
  65  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
  66  * series processors.  The UDC for the IXP 4xx series is very similar.
  67  * There are fifteen endpoints, in addition to ep0.
  68  *
  69  * Such controller drivers work with a gadget driver.  The gadget driver
  70  * returns descriptors, implements configuration and data protocols used
  71  * by the host to interact with this device, and allocates endpoints to
  72  * the different protocol interfaces.  The controller driver virtualizes
  73  * usb hardware so that the gadget drivers will be more portable.
  74  *
  75  * This UDC hardware wants to implement a bit too much USB protocol, so
  76  * it constrains the sorts of USB configuration change events that work.
  77  * The errata for these chips are misleading; some "fixed" bugs from
  78  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
  79  *
  80  * Note that the UDC hardware supports DMA (except on IXP) but that's
  81  * not used here.  IN-DMA (to host) is simple enough, when the data is
  82  * suitably aligned (16 bytes) ... the network stack doesn't do that,
  83  * other software can.  OUT-DMA is buggy in most chip versions, as well
  84  * as poorly designed (data toggle not automatic).  So this driver won't
  85  * bother using DMA.  (Mostly-working IN-DMA support was available in
  86  * kernels before 2.6.23, but was never enabled or well tested.)
  87  */
  88
  89 #define DRIVER_VERSION  "30-June-2007"
  90 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
  91
  92
  93 static const char driver_name [] = "pxa2xx_udc";
  94
  95 static const char ep0name [] = "ep0";
  96
  97
  98 #ifdef CONFIG_ARCH_IXP4XX
  99
 100 /* cpu-specific register addresses are compiled in to this code */
 101 #ifdef CONFIG_ARCH_PXA
 102 #error "Can't configure both IXP and PXA"
 103 #endif
 104
 105 #endif
 106
 107 #include "pxa2xx_udc.h"
 108
 109
 110 #ifdef  CONFIG_USB_PXA2XX_SMALL
 111 #define SIZE_STR        " (small)"
 112 #else
 113 #define SIZE_STR        ""
 114 #endif
 115
 116 /* ---------------------------------------------------------------------------
 117  *      endpoint related parts of the api to the usb controller hardware,
 118  *      used by gadget driver; and the inner talker-to-hardware core.
 119  * ---------------------------------------------------------------------------
 120  */
 121
 122 static void pxa2xx_ep_fifo_flush (struct usb_ep *ep);
 123 static void nuke (struct pxa2xx_ep *, int status);
 124
 125 /* one GPIO should be used to detect VBUS from the host */
 126 static int is_vbus_present(void)
 127 {
 128         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 129
 130         if (mach->gpio_vbus)
 131                 return gpio_get_value(mach->gpio_vbus);
 132         if (mach->udc_is_connected)
 133                 return mach->udc_is_connected();
 134         return 1;
 135 }
 136
 137 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
 138 static void pullup_off(void)
 139 {
 140         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 141
 142         if (mach->gpio_pullup)
 143                 gpio_set_value(mach->gpio_pullup, 0);
 144         else if (mach->udc_command)
 145                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 146 }
 147
 148 static void pullup_on(void)
 149 {
 150         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 151
 152         if (mach->gpio_pullup)
 153                 gpio_set_value(mach->gpio_pullup, 1);
 154         else if (mach->udc_command)
 155                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 156 }
 157
 158 static void pio_irq_enable(int bEndpointAddress)
 159 {
 160         bEndpointAddress &= 0xf;
 161         if (bEndpointAddress < 8)
 162                 UICR0 &= ~(1 << bEndpointAddress);
 163         else {
 164                 bEndpointAddress -= 8;
 165                 UICR1 &= ~(1 << bEndpointAddress);
 166         }
 167 }
 168
 169 static void pio_irq_disable(int bEndpointAddress)
 170 {
 171         bEndpointAddress &= 0xf;
 172         if (bEndpointAddress < 8)
 173                 UICR0 |= 1 << bEndpointAddress;
 174         else {
 175                 bEndpointAddress -= 8;
 176                 UICR1 |= 1 << bEndpointAddress;
 177         }
 178 }
 179
 180 /* The UDCCR reg contains mask and interrupt status bits,
 181  * so using '|=' isn't safe as it may ack an interrupt.
 182  */
 183 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
 184
 185 static inline void udc_set_mask_UDCCR(int mask)
 186 {
 187         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
 188 }
 189
 190 static inline void udc_clear_mask_UDCCR(int mask)
 191 {
 192         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
 193 }
 194
 195 static inline void udc_ack_int_UDCCR(int mask)
 196 {
 197         /* udccr contains the bits we dont want to change */
 198         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
 199
 200         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
 201 }
 202
 203 /*
 204  * endpoint enable/disable
 205  *
 206  * we need to verify the descriptors used to enable endpoints.  since pxa2xx
 207  * endpoint configurations are fixed, and are pretty much always enabled,
 208  * there's not a lot to manage here.
 209  *
 210  * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints,
 211  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
 212  * for a single interface (with only the default altsetting) and for gadget
 213  * drivers that don't halt endpoints (not reset by set_interface).  that also
 214  * means that if you use ISO, you must violate the USB spec rule that all
 215  * iso endpoints must be in non-default altsettings.
 216  */
 217 static int pxa2xx_ep_enable (struct usb_ep *_ep,
 218                 const struct usb_endpoint_descriptor *desc)
 219 {
 220         struct pxa2xx_ep        *ep;
 221         struct pxa2xx_udc       *dev;
 222
 223         ep = container_of (_ep, struct pxa2xx_ep, ep);
 224         if (!_ep || !desc || ep->desc || _ep->name == ep0name
 225                         || desc->bDescriptorType != USB_DT_ENDPOINT
 226                         || ep->bEndpointAddress != desc->bEndpointAddress
 227                         || ep->fifo_size < le16_to_cpu
 228                                                 (desc->wMaxPacketSize)) {
 229                 DMSG("%s, bad ep or descriptor\n", __FUNCTION__);
 230                 return -EINVAL;
 231         }
 232
 233         /* xfer types must match, except that interrupt ~= bulk */
 234         if (ep->bmAttributes != desc->bmAttributes
 235                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 236                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 237                 DMSG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
 238                 return -EINVAL;
 239         }
 240
 241         /* hardware _could_ do smaller, but driver doesn't */
 242         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 243                                 && le16_to_cpu (desc->wMaxPacketSize)
 244                                                 != BULK_FIFO_SIZE)
 245                         || !desc->wMaxPacketSize) {
 246                 DMSG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
 247                 return -ERANGE;
 248         }
 249
 250         dev = ep->dev;
 251         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
 252                 DMSG("%s, bogus device state\n", __FUNCTION__);
 253                 return -ESHUTDOWN;
 254         }
 255
 256         ep->desc = desc;
 257         ep->stopped = 0;
 258         ep->pio_irqs = 0;
 259         ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
 260
 261         /* flush fifo (mostly for OUT buffers) */
 262         pxa2xx_ep_fifo_flush (_ep);
 263
 264         /* ... reset halt state too, if we could ... */
 265
 266         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
 267         return 0;
 268 }
 269
 270 static int pxa2xx_ep_disable (struct usb_ep *_ep)
 271 {
 272         struct pxa2xx_ep        *ep;
 273         unsigned long           flags;
 274
 275         ep = container_of (_ep, struct pxa2xx_ep, ep);
 276         if (!_ep || !ep->desc) {
 277                 DMSG("%s, %s not enabled\n", __FUNCTION__,
 278                         _ep ? ep->ep.name : NULL);
 279                 return -EINVAL;
 280         }
 281         local_irq_save(flags);
 282
 283         nuke (ep, -ESHUTDOWN);
 284
 285         /* flush fifo (mostly for IN buffers) */
 286         pxa2xx_ep_fifo_flush (_ep);
 287
 288         ep->desc = NULL;
 289         ep->stopped = 1;
 290
 291         local_irq_restore(flags);
 292         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
 293         return 0;
 294 }
 295
 296 /*-------------------------------------------------------------------------*/
 297
 298 /* for the pxa2xx, these can just wrap kmalloc/kfree.  gadget drivers
 299  * must still pass correctly initialized endpoints, since other controller
 300  * drivers may care about how it's currently set up (dma issues etc).
 301  */
 302
 303 /*
 304  *      pxa2xx_ep_alloc_request - allocate a request data structure
 305  */
 306 static struct usb_request *
 307 pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 308 {
 309         struct pxa2xx_request *req;
 310
 311         req = kzalloc(sizeof(*req), gfp_flags);
 312         if (!req)
 313                 return NULL;
 314
 315         INIT_LIST_HEAD (&req->queue);
 316         return &req->req;
 317 }
 318
 319
 320 /*
 321  *      pxa2xx_ep_free_request - deallocate a request data structure
 322  */
 323 static void
 324 pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 325 {
 326         struct pxa2xx_request   *req;
 327
 328         req = container_of (_req, struct pxa2xx_request, req);
 329         WARN_ON (!list_empty (&req->queue));
 330         kfree(req);
 331 }
 332
 333 /*-------------------------------------------------------------------------*/
 334
 335 /*
 336  *      done - retire a request; caller blocked irqs
 337  */
 338 static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status)
 339 {
 340         unsigned                stopped = ep->stopped;
 341
 342         list_del_init(&req->queue);
 343
 344         if (likely (req->req.status == -EINPROGRESS))
 345                 req->req.status = status;
 346         else
 347                 status = req->req.status;
 348
 349         if (status && status != -ESHUTDOWN)
 350                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
 351                         ep->ep.name, &req->req, status,
 352                         req->req.actual, req->req.length);
 353
 354         /* don't modify queue heads during completion callback */
 355         ep->stopped = 1;
 356         req->req.complete(&ep->ep, &req->req);
 357         ep->stopped = stopped;
 358 }
 359
 360
 361 static inline void ep0_idle (struct pxa2xx_udc *dev)
 362 {
 363         dev->ep0state = EP0_IDLE;
 364 }
 365
 366 static int
 367 write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
 368 {
 369         u8              *buf;
 370         unsigned        length, count;
 371
 372         buf = req->req.buf + req->req.actual;
 373         prefetch(buf);
 374
 375         /* how big will this packet be? */
 376         length = min(req->req.length - req->req.actual, max);
 377         req->req.actual += length;
 378
 379         count = length;
 380         while (likely(count--))
 381                 *uddr = *buf++;
 382
 383         return length;
 384 }
 385
 386 /*
 387  * write to an IN endpoint fifo, as many packets as possible.
 388  * irqs will use this to write the rest later.
 389  * caller guarantees at least one packet buffer is ready (or a zlp).
 390  */
 391 static int
 392 write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
 393 {
 394         unsigned                max;
 395
 396         max = le16_to_cpu(ep->desc->wMaxPacketSize);
 397         do {
 398                 unsigned        count;
 399                 int             is_last, is_short;
 400
 401                 count = write_packet(ep->reg_uddr, req, max);
 402
 403                 /* last packet is usually short (or a zlp) */
 404                 if (unlikely (count != max))
 405                         is_last = is_short = 1;
 406                 else {
 407                         if (likely(req->req.length != req->req.actual)
 408                                         || req->req.zero)
 409                                 is_last = 0;
 410                         else
 411                                 is_last = 1;
 412                         /* interrupt/iso maxpacket may not fill the fifo */
 413                         is_short = unlikely (max < ep->fifo_size);
 414                 }
 415
 416                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
 417                         ep->ep.name, count,
 418                         is_last ? "/L" : "", is_short ? "/S" : "",
 419                         req->req.length - req->req.actual, req);
 420
 421                 /* let loose that packet. maybe try writing another one,
 422                  * double buffering might work.  TSP, TPC, and TFS
 423                  * bit values are the same for all normal IN endpoints.
 424                  */
 425                 *ep->reg_udccs = UDCCS_BI_TPC;
 426                 if (is_short)
 427                         *ep->reg_udccs = UDCCS_BI_TSP;
 428
 429                 /* requests complete when all IN data is in the FIFO */
 430                 if (is_last) {
 431                         done (ep, req, 0);
 432                         if (list_empty(&ep->queue))
 433                                 pio_irq_disable (ep->bEndpointAddress);
 434                         return 1;
 435                 }
 436
 437                 // TODO experiment: how robust can fifo mode tweaking be?
 438                 // double buffering is off in the default fifo mode, which
 439                 // prevents TFS from being set here.
 440
 441         } while (*ep->reg_udccs & UDCCS_BI_TFS);
 442         return 0;
 443 }
 444
 445 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
 446  * ep0 data stage.  these chips want very simple state transitions.
 447  */
 448 static inline
 449 void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag)
 450 {
 451         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
 452         USIR0 = USIR0_IR0;
 453         dev->req_pending = 0;
 454         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
 455                 __FUNCTION__, tag, UDCCS0, flags);
 456 }
 457
 458 static int
 459 write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
 460 {
 461         unsigned        count;
 462         int             is_short;
 463
 464         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
 465         ep->dev->stats.write.bytes += count;
 466
 467         /* last packet "must be" short (or a zlp) */
 468         is_short = (count != EP0_FIFO_SIZE);
 469
 470         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
 471                 req->req.length - req->req.actual, req);
 472
 473         if (unlikely (is_short)) {
 474                 if (ep->dev->req_pending)
 475                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
 476                 else
 477                         UDCCS0 = UDCCS0_IPR;
 478
 479                 count = req->req.length;
 480                 done (ep, req, 0);
 481                 ep0_idle(ep->dev);
 482 #ifndef CONFIG_ARCH_IXP4XX
 483 #if 1
 484                 /* This seems to get rid of lost status irqs in some cases:
 485                  * host responds quickly, or next request involves config
 486                  * change automagic, or should have been hidden, or ...
 487                  *
 488                  * FIXME get rid of all udelays possible...
 489                  */
 490                 if (count >= EP0_FIFO_SIZE) {
 491                         count = 100;
 492                         do {
 493                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
 494                                         /* clear OPR, generate ack */
 495                                         UDCCS0 = UDCCS0_OPR;
 496                                         break;
 497                                 }
 498                                 count--;
 499                                 udelay(1);
 500                         } while (count);
 501                 }
 502 #endif
 503 #endif
 504         } else if (ep->dev->req_pending)
 505                 ep0start(ep->dev, 0, "IN");
 506         return is_short;
 507 }
 508
 509
 510 /*
 511  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
 512  * transfers and put them into the request.  caller should have made
 513  * sure there's at least one packet ready.
 514  *
 515  * returns true if the request completed because of short packet or the
 516  * request buffer having filled (and maybe overran till end-of-packet).
 517  */
 518 static int
 519 read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
 520 {
 521         for (;;) {
 522                 u32             udccs;
 523                 u8              *buf;
 524                 unsigned        bufferspace, count, is_short;
 525
 526                 /* make sure there's a packet in the FIFO.
 527                  * UDCCS_{BO,IO}_RPC are all the same bit value.
 528                  * UDCCS_{BO,IO}_RNE are all the same bit value.
 529                  */
 530                 udccs = *ep->reg_udccs;
 531                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
 532                         break;
 533                 buf = req->req.buf + req->req.actual;
 534                 prefetchw(buf);
 535                 bufferspace = req->req.length - req->req.actual;
 536
 537                 /* read all bytes from this packet */
 538                 if (likely (udccs & UDCCS_BO_RNE)) {
 539                         count = 1 + (0x0ff & *ep->reg_ubcr);
 540                         req->req.actual += min (count, bufferspace);
 541                 } else /* zlp */
 542                         count = 0;
 543                 is_short = (count < ep->ep.maxpacket);
 544                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
 545                         ep->ep.name, udccs, count,
 546                         is_short ? "/S" : "",
 547                         req, req->req.actual, req->req.length);
 548                 while (likely (count-- != 0)) {
 549                         u8      byte = (u8) *ep->reg_uddr;
 550
 551                         if (unlikely (bufferspace == 0)) {
 552                                 /* this happens when the driver's buffer
 553                                  * is smaller than what the host sent.
 554                                  * discard the extra data.
 555                                  */
 556                                 if (req->req.status != -EOVERFLOW)
 557                                         DMSG("%s overflow %d\n",
 558                                                 ep->ep.name, count);
 559                                 req->req.status = -EOVERFLOW;
 560                         } else {
 561                                 *buf++ = byte;
 562                                 bufferspace--;
 563                         }
 564                 }
 565                 *ep->reg_udccs =  UDCCS_BO_RPC;
 566                 /* RPC/RSP/RNE could now reflect the other packet buffer */
 567
 568                 /* iso is one request per packet */
 569                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 570                         if (udccs & UDCCS_IO_ROF)
 571                                 req->req.status = -EHOSTUNREACH;
 572                         /* more like "is_done" */
 573                         is_short = 1;
 574                 }
 575
 576                 /* completion */
 577                 if (is_short || req->req.actual == req->req.length) {
 578                         done (ep, req, 0);
 579                         if (list_empty(&ep->queue))
 580                                 pio_irq_disable (ep->bEndpointAddress);
 581                         return 1;
 582                 }
 583
 584                 /* finished that packet.  the next one may be waiting... */
 585         }
 586         return 0;
 587 }
 588
 589 /*
 590  * special ep0 version of the above.  no UBCR0 or double buffering; status
 591  * handshaking is magic.  most device protocols don't need control-OUT.
 592  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
 593  * protocols do use them.
 594  */
 595 static int
 596 read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
 597 {
 598         u8              *buf, byte;
 599         unsigned        bufferspace;
 600
 601         buf = req->req.buf + req->req.actual;
 602         bufferspace = req->req.length - req->req.actual;
 603
 604         while (UDCCS0 & UDCCS0_RNE) {
 605                 byte = (u8) UDDR0;
 606
 607                 if (unlikely (bufferspace == 0)) {
 608                         /* this happens when the driver's buffer
 609                          * is smaller than what the host sent.
 610                          * discard the extra data.
 611                          */
 612                         if (req->req.status != -EOVERFLOW)
 613                                 DMSG("%s overflow\n", ep->ep.name);
 614                         req->req.status = -EOVERFLOW;
 615                 } else {
 616                         *buf++ = byte;
 617                         req->req.actual++;
 618                         bufferspace--;
 619                 }
 620         }
 621
 622         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
 623
 624         /* completion */
 625         if (req->req.actual >= req->req.length)
 626                 return 1;
 627
 628         /* finished that packet.  the next one may be waiting... */
 629         return 0;
 630 }
 631
 632 /*-------------------------------------------------------------------------*/
 633
 634 static int
 635 pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 636 {
 637         struct pxa2xx_request   *req;
 638         struct pxa2xx_ep        *ep;
 639         struct pxa2xx_udc       *dev;
 640         unsigned long           flags;
 641
 642         req = container_of(_req, struct pxa2xx_request, req);
 643         if (unlikely (!_req || !_req->complete || !_req->buf
 644                         || !list_empty(&req->queue))) {
 645                 DMSG("%s, bad params\n", __FUNCTION__);
 646                 return -EINVAL;
 647         }
 648
 649         ep = container_of(_ep, struct pxa2xx_ep, ep);
 650         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
 651                 DMSG("%s, bad ep\n", __FUNCTION__);
 652                 return -EINVAL;
 653         }
 654
 655         dev = ep->dev;
 656         if (unlikely (!dev->driver
 657                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 658                 DMSG("%s, bogus device state\n", __FUNCTION__);
 659                 return -ESHUTDOWN;
 660         }
 661
 662         /* iso is always one packet per request, that's the only way
 663          * we can report per-packet status.  that also helps with dma.
 664          */
 665         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 666                         && req->req.length > le16_to_cpu
 667                                                 (ep->desc->wMaxPacketSize)))
 668                 return -EMSGSIZE;
 669
 670         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
 671                 _ep->name, _req, _req->length, _req->buf);
 672
 673         local_irq_save(flags);
 674
 675         _req->status = -EINPROGRESS;
 676         _req->actual = 0;
 677
 678         /* kickstart this i/o queue? */
 679         if (list_empty(&ep->queue) && !ep->stopped) {
 680                 if (ep->desc == 0 /* ep0 */) {
 681                         unsigned        length = _req->length;
 682
 683                         switch (dev->ep0state) {
 684                         case EP0_IN_DATA_PHASE:
 685                                 dev->stats.write.ops++;
 686                                 if (write_ep0_fifo(ep, req))
 687                                         req = NULL;
 688                                 break;
 689
 690                         case EP0_OUT_DATA_PHASE:
 691                                 dev->stats.read.ops++;
 692                                 /* messy ... */
 693                                 if (dev->req_config) {
 694                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
 695                                                 dev->has_cfr ?  "" : " raced");
 696                                         if (dev->has_cfr)
 697                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
 698                                                         |UDCCFR_MB1;
 699                                         done(ep, req, 0);
 700                                         dev->ep0state = EP0_END_XFER;
 701                                         local_irq_restore (flags);
 702                                         return 0;
 703                                 }
 704                                 if (dev->req_pending)
 705                                         ep0start(dev, UDCCS0_IPR, "OUT");
 706                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
 707                                                 && read_ep0_fifo(ep, req))) {
 708                                         ep0_idle(dev);
 709                                         done(ep, req, 0);
 710                                         req = NULL;
 711                                 }
 712                                 break;
 713
 714                         default:
 715                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
 716                                 local_irq_restore (flags);
 717                                 return -EL2HLT;
 718                         }
 719                 /* can the FIFO can satisfy the request immediately? */
 720                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
 721                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
 722                                         && write_fifo(ep, req))
 723                                 req = NULL;
 724                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
 725                                 && read_fifo(ep, req)) {
 726                         req = NULL;
 727                 }
 728
 729                 if (likely (req && ep->desc))
 730                         pio_irq_enable(ep->bEndpointAddress);
 731         }
 732
 733         /* pio or dma irq handler advances the queue. */
 734         if (likely (req != 0))
 735                 list_add_tail(&req->queue, &ep->queue);
 736         local_irq_restore(flags);
 737
 738         return 0;
 739 }
 740
 741
 742 /*
 743  *      nuke - dequeue ALL requests
 744  */
 745 static void nuke(struct pxa2xx_ep *ep, int status)
 746 {
 747         struct pxa2xx_request *req;
 748
 749         /* called with irqs blocked */
 750         while (!list_empty(&ep->queue)) {
 751                 req = list_entry(ep->queue.next,
 752                                 struct pxa2xx_request,
 753                                 queue);
 754                 done(ep, req, status);
 755         }
 756         if (ep->desc)
 757                 pio_irq_disable (ep->bEndpointAddress);
 758 }
 759
 760
 761 /* dequeue JUST ONE request */
 762 static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 763 {
 764         struct pxa2xx_ep        *ep;
 765         struct pxa2xx_request   *req;
 766         unsigned long           flags;
 767
 768         ep = container_of(_ep, struct pxa2xx_ep, ep);
 769         if (!_ep || ep->ep.name == ep0name)
 770                 return -EINVAL;
 771
 772         local_irq_save(flags);
 773
 774         /* make sure it's actually queued on this endpoint */
 775         list_for_each_entry (req, &ep->queue, queue) {
 776                 if (&req->req == _req)
 777                         break;
 778         }
 779         if (&req->req != _req) {
 780                 local_irq_restore(flags);
 781                 return -EINVAL;
 782         }
 783
 784         done(ep, req, -ECONNRESET);
 785
 786         local_irq_restore(flags);
 787         return 0;
 788 }
 789
 790 /*-------------------------------------------------------------------------*/
 791
 792 static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value)
 793 {
 794         struct pxa2xx_ep        *ep;
 795         unsigned long           flags;
 796
 797         ep = container_of(_ep, struct pxa2xx_ep, ep);
 798         if (unlikely (!_ep
 799                         || (!ep->desc && ep->ep.name != ep0name))
 800                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 801                 DMSG("%s, bad ep\n", __FUNCTION__);
 802                 return -EINVAL;
 803         }
 804         if (value == 0) {
 805                 /* this path (reset toggle+halt) is needed to implement
 806                  * SET_INTERFACE on normal hardware.  but it can't be
 807                  * done from software on the PXA UDC, and the hardware
 808                  * forgets to do it as part of SET_INTERFACE automagic.
 809                  */
 810                 DMSG("only host can clear %s halt\n", _ep->name);
 811                 return -EROFS;
 812         }
 813
 814         local_irq_save(flags);
 815
 816         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
 817                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
 818                            || !list_empty(&ep->queue))) {
 819                 local_irq_restore(flags);
 820                 return -EAGAIN;
 821         }
 822
 823         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
 824         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
 825
 826         /* ep0 needs special care */
 827         if (!ep->desc) {
 828                 start_watchdog(ep->dev);
 829                 ep->dev->req_pending = 0;
 830                 ep->dev->ep0state = EP0_STALL;
 831
 832         /* and bulk/intr endpoints like dropping stalls too */
 833         } else {
 834                 unsigned i;
 835                 for (i = 0; i < 1000; i += 20) {
 836                         if (*ep->reg_udccs & UDCCS_BI_SST)
 837                                 break;
 838                         udelay(20);
 839                 }
 840         }
 841         local_irq_restore(flags);
 842
 843         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
 844         return 0;
 845 }
 846
 847 static int pxa2xx_ep_fifo_status(struct usb_ep *_ep)
 848 {
 849         struct pxa2xx_ep        *ep;
 850
 851         ep = container_of(_ep, struct pxa2xx_ep, ep);
 852         if (!_ep) {
 853                 DMSG("%s, bad ep\n", __FUNCTION__);
 854                 return -ENODEV;
 855         }
 856         /* pxa can't report unclaimed bytes from IN fifos */
 857         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
 858                 return -EOPNOTSUPP;
 859         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
 860                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
 861                 return 0;
 862         else
 863                 return (*ep->reg_ubcr & 0xfff) + 1;
 864 }
 865
 866 static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep)
 867 {
 868         struct pxa2xx_ep        *ep;
 869
 870         ep = container_of(_ep, struct pxa2xx_ep, ep);
 871         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
 872                 DMSG("%s, bad ep\n", __FUNCTION__);
 873                 return;
 874         }
 875
 876         /* toggle and halt bits stay unchanged */
 877
 878         /* for OUT, just read and discard the FIFO contents. */
 879         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
 880                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
 881                         (void) *ep->reg_uddr;
 882                 return;
 883         }
 884
 885         /* most IN status is the same, but ISO can't stall */
 886         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
 887                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
 888                         ? 0 : UDCCS_BI_SST;
 889 }
 890
 891
 892 static struct usb_ep_ops pxa2xx_ep_ops = {
 893         .enable         = pxa2xx_ep_enable,
 894         .disable        = pxa2xx_ep_disable,
 895
 896         .alloc_request  = pxa2xx_ep_alloc_request,
 897         .free_request   = pxa2xx_ep_free_request,
 898
 899         .queue          = pxa2xx_ep_queue,
 900         .dequeue        = pxa2xx_ep_dequeue,
 901
 902         .set_halt       = pxa2xx_ep_set_halt,
 903         .fifo_status    = pxa2xx_ep_fifo_status,
 904         .fifo_flush     = pxa2xx_ep_fifo_flush,
 905 };
 906
 907
 908 /* ---------------------------------------------------------------------------
 909  *      device-scoped parts of the api to the usb controller hardware
 910  * ---------------------------------------------------------------------------
 911  */
 912
 913 static int pxa2xx_udc_get_frame(struct usb_gadget *_gadget)
 914 {
 915         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 916 }
 917
 918 static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget)
 919 {
 920         /* host may not have enabled remote wakeup */
 921         if ((UDCCS0 & UDCCS0_DRWF) == 0)
 922                 return -EHOSTUNREACH;
 923         udc_set_mask_UDCCR(UDCCR_RSM);
 924         return 0;
 925 }
 926
 927 static void stop_activity(struct pxa2xx_udc *, struct usb_gadget_driver *);
 928 static void udc_enable (struct pxa2xx_udc *);
 929 static void udc_disable(struct pxa2xx_udc *);
 930
 931 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
 932  * in active use.
 933  */
 934 static int pullup(struct pxa2xx_udc *udc, int is_active)
 935 {
 936         is_active = is_active && udc->vbus && udc->pullup;
 937         DMSG("%s\n", is_active ? "active" : "inactive");
 938         if (is_active)
 939                 udc_enable(udc);
 940         else {
 941                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
 942                         DMSG("disconnect %s\n", udc->driver
 943                                 ? udc->driver->driver.name
 944                                 : "(no driver)");
 945                         stop_activity(udc, udc->driver);
 946                 }
 947                 udc_disable(udc);
 948         }
 949         return 0;
 950 }
 951
 952 /* VBUS reporting logically comes from a transceiver */
 953 static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 954 {
 955         struct pxa2xx_udc       *udc;
 956
 957         udc = container_of(_gadget, struct pxa2xx_udc, gadget);
 958         udc->vbus = is_active = (is_active != 0);
 959         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
 960         pullup(udc, is_active);
 961         return 0;
 962 }
 963
 964 /* drivers may have software control over D+ pullup */
 965 static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active)
 966 {
 967         struct pxa2xx_udc       *udc;
 968
 969         udc = container_of(_gadget, struct pxa2xx_udc, gadget);
 970
 971         /* not all boards support pullup control */
 972         if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
 973                 return -EOPNOTSUPP;
 974
 975         is_active = (is_active != 0);
 976         udc->pullup = is_active;
 977         pullup(udc, is_active);
 978         return 0;
 979 }
 980
 981 static const struct usb_gadget_ops pxa2xx_udc_ops = {
 982         .get_frame      = pxa2xx_udc_get_frame,
 983         .wakeup         = pxa2xx_udc_wakeup,
 984         .vbus_session   = pxa2xx_udc_vbus_session,
 985         .pullup         = pxa2xx_udc_pullup,
 986
 987         // .vbus_draw ... boards may consume current from VBUS, up to
 988         // 100-500mA based on config.  the 500uA suspend ceiling means
 989         // that exclusively vbus-powered PXA designs violate USB specs.
 990 };
 991
 992 /*-------------------------------------------------------------------------*/
 993
 994 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
 995
 996 static const char proc_node_name [] = "driver/udc";
 997
 998 static int
 999 udc_proc_read(char *page, char **start, off_t off, int count,
1000                 int *eof, void *_dev)
1001 {
1002         char                    *buf = page;
1003         struct pxa2xx_udc       *dev = _dev;
1004         char                    *next = buf;
1005         unsigned                size = count;
1006         unsigned long           flags;
1007         int                     i, t;
1008         u32                     tmp;
1009
1010         if (off != 0)
1011                 return 0;
1012
1013         local_irq_save(flags);
1014
1015         /* basic device status */
1016         t = scnprintf(next, size, DRIVER_DESC "\n"
1017                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1018                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1019                 dev->driver ? dev->driver->driver.name : "(none)",
1020                 is_vbus_present() ? "full speed" : "disconnected");
1021         size -= t;
1022         next += t;
1023
1024         /* registers for device and ep0 */
1025         t = scnprintf(next, size,
1026                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1027                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1028         size -= t;
1029         next += t;
1030
1031         tmp = UDCCR;
1032         t = scnprintf(next, size,
1033                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1034                 (tmp & UDCCR_REM) ? " rem" : "",
1035                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1036                 (tmp & UDCCR_SRM) ? " srm" : "",
1037                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1038                 (tmp & UDCCR_RESIR) ? " resir" : "",
1039                 (tmp & UDCCR_RSM) ? " rsm" : "",
1040                 (tmp & UDCCR_UDA) ? " uda" : "",
1041                 (tmp & UDCCR_UDE) ? " ude" : "");
1042         size -= t;
1043         next += t;
1044
1045         tmp = UDCCS0;
1046         t = scnprintf(next, size,
1047                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1048                 (tmp & UDCCS0_SA) ? " sa" : "",
1049                 (tmp & UDCCS0_RNE) ? " rne" : "",
1050                 (tmp & UDCCS0_FST) ? " fst" : "",
1051                 (tmp & UDCCS0_SST) ? " sst" : "",
1052                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1053                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1054                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1055                 (tmp & UDCCS0_OPR) ? " opr" : "");
1056         size -= t;
1057         next += t;
1058
1059         if (dev->has_cfr) {
1060                 tmp = UDCCFR;
1061                 t = scnprintf(next, size,
1062                         "udccfr %02X =%s%s\n", tmp,
1063                         (tmp & UDCCFR_AREN) ? " aren" : "",
1064                         (tmp & UDCCFR_ACM) ? " acm" : "");
1065                 size -= t;
1066                 next += t;
1067         }
1068
1069         if (!is_vbus_present() || !dev->driver)
1070                 goto done;
1071
1072         t = scnprintf(next, size, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1073                 dev->stats.write.bytes, dev->stats.write.ops,
1074                 dev->stats.read.bytes, dev->stats.read.ops,
1075                 dev->stats.irqs);
1076         size -= t;
1077         next += t;
1078
1079         /* dump endpoint queues */
1080         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1081                 struct pxa2xx_ep        *ep = &dev->ep [i];
1082                 struct pxa2xx_request   *req;
1083
1084                 if (i != 0) {
1085                         const struct usb_endpoint_descriptor    *d;
1086
1087                         d = ep->desc;
1088                         if (!d)
1089                                 continue;
1090                         tmp = *dev->ep [i].reg_udccs;
1091                         t = scnprintf(next, size,
1092                                 "%s max %d %s udccs %02x irqs %lu\n",
1093                                 ep->ep.name, le16_to_cpu (d->wMaxPacketSize),
1094                                 "pio", tmp, ep->pio_irqs);
1095                         /* TODO translate all five groups of udccs bits! */
1096
1097                 } else /* ep0 should only have one transfer queued */
1098                         t = scnprintf(next, size, "ep0 max 16 pio irqs %lu\n",
1099                                 ep->pio_irqs);
1100                 if (t <= 0 || t > size)
1101                         goto done;
1102                 size -= t;
1103                 next += t;
1104
1105                 if (list_empty(&ep->queue)) {
1106                         t = scnprintf(next, size, "\t(nothing queued)\n");
1107                         if (t <= 0 || t > size)
1108                                 goto done;
1109                         size -= t;
1110                         next += t;
1111                         continue;
1112                 }
1113                 list_for_each_entry(req, &ep->queue, queue) {
1114                         t = scnprintf(next, size,
1115                                         "\treq %p len %d/%d buf %p\n",
1116                                         &req->req, req->req.actual,
1117                                         req->req.length, req->req.buf);
1118                         if (t <= 0 || t > size)
1119                                 goto done;
1120                         size -= t;
1121                         next += t;
1122                 }
1123         }
1124
1125 done:
1126         local_irq_restore(flags);
1127         *eof = 1;
1128         return count - size;
1129 }
1130
1131 #define create_proc_files() \
1132         create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
1133 #define remove_proc_files() \
1134         remove_proc_entry(proc_node_name, NULL)
1135
1136 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1137
1138 #define create_proc_files() do {} while (0)
1139 #define remove_proc_files() do {} while (0)
1140
1141 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1142
1143 /*-------------------------------------------------------------------------*/
1144
1145 /*
1146  *      udc_disable - disable USB device controller
1147  */
1148 static void udc_disable(struct pxa2xx_udc *dev)
1149 {
1150         /* block all irqs */
1151         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1152         UICR0 = UICR1 = 0xff;
1153         UFNRH = UFNRH_SIM;
1154
1155         /* if hardware supports it, disconnect from usb */
1156         pullup_off();
1157
1158         udc_clear_mask_UDCCR(UDCCR_UDE);
1159
1160 #ifdef  CONFIG_ARCH_PXA
1161         /* Disable clock for USB device */
1162         clk_disable(dev->clk);
1163 #endif
1164
1165         ep0_idle (dev);
1166         dev->gadget.speed = USB_SPEED_UNKNOWN;
1167 }
1168
1169
1170 /*
1171  *      udc_reinit - initialize software state
1172  */
1173 static void udc_reinit(struct pxa2xx_udc *dev)
1174 {
1175         u32     i;
1176
1177         /* device/ep0 records init */
1178         INIT_LIST_HEAD (&dev->gadget.ep_list);
1179         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1180         dev->ep0state = EP0_IDLE;
1181
1182         /* basic endpoint records init */
1183         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1184                 struct pxa2xx_ep *ep = &dev->ep[i];
1185
1186                 if (i != 0)
1187                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1188
1189                 ep->desc = NULL;
1190                 ep->stopped = 0;
1191                 INIT_LIST_HEAD (&ep->queue);
1192                 ep->pio_irqs = 0;
1193         }
1194
1195         /* the rest was statically initialized, and is read-only */
1196 }
1197
1198 /* until it's enabled, this UDC should be completely invisible
1199  * to any USB host.
1200  */
1201 static void udc_enable (struct pxa2xx_udc *dev)
1202 {
1203         udc_clear_mask_UDCCR(UDCCR_UDE);
1204
1205 #ifdef  CONFIG_ARCH_PXA
1206         /* Enable clock for USB device */
1207         clk_enable(dev->clk);
1208 #endif
1209
1210         /* try to clear these bits before we enable the udc */
1211         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1212
1213         ep0_idle(dev);
1214         dev->gadget.speed = USB_SPEED_UNKNOWN;
1215         dev->stats.irqs = 0;
1216
1217         /*
1218          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1219          * - enable UDC
1220          * - if RESET is already in progress, ack interrupt
1221          * - unmask reset interrupt
1222          */
1223         udc_set_mask_UDCCR(UDCCR_UDE);
1224         if (!(UDCCR & UDCCR_UDA))
1225                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1226
1227         if (dev->has_cfr /* UDC_RES2 is defined */) {
1228                 /* pxa255 (a0+) can avoid a set_config race that could
1229                  * prevent gadget drivers from configuring correctly
1230                  */
1231                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1232         } else {
1233                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1234                  * which could result in missing packets and interrupts.
1235                  * supposedly one bit per endpoint, controlling whether it
1236                  * double buffers or not; ACM/AREN bits fit into the holes.
1237                  * zero bits (like USIR0_IRx) disable double buffering.
1238                  */
1239                 UDC_RES1 = 0x00;
1240                 UDC_RES2 = 0x00;
1241         }
1242
1243         /* enable suspend/resume and reset irqs */
1244         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1245
1246         /* enable ep0 irqs */
1247         UICR0 &= ~UICR0_IM0;
1248
1249         /* if hardware supports it, pullup D+ and wait for reset */
1250         pullup_on();
1251 }
1252
1253
1254 /* when a driver is successfully registered, it will receive
1255  * control requests including set_configuration(), which enables
1256  * non-control requests.  then usb traffic follows until a
1257  * disconnect is reported.  then a host may connect again, or
1258  * the driver might get unbound.
1259  */
1260 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1261 {
1262         struct pxa2xx_udc       *dev = the_controller;
1263         int                     retval;
1264
1265         if (!driver
1266                         || driver->speed < USB_SPEED_FULL
1267                         || !driver->bind
1268                         || !driver->disconnect
1269                         || !driver->setup)
1270                 return -EINVAL;
1271         if (!dev)
1272                 return -ENODEV;
1273         if (dev->driver)
1274                 return -EBUSY;
1275
1276         /* first hook up the driver ... */
1277         dev->driver = driver;
1278         dev->gadget.dev.driver = &driver->driver;
1279         dev->pullup = 1;
1280
1281         retval = device_add (&dev->gadget.dev);
1282         if (retval) {
1283 fail:
1284                 dev->driver = NULL;
1285                 dev->gadget.dev.driver = NULL;
1286                 return retval;
1287         }
1288         retval = driver->bind(&dev->gadget);
1289         if (retval) {
1290                 DMSG("bind to driver %s --> error %d\n",
1291                                 driver->driver.name, retval);
1292                 device_del (&dev->gadget.dev);
1293                 goto fail;
1294         }
1295
1296         /* ... then enable host detection and ep0; and we're ready
1297          * for set_configuration as well as eventual disconnect.
1298          */
1299         DMSG("registered gadget driver '%s'\n", driver->driver.name);
1300         pullup(dev, 1);
1301         dump_state(dev);
1302         return 0;
1303 }
1304 EXPORT_SYMBOL(usb_gadget_register_driver);
1305
1306 static void
1307 stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
1308 {
1309         int i;
1310
1311         /* don't disconnect drivers more than once */
1312         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1313                 driver = NULL;
1314         dev->gadget.speed = USB_SPEED_UNKNOWN;
1315
1316         /* prevent new request submissions, kill any outstanding requests  */
1317         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1318                 struct pxa2xx_ep *ep = &dev->ep[i];
1319
1320                 ep->stopped = 1;
1321                 nuke(ep, -ESHUTDOWN);
1322         }
1323         del_timer_sync(&dev->timer);
1324
1325         /* report disconnect; the driver is already quiesced */
1326         if (driver)
1327                 driver->disconnect(&dev->gadget);
1328
1329         /* re-init driver-visible data structures */
1330         udc_reinit(dev);
1331 }
1332
1333 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1334 {
1335         struct pxa2xx_udc       *dev = the_controller;
1336
1337         if (!dev)
1338                 return -ENODEV;
1339         if (!driver || driver != dev->driver || !driver->unbind)
1340                 return -EINVAL;
1341
1342         local_irq_disable();
1343         pullup(dev, 0);
1344         stop_activity(dev, driver);
1345         local_irq_enable();
1346
1347         driver->unbind(&dev->gadget);
1348         dev->driver = NULL;
1349
1350         device_del (&dev->gadget.dev);
1351
1352         DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1353         dump_state(dev);
1354         return 0;
1355 }
1356 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1357
1358
1359 /*-------------------------------------------------------------------------*/
1360
1361 #ifdef CONFIG_ARCH_LUBBOCK
1362
1363 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1364  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1365  */
1366
1367 static irqreturn_t
1368 lubbock_vbus_irq(int irq, void *_dev)
1369 {
1370         struct pxa2xx_udc       *dev = _dev;
1371         int                     vbus;
1372
1373         dev->stats.irqs++;
1374         switch (irq) {
1375         case LUBBOCK_USB_IRQ:
1376                 vbus = 1;
1377                 disable_irq(LUBBOCK_USB_IRQ);
1378                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1379                 break;
1380         case LUBBOCK_USB_DISC_IRQ:
1381                 vbus = 0;
1382                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1383                 enable_irq(LUBBOCK_USB_IRQ);
1384                 break;
1385         default:
1386                 return IRQ_NONE;
1387         }
1388
1389         pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1390         return IRQ_HANDLED;
1391 }
1392
1393 #endif
1394
1395 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1396 {
1397         struct pxa2xx_udc       *dev = _dev;
1398         int                     vbus = gpio_get_value(dev->mach->gpio_vbus);
1399
1400         pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1401         return IRQ_HANDLED;
1402 }
1403
1404
1405 /*-------------------------------------------------------------------------*/
1406
1407 static inline void clear_ep_state (struct pxa2xx_udc *dev)
1408 {
1409         unsigned i;
1410
1411         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1412          * fifos, and pending transactions mustn't be continued in any case.
1413          */
1414         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1415                 nuke(&dev->ep[i], -ECONNABORTED);
1416 }
1417
1418 static void udc_watchdog(unsigned long _dev)
1419 {
1420         struct pxa2xx_udc       *dev = (void *)_dev;
1421
1422         local_irq_disable();
1423         if (dev->ep0state == EP0_STALL
1424                         && (UDCCS0 & UDCCS0_FST) == 0
1425                         && (UDCCS0 & UDCCS0_SST) == 0) {
1426                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1427                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1428                 start_watchdog(dev);
1429         }
1430         local_irq_enable();
1431 }
1432
1433 static void handle_ep0 (struct pxa2xx_udc *dev)
1434 {
1435         u32                     udccs0 = UDCCS0;
1436         struct pxa2xx_ep        *ep = &dev->ep [0];
1437         struct pxa2xx_request   *req;
1438         union {
1439                 struct usb_ctrlrequest  r;
1440                 u8                      raw [8];
1441                 u32                     word [2];
1442         } u;
1443
1444         if (list_empty(&ep->queue))
1445                 req = NULL;
1446         else
1447                 req = list_entry(ep->queue.next, struct pxa2xx_request, queue);
1448
1449         /* clear stall status */
1450         if (udccs0 & UDCCS0_SST) {
1451                 nuke(ep, -EPIPE);
1452                 UDCCS0 = UDCCS0_SST;
1453                 del_timer(&dev->timer);
1454                 ep0_idle(dev);
1455         }
1456
1457         /* previous request unfinished?  non-error iff back-to-back ... */
1458         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1459                 nuke(ep, 0);
1460                 del_timer(&dev->timer);
1461                 ep0_idle(dev);
1462         }
1463
1464         switch (dev->ep0state) {
1465         case EP0_IDLE:
1466                 /* late-breaking status? */
1467                 udccs0 = UDCCS0;
1468
1469                 /* start control request? */
1470                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1471                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1472                         int i;
1473
1474                         nuke (ep, -EPROTO);
1475
1476                         /* read SETUP packet */
1477                         for (i = 0; i < 8; i++) {
1478                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1479 bad_setup:
1480                                         DMSG("SETUP %d!\n", i);
1481                                         goto stall;
1482                                 }
1483                                 u.raw [i] = (u8) UDDR0;
1484                         }
1485                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1486                                 goto bad_setup;
1487
1488 got_setup:
1489                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1490                                 u.r.bRequestType, u.r.bRequest,
1491                                 le16_to_cpu(u.r.wValue),
1492                                 le16_to_cpu(u.r.wIndex),
1493                                 le16_to_cpu(u.r.wLength));
1494
1495                         /* cope with automagic for some standard requests. */
1496                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1497                                                 == USB_TYPE_STANDARD;
1498                         dev->req_config = 0;
1499                         dev->req_pending = 1;
1500                         switch (u.r.bRequest) {
1501                         /* hardware restricts gadget drivers here! */
1502                         case USB_REQ_SET_CONFIGURATION:
1503                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1504                                         /* reflect hardware's automagic
1505                                          * up to the gadget driver.
1506                                          */
1507 config_change:
1508                                         dev->req_config = 1;
1509                                         clear_ep_state(dev);
1510                                         /* if !has_cfr, there's no synch
1511                                          * else use AREN (later) not SA|OPR
1512                                          * USIR0_IR0 acts edge sensitive
1513                                          */
1514                                 }
1515                                 break;
1516                         /* ... and here, even more ... */
1517                         case USB_REQ_SET_INTERFACE:
1518                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1519                                         /* udc hardware is broken by design:
1520                                          *  - altsetting may only be zero;
1521                                          *  - hw resets all interfaces' eps;
1522                                          *  - ep reset doesn't include halt(?).
1523                                          */
1524                                         DMSG("broken set_interface (%d/%d)\n",
1525                                                 le16_to_cpu(u.r.wIndex),
1526                                                 le16_to_cpu(u.r.wValue));
1527                                         goto config_change;
1528                                 }
1529                                 break;
1530                         /* hardware was supposed to hide this */
1531                         case USB_REQ_SET_ADDRESS:
1532                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1533                                         ep0start(dev, 0, "address");
1534                                         return;
1535                                 }
1536                                 break;
1537                         }
1538
1539                         if (u.r.bRequestType & USB_DIR_IN)
1540                                 dev->ep0state = EP0_IN_DATA_PHASE;
1541                         else
1542                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1543
1544                         i = dev->driver->setup(&dev->gadget, &u.r);
1545                         if (i < 0) {
1546                                 /* hardware automagic preventing STALL... */
1547                                 if (dev->req_config) {
1548                                         /* hardware sometimes neglects to tell
1549                                          * tell us about config change events,
1550                                          * so later ones may fail...
1551                                          */
1552                                         WARN("config change %02x fail %d?\n",
1553                                                 u.r.bRequest, i);
1554                                         return;
1555                                         /* TODO experiment:  if has_cfr,
1556                                          * hardware didn't ACK; maybe we
1557                                          * could actually STALL!
1558                                          */
1559                                 }
1560                                 DBG(DBG_VERBOSE, "protocol STALL, "
1561                                         "%02x err %d\n", UDCCS0, i);
1562 stall:
1563                                 /* the watchdog timer helps deal with cases
1564                                  * where udc seems to clear FST wrongly, and
1565                                  * then NAKs instead of STALLing.
1566                                  */
1567                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1568                                 start_watchdog(dev);
1569                                 dev->ep0state = EP0_STALL;
1570
1571                         /* deferred i/o == no response yet */
1572                         } else if (dev->req_pending) {
1573                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1574                                                 || dev->req_std || u.r.wLength))
1575                                         ep0start(dev, 0, "defer");
1576                                 else
1577                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1578                         }
1579
1580                         /* expect at least one data or status stage irq */
1581                         return;
1582
1583                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1584                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1585                         unsigned i;
1586
1587                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1588                          * still observed on a pxa255 a0.
1589                          */
1590                         DBG(DBG_VERBOSE, "e131\n");
1591                         nuke(ep, -EPROTO);
1592
1593                         /* read SETUP data, but don't trust it too much */
1594                         for (i = 0; i < 8; i++)
1595                                 u.raw [i] = (u8) UDDR0;
1596                         if ((u.r.bRequestType & USB_RECIP_MASK)
1597                                         > USB_RECIP_OTHER)
1598                                 goto stall;
1599                         if (u.word [0] == 0 && u.word [1] == 0)
1600                                 goto stall;
1601                         goto got_setup;
1602                 } else {
1603                         /* some random early IRQ:
1604                          * - we acked FST
1605                          * - IPR cleared
1606                          * - OPR got set, without SA (likely status stage)
1607                          */
1608                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1609                 }
1610                 break;
1611         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1612                 if (udccs0 & UDCCS0_OPR) {
1613                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1614                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1615                         if (req)
1616                                 done(ep, req, 0);
1617                         ep0_idle(dev);
1618                 } else /* irq was IPR clearing */ {
1619                         if (req) {
1620                                 /* this IN packet might finish the request */
1621                                 (void) write_ep0_fifo(ep, req);
1622                         } /* else IN token before response was written */
1623                 }
1624                 break;
1625         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1626                 if (udccs0 & UDCCS0_OPR) {
1627                         if (req) {
1628                                 /* this OUT packet might finish the request */
1629                                 if (read_ep0_fifo(ep, req))
1630                                         done(ep, req, 0);
1631                                 /* else more OUT packets expected */
1632                         } /* else OUT token before read was issued */
1633                 } else /* irq was IPR clearing */ {
1634                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1635                         if (req)
1636                                 done(ep, req, 0);
1637                         ep0_idle(dev);
1638                 }
1639                 break;
1640         case EP0_END_XFER:
1641                 if (req)
1642                         done(ep, req, 0);
1643                 /* ack control-IN status (maybe in-zlp was skipped)
1644                  * also appears after some config change events.
1645                  */
1646                 if (udccs0 & UDCCS0_OPR)
1647                         UDCCS0 = UDCCS0_OPR;
1648                 ep0_idle(dev);
1649                 break;
1650         case EP0_STALL:
1651                 UDCCS0 = UDCCS0_FST;
1652                 break;
1653         }
1654         USIR0 = USIR0_IR0;
1655 }
1656
1657 static void handle_ep(struct pxa2xx_ep *ep)
1658 {
1659         struct pxa2xx_request   *req;
1660         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1661         int                     completed;
1662         u32                     udccs, tmp;
1663
1664         do {
1665                 completed = 0;
1666                 if (likely (!list_empty(&ep->queue)))
1667                         req = list_entry(ep->queue.next,
1668                                         struct pxa2xx_request, queue);
1669                 else
1670                         req = NULL;
1671
1672                 // TODO check FST handling
1673
1674                 udccs = *ep->reg_udccs;
1675                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1676                         tmp = UDCCS_BI_TUR;
1677                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1678                                 tmp |= UDCCS_BI_SST;
1679                         tmp &= udccs;
1680                         if (likely (tmp))
1681                                 *ep->reg_udccs = tmp;
1682                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1683                                 completed = write_fifo(ep, req);
1684
1685                 } else {        /* irq from RPC (or for ISO, ROF) */
1686                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1687                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1688                         else
1689                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1690                         tmp &= udccs;
1691                         if (likely(tmp))
1692                                 *ep->reg_udccs = tmp;
1693
1694                         /* fifos can hold packets, ready for reading... */
1695                         if (likely(req)) {
1696                                 completed = read_fifo(ep, req);
1697                         } else
1698                                 pio_irq_disable (ep->bEndpointAddress);
1699                 }
1700                 ep->pio_irqs++;
1701         } while (completed);
1702 }
1703
1704 /*
1705  *      pxa2xx_udc_irq - interrupt handler
1706  *
1707  * avoid delays in ep0 processing. the control handshaking isn't always
1708  * under software control (pxa250c0 and the pxa255 are better), and delays
1709  * could cause usb protocol errors.
1710  */
1711 static irqreturn_t
1712 pxa2xx_udc_irq(int irq, void *_dev)
1713 {
1714         struct pxa2xx_udc       *dev = _dev;
1715         int                     handled;
1716
1717         dev->stats.irqs++;
1718         do {
1719                 u32             udccr = UDCCR;
1720
1721                 handled = 0;
1722
1723                 /* SUSpend Interrupt Request */
1724                 if (unlikely(udccr & UDCCR_SUSIR)) {
1725                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1726                         handled = 1;
1727                         DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1728                                 ? "" : "+disconnect");
1729
1730                         if (!is_vbus_present())
1731                                 stop_activity(dev, dev->driver);
1732                         else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1733                                         && dev->driver
1734                                         && dev->driver->suspend)
1735                                 dev->driver->suspend(&dev->gadget);
1736                         ep0_idle (dev);
1737                 }
1738
1739                 /* RESume Interrupt Request */
1740                 if (unlikely(udccr & UDCCR_RESIR)) {
1741                         udc_ack_int_UDCCR(UDCCR_RESIR);
1742                         handled = 1;
1743                         DBG(DBG_VERBOSE, "USB resume\n");
1744
1745                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1746                                         && dev->driver
1747                                         && dev->driver->resume
1748                                         && is_vbus_present())
1749                                 dev->driver->resume(&dev->gadget);
1750                 }
1751
1752                 /* ReSeT Interrupt Request - USB reset */
1753                 if (unlikely(udccr & UDCCR_RSTIR)) {
1754                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1755                         handled = 1;
1756
1757                         if ((UDCCR & UDCCR_UDA) == 0) {
1758                                 DBG(DBG_VERBOSE, "USB reset start\n");
1759
1760                                 /* reset driver and endpoints,
1761                                  * in case that's not yet done
1762                                  */
1763                                 stop_activity (dev, dev->driver);
1764
1765                         } else {
1766                                 DBG(DBG_VERBOSE, "USB reset end\n");
1767                                 dev->gadget.speed = USB_SPEED_FULL;
1768                                 memset(&dev->stats, 0, sizeof dev->stats);
1769                                 /* driver and endpoints are still reset */
1770                         }
1771
1772                 } else {
1773                         u32     usir0 = USIR0 & ~UICR0;
1774                         u32     usir1 = USIR1 & ~UICR1;
1775                         int     i;
1776
1777                         if (unlikely (!usir0 && !usir1))
1778                                 continue;
1779
1780                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1781
1782                         /* control traffic */
1783                         if (usir0 & USIR0_IR0) {
1784                                 dev->ep[0].pio_irqs++;
1785                                 handle_ep0(dev);
1786                                 handled = 1;
1787                         }
1788
1789                         /* endpoint data transfers */
1790                         for (i = 0; i < 8; i++) {
1791                                 u32     tmp = 1 << i;
1792
1793                                 if (i && (usir0 & tmp)) {
1794                                         handle_ep(&dev->ep[i]);
1795                                         USIR0 |= tmp;
1796                                         handled = 1;
1797                                 }
1798                                 if (usir1 & tmp) {
1799                                         handle_ep(&dev->ep[i+8]);
1800                                         USIR1 |= tmp;
1801                                         handled = 1;
1802                                 }
1803                         }
1804                 }
1805
1806                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1807
1808         } while (handled);
1809         return IRQ_HANDLED;
1810 }
1811
1812 /*-------------------------------------------------------------------------*/
1813
1814 static void nop_release (struct device *dev)
1815 {
1816         DMSG("%s %s\n", __FUNCTION__, dev->bus_id);
1817 }
1818
1819 /* this uses load-time allocation and initialization (instead of
1820  * doing it at run-time) to save code, eliminate fault paths, and
1821  * be more obviously correct.
1822  */
1823 static struct pxa2xx_udc memory = {
1824         .gadget = {
1825                 .ops            = &pxa2xx_udc_ops,
1826                 .ep0            = &memory.ep[0].ep,
1827                 .name           = driver_name,
1828                 .dev = {
1829                         .bus_id         = "gadget",
1830                         .release        = nop_release,
1831                 },
1832         },
1833
1834         /* control endpoint */
1835         .ep[0] = {
1836                 .ep = {
1837                         .name           = ep0name,
1838                         .ops            = &pxa2xx_ep_ops,
1839                         .maxpacket      = EP0_FIFO_SIZE,
1840                 },
1841                 .dev            = &memory,
1842                 .reg_udccs      = &UDCCS0,
1843                 .reg_uddr       = &UDDR0,
1844         },
1845
1846         /* first group of endpoints */
1847         .ep[1] = {
1848                 .ep = {
1849                         .name           = "ep1in-bulk",
1850                         .ops            = &pxa2xx_ep_ops,
1851                         .maxpacket      = BULK_FIFO_SIZE,
1852                 },
1853                 .dev            = &memory,
1854                 .fifo_size      = BULK_FIFO_SIZE,
1855                 .bEndpointAddress = USB_DIR_IN | 1,
1856                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1857                 .reg_udccs      = &UDCCS1,
1858                 .reg_uddr       = &UDDR1,
1859         },
1860         .ep[2] = {
1861                 .ep = {
1862                         .name           = "ep2out-bulk",
1863                         .ops            = &pxa2xx_ep_ops,
1864                         .maxpacket      = BULK_FIFO_SIZE,
1865                 },
1866                 .dev            = &memory,
1867                 .fifo_size      = BULK_FIFO_SIZE,
1868                 .bEndpointAddress = 2,
1869                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1870                 .reg_udccs      = &UDCCS2,
1871                 .reg_ubcr       = &UBCR2,
1872                 .reg_uddr       = &UDDR2,
1873         },
1874 #ifndef CONFIG_USB_PXA2XX_SMALL
1875         .ep[3] = {
1876                 .ep = {
1877                         .name           = "ep3in-iso",
1878                         .ops            = &pxa2xx_ep_ops,
1879                         .maxpacket      = ISO_FIFO_SIZE,
1880                 },
1881                 .dev            = &memory,
1882                 .fifo_size      = ISO_FIFO_SIZE,
1883                 .bEndpointAddress = USB_DIR_IN | 3,
1884                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1885                 .reg_udccs      = &UDCCS3,
1886                 .reg_uddr       = &UDDR3,
1887         },
1888         .ep[4] = {
1889                 .ep = {
1890                         .name           = "ep4out-iso",
1891                         .ops            = &pxa2xx_ep_ops,
1892                         .maxpacket      = ISO_FIFO_SIZE,
1893                 },
1894                 .dev            = &memory,
1895                 .fifo_size      = ISO_FIFO_SIZE,
1896                 .bEndpointAddress = 4,
1897                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1898                 .reg_udccs      = &UDCCS4,
1899                 .reg_ubcr       = &UBCR4,
1900                 .reg_uddr       = &UDDR4,
1901         },
1902         .ep[5] = {
1903                 .ep = {
1904                         .name           = "ep5in-int",
1905                         .ops            = &pxa2xx_ep_ops,
1906                         .maxpacket      = INT_FIFO_SIZE,
1907                 },
1908                 .dev            = &memory,
1909                 .fifo_size      = INT_FIFO_SIZE,
1910                 .bEndpointAddress = USB_DIR_IN | 5,
1911                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1912                 .reg_udccs      = &UDCCS5,
1913                 .reg_uddr       = &UDDR5,
1914         },
1915
1916         /* second group of endpoints */
1917         .ep[6] = {
1918                 .ep = {
1919                         .name           = "ep6in-bulk",
1920                         .ops            = &pxa2xx_ep_ops,
1921                         .maxpacket      = BULK_FIFO_SIZE,
1922                 },
1923                 .dev            = &memory,
1924                 .fifo_size      = BULK_FIFO_SIZE,
1925                 .bEndpointAddress = USB_DIR_IN | 6,
1926                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1927                 .reg_udccs      = &UDCCS6,
1928                 .reg_uddr       = &UDDR6,
1929         },
1930         .ep[7] = {
1931                 .ep = {
1932                         .name           = "ep7out-bulk",
1933                         .ops            = &pxa2xx_ep_ops,
1934                         .maxpacket      = BULK_FIFO_SIZE,
1935                 },
1936                 .dev            = &memory,
1937                 .fifo_size      = BULK_FIFO_SIZE,
1938                 .bEndpointAddress = 7,
1939                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1940                 .reg_udccs      = &UDCCS7,
1941                 .reg_ubcr       = &UBCR7,
1942                 .reg_uddr       = &UDDR7,
1943         },
1944         .ep[8] = {
1945                 .ep = {
1946                         .name           = "ep8in-iso",
1947                         .ops            = &pxa2xx_ep_ops,
1948                         .maxpacket      = ISO_FIFO_SIZE,
1949                 },
1950                 .dev            = &memory,
1951                 .fifo_size      = ISO_FIFO_SIZE,
1952                 .bEndpointAddress = USB_DIR_IN | 8,
1953                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1954                 .reg_udccs      = &UDCCS8,
1955                 .reg_uddr       = &UDDR8,
1956         },
1957         .ep[9] = {
1958                 .ep = {
1959                         .name           = "ep9out-iso",
1960                         .ops            = &pxa2xx_ep_ops,
1961                         .maxpacket      = ISO_FIFO_SIZE,
1962                 },
1963                 .dev            = &memory,
1964                 .fifo_size      = ISO_FIFO_SIZE,
1965                 .bEndpointAddress = 9,
1966                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1967                 .reg_udccs      = &UDCCS9,
1968                 .reg_ubcr       = &UBCR9,
1969                 .reg_uddr       = &UDDR9,
1970         },
1971         .ep[10] = {
1972                 .ep = {
1973                         .name           = "ep10in-int",
1974                         .ops            = &pxa2xx_ep_ops,
1975                         .maxpacket      = INT_FIFO_SIZE,
1976                 },
1977                 .dev            = &memory,
1978                 .fifo_size      = INT_FIFO_SIZE,
1979                 .bEndpointAddress = USB_DIR_IN | 10,
1980                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1981                 .reg_udccs      = &UDCCS10,
1982                 .reg_uddr       = &UDDR10,
1983         },
1984
1985         /* third group of endpoints */
1986         .ep[11] = {
1987                 .ep = {
1988                         .name           = "ep11in-bulk",
1989                         .ops            = &pxa2xx_ep_ops,
1990                         .maxpacket      = BULK_FIFO_SIZE,
1991                 },
1992                 .dev            = &memory,
1993                 .fifo_size      = BULK_FIFO_SIZE,
1994                 .bEndpointAddress = USB_DIR_IN | 11,
1995                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1996                 .reg_udccs      = &UDCCS11,
1997                 .reg_uddr       = &UDDR11,
1998         },
1999         .ep[12] = {
2000                 .ep = {
2001                         .name           = "ep12out-bulk",
2002                         .ops            = &pxa2xx_ep_ops,
2003                         .maxpacket      = BULK_FIFO_SIZE,
2004                 },
2005                 .dev            = &memory,
2006                 .fifo_size      = BULK_FIFO_SIZE,
2007                 .bEndpointAddress = 12,
2008                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2009                 .reg_udccs      = &UDCCS12,
2010                 .reg_ubcr       = &UBCR12,
2011                 .reg_uddr       = &UDDR12,
2012         },
2013         .ep[13] = {
2014                 .ep = {
2015                         .name           = "ep13in-iso",
2016                         .ops            = &pxa2xx_ep_ops,
2017                         .maxpacket      = ISO_FIFO_SIZE,
2018                 },
2019                 .dev            = &memory,
2020                 .fifo_size      = ISO_FIFO_SIZE,
2021                 .bEndpointAddress = USB_DIR_IN | 13,
2022                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2023                 .reg_udccs      = &UDCCS13,
2024                 .reg_uddr       = &UDDR13,
2025         },
2026         .ep[14] = {
2027                 .ep = {
2028                         .name           = "ep14out-iso",
2029                         .ops            = &pxa2xx_ep_ops,
2030                         .maxpacket      = ISO_FIFO_SIZE,
2031                 },
2032                 .dev            = &memory,
2033                 .fifo_size      = ISO_FIFO_SIZE,
2034                 .bEndpointAddress = 14,
2035                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2036                 .reg_udccs      = &UDCCS14,
2037                 .reg_ubcr       = &UBCR14,
2038                 .reg_uddr       = &UDDR14,
2039         },
2040         .ep[15] = {
2041                 .ep = {
2042                         .name           = "ep15in-int",
2043                         .ops            = &pxa2xx_ep_ops,
2044                         .maxpacket      = INT_FIFO_SIZE,
2045                 },
2046                 .dev            = &memory,
2047                 .fifo_size      = INT_FIFO_SIZE,
2048                 .bEndpointAddress = USB_DIR_IN | 15,
2049                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2050                 .reg_udccs      = &UDCCS15,
2051                 .reg_uddr       = &UDDR15,
2052         },
2053 #endif /* !CONFIG_USB_PXA2XX_SMALL */
2054 };
2055
2056 #define CP15R0_VENDOR_MASK      0xffffe000
2057
2058 #if     defined(CONFIG_ARCH_PXA)
2059 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2060
2061 #elif   defined(CONFIG_ARCH_IXP4XX)
2062 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2063
2064 #endif
2065
2066 #define CP15R0_PROD_MASK        0x000003f0
2067 #define PXA25x                  0x00000100      /* and PXA26x */
2068 #define PXA210                  0x00000120
2069
2070 #define CP15R0_REV_MASK         0x0000000f
2071
2072 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2073
2074 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2075 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2076 #define PXA250_B2               0x00000104
2077 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2078 #define PXA250_B0               0x00000102
2079 #define PXA250_A1               0x00000101
2080 #define PXA250_A0               0x00000100
2081
2082 #define PXA210_C0               0x00000125
2083 #define PXA210_B2               0x00000124
2084 #define PXA210_B1               0x00000123
2085 #define PXA210_B0               0x00000122
2086 #define IXP425_A0               0x000001c1
2087 #define IXP425_B0               0x000001f1
2088 #define IXP465_AD               0x00000200
2089
2090 /*
2091  *      probe - binds to the platform device
2092  */
2093 static int __init pxa2xx_udc_probe(struct platform_device *pdev)
2094 {
2095         struct pxa2xx_udc *dev = &memory;
2096         int retval, vbus_irq, irq;
2097         u32 chiprev;
2098
2099         /* insist on Intel/ARM/XScale */
2100         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2101         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2102                 printk(KERN_ERR "%s: not XScale!\n", driver_name);
2103                 return -ENODEV;
2104         }
2105
2106         /* trigger chiprev-specific logic */
2107         switch (chiprev & CP15R0_PRODREV_MASK) {
2108 #if     defined(CONFIG_ARCH_PXA)
2109         case PXA255_A0:
2110                 dev->has_cfr = 1;
2111                 break;
2112         case PXA250_A0:
2113         case PXA250_A1:
2114                 /* A0/A1 "not released"; ep 13, 15 unusable */
2115                 /* fall through */
2116         case PXA250_B2: case PXA210_B2:
2117         case PXA250_B1: case PXA210_B1:
2118         case PXA250_B0: case PXA210_B0:
2119                 /* OUT-DMA is broken ... */
2120                 /* fall through */
2121         case PXA250_C0: case PXA210_C0:
2122                 break;
2123 #elif   defined(CONFIG_ARCH_IXP4XX)
2124         case IXP425_A0:
2125         case IXP425_B0:
2126         case IXP465_AD:
2127                 dev->has_cfr = 1;
2128                 break;
2129 #endif
2130         default:
2131                 printk(KERN_ERR "%s: unrecognized processor: %08x\n",
2132                         driver_name, chiprev);
2133                 /* iop3xx, ixp4xx, ... */
2134                 return -ENODEV;
2135         }
2136
2137         irq = platform_get_irq(pdev, 0);
2138         if (irq < 0)
2139                 return -ENODEV;
2140
2141 #ifdef  CONFIG_ARCH_PXA
2142         dev->clk = clk_get(&pdev->dev, "UDCCLK");
2143         if (IS_ERR(dev->clk)) {
2144                 retval = PTR_ERR(dev->clk);
2145                 goto err_clk;
2146         }
2147 #endif
2148
2149         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2150                 dev->has_cfr ? "" : " (!cfr)",
2151                 SIZE_STR "(pio)"
2152                 );
2153
2154         /* other non-static parts of init */
2155         dev->dev = &pdev->dev;
2156         dev->mach = pdev->dev.platform_data;
2157
2158         if (dev->mach->gpio_vbus) {
2159                 if ((retval = gpio_request(dev->mach->gpio_vbus,
2160                                 "pxa2xx_udc GPIO VBUS"))) {
2161                         dev_dbg(&pdev->dev,
2162                                 "can't get vbus gpio %d, err: %d\n",
2163                                 dev->mach->gpio_vbus, retval);
2164                         goto err_gpio_vbus;
2165                 }
2166                 gpio_direction_input(dev->mach->gpio_vbus);
2167                 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2168         } else
2169                 vbus_irq = 0;
2170
2171         if (dev->mach->gpio_pullup) {
2172                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2173                                 "pca2xx_udc GPIO PULLUP"))) {
2174                         dev_dbg(&pdev->dev,
2175                                 "can't get pullup gpio %d, err: %d\n",
2176                                 dev->mach->gpio_pullup, retval);
2177                         goto err_gpio_pullup;
2178                 }
2179                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2180         }
2181
2182         init_timer(&dev->timer);
2183         dev->timer.function = udc_watchdog;
2184         dev->timer.data = (unsigned long) dev;
2185
2186         device_initialize(&dev->gadget.dev);
2187         dev->gadget.dev.parent = &pdev->dev;
2188         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2189
2190         the_controller = dev;
2191         platform_set_drvdata(pdev, dev);
2192
2193         udc_disable(dev);
2194         udc_reinit(dev);
2195
2196         dev->vbus = is_vbus_present();
2197
2198         /* irq setup after old hardware state is cleaned up */
2199         retval = request_irq(irq, pxa2xx_udc_irq,
2200                         IRQF_DISABLED, driver_name, dev);
2201         if (retval != 0) {
2202                 printk(KERN_ERR "%s: can't get irq %d, err %d\n",
2203                         driver_name, irq, retval);
2204                 goto err_irq1;
2205         }
2206         dev->got_irq = 1;
2207
2208 #ifdef CONFIG_ARCH_LUBBOCK
2209         if (machine_is_lubbock()) {
2210                 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2211                                 lubbock_vbus_irq,
2212                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2213                                 driver_name, dev);
2214                 if (retval != 0) {
2215                         printk(KERN_ERR "%s: can't get irq %i, err %d\n",
2216                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2217 lubbock_fail0:
2218                         goto err_irq_lub;
2219                 }
2220                 retval = request_irq(LUBBOCK_USB_IRQ,
2221                                 lubbock_vbus_irq,
2222                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2223                                 driver_name, dev);
2224                 if (retval != 0) {
2225                         printk(KERN_ERR "%s: can't get irq %i, err %d\n",
2226                                 driver_name, LUBBOCK_USB_IRQ, retval);
2227                         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2228                         goto lubbock_fail0;
2229                 }
2230         } else
2231 #endif
2232         if (vbus_irq) {
2233                 retval = request_irq(vbus_irq, udc_vbus_irq,
2234                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2235                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2236                                 driver_name, dev);
2237                 if (retval != 0) {
2238                         printk(KERN_ERR "%s: can't get irq %i, err %d\n",
2239                                 driver_name, vbus_irq, retval);
2240                         goto err_vbus_irq;
2241                 }
2242         }
2243         create_proc_files();
2244
2245         return 0;
2246
2247  err_vbus_irq:
2248 #ifdef  CONFIG_ARCH_LUBBOCK
2249         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2250  err_irq_lub:
2251 #endif
2252         free_irq(irq, dev);
2253  err_irq1:
2254         if (dev->mach->gpio_pullup)
2255                 gpio_free(dev->mach->gpio_pullup);
2256  err_gpio_pullup:
2257         if (dev->mach->gpio_vbus)
2258                 gpio_free(dev->mach->gpio_vbus);
2259  err_gpio_vbus:
2260 #ifdef  CONFIG_ARCH_PXA
2261         clk_put(dev->clk);
2262  err_clk:
2263 #endif
2264         return retval;
2265 }
2266
2267 static void pxa2xx_udc_shutdown(struct platform_device *_dev)
2268 {
2269         pullup_off();
2270 }
2271
2272 static int __exit pxa2xx_udc_remove(struct platform_device *pdev)
2273 {
2274         struct pxa2xx_udc *dev = platform_get_drvdata(pdev);
2275
2276         if (dev->driver)
2277                 return -EBUSY;
2278
2279         udc_disable(dev);
2280         remove_proc_files();
2281
2282         if (dev->got_irq) {
2283                 free_irq(platform_get_irq(pdev, 0), dev);
2284                 dev->got_irq = 0;
2285         }
2286 #ifdef CONFIG_ARCH_LUBBOCK
2287         if (machine_is_lubbock()) {
2288                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2289                 free_irq(LUBBOCK_USB_IRQ, dev);
2290         }
2291 #endif
2292         if (dev->mach->gpio_vbus) {
2293                 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2294                 gpio_free(dev->mach->gpio_vbus);
2295         }
2296         if (dev->mach->gpio_pullup)
2297                 gpio_free(dev->mach->gpio_pullup);
2298
2299 #ifdef  CONFIG_ARCH_PXA
2300         clk_put(dev->clk);
2301 #endif
2302
2303         platform_set_drvdata(pdev, NULL);
2304         the_controller = NULL;
2305         return 0;
2306 }
2307
2308 /*-------------------------------------------------------------------------*/
2309
2310 #ifdef  CONFIG_PM
2311
2312 /* USB suspend (controlled by the host) and system suspend (controlled
2313  * by the PXA) don't necessarily work well together.  If USB is active,
2314  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2315  * mode, or any deeper PM saving state.
2316  *
2317  * For now, we punt and forcibly disconnect from the USB host when PXA
2318  * enters any suspend state.  While we're disconnected, we always disable
2319  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2320  * Boards without software pullup control shouldn't use those states.
2321  * VBUS IRQs should probably be ignored so that the PXA device just acts
2322  * "dead" to USB hosts until system resume.
2323  */
2324 static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state)
2325 {
2326         struct pxa2xx_udc       *udc = platform_get_drvdata(dev);
2327
2328         if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
2329                 WARN("USB host won't detect disconnect!\n");
2330         pullup(udc, 0);
2331
2332         return 0;
2333 }
2334
2335 static int pxa2xx_udc_resume(struct platform_device *dev)
2336 {
2337         struct pxa2xx_udc       *udc = platform_get_drvdata(dev);
2338
2339         pullup(udc, 1);
2340
2341         return 0;
2342 }
2343
2344 #else
2345 #define pxa2xx_udc_suspend      NULL
2346 #define pxa2xx_udc_resume       NULL
2347 #endif
2348
2349 /*-------------------------------------------------------------------------*/
2350
2351 static struct platform_driver udc_driver = {
2352         .shutdown       = pxa2xx_udc_shutdown,
2353         .remove         = __exit_p(pxa2xx_udc_remove),
2354         .suspend        = pxa2xx_udc_suspend,
2355         .resume         = pxa2xx_udc_resume,
2356         .driver         = {
2357                 .owner  = THIS_MODULE,
2358                 .name   = "pxa2xx-udc",
2359         },
2360 };
2361
2362 static int __init udc_init(void)
2363 {
2364         printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2365         return platform_driver_probe(&udc_driver, pxa2xx_udc_probe);
2366 }
2367 module_init(udc_init);
2368
2369 static void __exit udc_exit(void)
2370 {
2371         platform_driver_unregister(&udc_driver);
2372 }
2373 module_exit(udc_exit);
2374
2375 MODULE_DESCRIPTION(DRIVER_DESC);
2376 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2377 MODULE_LICENSE("GPL");
2378