2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/kernel.h>
35 #include <linux/ethtool.h>
36 #include <linux/netdevice.h>
41 #define MLX4_EN_PARM_INT(X, def_val, desc) \
42 static unsigned int X = def_val;\
43 module_param(X , uint, 0444); \
44 MODULE_PARM_DESC(X, desc);
48 * Device scope module parameters
52 /* Use a XOR rathern than Toeplitz hash function for RSS */
53 MLX4_EN_PARM_INT(rss_xor, 0, "Use XOR hash function for RSS");
55 /* RSS hash type mask - default to <saddr, daddr, sport, dport> */
56 MLX4_EN_PARM_INT(rss_mask, 0xf, "RSS hash type bitmask");
58 /* Number of LRO sessions per Rx ring (rounded up to a power of two) */
59 MLX4_EN_PARM_INT(num_lro, MLX4_EN_MAX_LRO_DESCRIPTORS,
60 "Number of LRO sessions per ring or disabled (0)");
62 /* Priority pausing */
63 MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
64 " Per priority bit mask");
65 MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
66 " Per priority bit mask");
68 int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
70 struct mlx4_en_profile *params = &mdev->profile;
73 params->rss_xor = (rss_xor != 0);
74 params->rss_mask = rss_mask & 0x1f;
75 params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS);
76 for (i = 1; i <= MLX4_MAX_PORTS; i++) {
77 params->prof[i].rx_pause = 1;
78 params->prof[i].rx_ppp = pfcrx;
79 params->prof[i].tx_pause = 1;
80 params->prof[i].tx_ppp = pfctx;
81 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
82 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
85 params->prof[1].tx_ring_num = MLX4_EN_TX_RING_NUM;
86 params->prof[2].tx_ring_num = MLX4_EN_TX_RING_NUM;
88 params->prof[1].tx_ring_num = 1;
89 params->prof[2].tx_ring_num = 1;
100 static void mlx4_en_update_lro_stats(struct mlx4_en_priv *priv)
104 priv->port_stats.lro_aggregated = 0;
105 priv->port_stats.lro_flushed = 0;
106 priv->port_stats.lro_no_desc = 0;
108 for (i = 0; i < priv->rx_ring_num; i++) {
109 priv->port_stats.lro_aggregated += priv->rx_ring[i].lro.stats.aggregated;
110 priv->port_stats.lro_flushed += priv->rx_ring[i].lro.stats.flushed;
111 priv->port_stats.lro_no_desc += priv->rx_ring[i].lro.stats.no_desc;
116 mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
118 struct mlx4_en_priv *priv = netdev_priv(dev);
119 struct mlx4_en_dev *mdev = priv->mdev;
121 sprintf(drvinfo->driver, DRV_NAME " (%s)", mdev->dev->board_id);
122 strncpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")", 32);
123 sprintf(drvinfo->fw_version, "%d.%d.%d",
124 (u16) (mdev->dev->caps.fw_ver >> 32),
125 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
126 (u16) (mdev->dev->caps.fw_ver & 0xffff));
127 strncpy(drvinfo->bus_info, pci_name(mdev->dev->pdev), 32);
128 drvinfo->n_stats = 0;
129 drvinfo->regdump_len = 0;
130 drvinfo->eedump_len = 0;
133 static u32 mlx4_en_get_tso(struct net_device *dev)
135 return (dev->features & NETIF_F_TSO) != 0;
138 static int mlx4_en_set_tso(struct net_device *dev, u32 data)
140 struct mlx4_en_priv *priv = netdev_priv(dev);
143 if (!priv->mdev->LSO_support)
145 dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
147 dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
151 static u32 mlx4_en_get_rx_csum(struct net_device *dev)
153 struct mlx4_en_priv *priv = netdev_priv(dev);
154 return priv->rx_csum;
157 static int mlx4_en_set_rx_csum(struct net_device *dev, u32 data)
159 struct mlx4_en_priv *priv = netdev_priv(dev);
160 priv->rx_csum = (data != 0);
164 static const char main_strings[][ETH_GSTRING_LEN] = {
165 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
166 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
167 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
168 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
169 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
170 "tx_heartbeat_errors", "tx_window_errors",
172 /* port statistics */
173 "lro_aggregated", "lro_flushed", "lro_no_desc", "tso_packets",
174 "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
175 "rx_csum_good", "rx_csum_none", "tx_chksum_offload",
177 /* packet statistics */
178 "broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3",
179 "rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0",
180 "tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5",
181 "tx_prio_6", "tx_prio_7",
183 #define NUM_MAIN_STATS 21
184 #define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)
186 static u32 mlx4_en_get_msglevel(struct net_device *dev)
188 return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
191 static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
193 ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
196 static void mlx4_en_get_wol(struct net_device *netdev,
197 struct ethtool_wolinfo *wol)
205 static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
207 struct mlx4_en_priv *priv = netdev_priv(dev);
209 if (sset != ETH_SS_STATS)
212 return NUM_ALL_STATS + (priv->tx_ring_num + priv->rx_ring_num) * 2;
215 static void mlx4_en_get_ethtool_stats(struct net_device *dev,
216 struct ethtool_stats *stats, uint64_t *data)
218 struct mlx4_en_priv *priv = netdev_priv(dev);
222 spin_lock_bh(&priv->stats_lock);
224 mlx4_en_update_lro_stats(priv);
226 for (i = 0; i < NUM_MAIN_STATS; i++)
227 data[index++] = ((unsigned long *) &priv->stats)[i];
228 for (i = 0; i < NUM_PORT_STATS; i++)
229 data[index++] = ((unsigned long *) &priv->port_stats)[i];
230 for (i = 0; i < priv->tx_ring_num; i++) {
231 data[index++] = priv->tx_ring[i].packets;
232 data[index++] = priv->tx_ring[i].bytes;
234 for (i = 0; i < priv->rx_ring_num; i++) {
235 data[index++] = priv->rx_ring[i].packets;
236 data[index++] = priv->rx_ring[i].bytes;
238 for (i = 0; i < NUM_PKT_STATS; i++)
239 data[index++] = ((unsigned long *) &priv->pkstats)[i];
240 spin_unlock_bh(&priv->stats_lock);
244 static void mlx4_en_get_strings(struct net_device *dev,
245 uint32_t stringset, uint8_t *data)
247 struct mlx4_en_priv *priv = netdev_priv(dev);
251 if (stringset != ETH_SS_STATS)
254 /* Add main counters */
255 for (i = 0; i < NUM_MAIN_STATS; i++)
256 strcpy(data + (index++) * ETH_GSTRING_LEN, main_strings[i]);
257 for (i = 0; i < NUM_PORT_STATS; i++)
258 strcpy(data + (index++) * ETH_GSTRING_LEN,
259 main_strings[i + NUM_MAIN_STATS]);
260 for (i = 0; i < priv->tx_ring_num; i++) {
261 sprintf(data + (index++) * ETH_GSTRING_LEN,
263 sprintf(data + (index++) * ETH_GSTRING_LEN,
266 for (i = 0; i < priv->rx_ring_num; i++) {
267 sprintf(data + (index++) * ETH_GSTRING_LEN,
269 sprintf(data + (index++) * ETH_GSTRING_LEN,
272 for (i = 0; i < NUM_PKT_STATS; i++)
273 strcpy(data + (index++) * ETH_GSTRING_LEN,
274 main_strings[i + NUM_MAIN_STATS + NUM_PORT_STATS]);
277 static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
279 cmd->autoneg = AUTONEG_DISABLE;
280 cmd->supported = SUPPORTED_10000baseT_Full;
281 cmd->advertising = SUPPORTED_10000baseT_Full;
282 if (netif_carrier_ok(dev)) {
283 cmd->speed = SPEED_10000;
284 cmd->duplex = DUPLEX_FULL;
292 static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
294 if ((cmd->autoneg == AUTONEG_ENABLE) ||
295 (cmd->speed != SPEED_10000) || (cmd->duplex != DUPLEX_FULL))
298 /* Nothing to change */
302 static int mlx4_en_get_coalesce(struct net_device *dev,
303 struct ethtool_coalesce *coal)
305 struct mlx4_en_priv *priv = netdev_priv(dev);
307 coal->tx_coalesce_usecs = 0;
308 coal->tx_max_coalesced_frames = 0;
309 coal->rx_coalesce_usecs = priv->rx_usecs;
310 coal->rx_max_coalesced_frames = priv->rx_frames;
312 coal->pkt_rate_low = priv->pkt_rate_low;
313 coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
314 coal->pkt_rate_high = priv->pkt_rate_high;
315 coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
316 coal->rate_sample_interval = priv->sample_interval;
317 coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
321 static int mlx4_en_set_coalesce(struct net_device *dev,
322 struct ethtool_coalesce *coal)
324 struct mlx4_en_priv *priv = netdev_priv(dev);
327 priv->rx_frames = (coal->rx_max_coalesced_frames ==
329 MLX4_EN_RX_COAL_TARGET /
331 coal->rx_max_coalesced_frames;
332 priv->rx_usecs = (coal->rx_coalesce_usecs ==
334 MLX4_EN_RX_COAL_TIME :
335 coal->rx_coalesce_usecs;
337 /* Set adaptive coalescing params */
338 priv->pkt_rate_low = coal->pkt_rate_low;
339 priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
340 priv->pkt_rate_high = coal->pkt_rate_high;
341 priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
342 priv->sample_interval = coal->rate_sample_interval;
343 priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
344 priv->last_moder_time = MLX4_EN_AUTO_CONF;
345 if (priv->adaptive_rx_coal)
348 for (i = 0; i < priv->rx_ring_num; i++) {
349 priv->rx_cq[i].moder_cnt = priv->rx_frames;
350 priv->rx_cq[i].moder_time = priv->rx_usecs;
351 err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
358 static int mlx4_en_set_pauseparam(struct net_device *dev,
359 struct ethtool_pauseparam *pause)
361 struct mlx4_en_priv *priv = netdev_priv(dev);
362 struct mlx4_en_dev *mdev = priv->mdev;
365 priv->prof->tx_pause = pause->tx_pause != 0;
366 priv->prof->rx_pause = pause->rx_pause != 0;
367 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
368 priv->rx_skb_size + ETH_FCS_LEN,
369 priv->prof->tx_pause,
371 priv->prof->rx_pause,
374 mlx4_err(mdev, "Failed setting pause params to\n");
379 static void mlx4_en_get_pauseparam(struct net_device *dev,
380 struct ethtool_pauseparam *pause)
382 struct mlx4_en_priv *priv = netdev_priv(dev);
384 pause->tx_pause = priv->prof->tx_pause;
385 pause->rx_pause = priv->prof->rx_pause;
388 static int mlx4_en_set_ringparam(struct net_device *dev,
389 struct ethtool_ringparam *param)
391 struct mlx4_en_priv *priv = netdev_priv(dev);
392 struct mlx4_en_dev *mdev = priv->mdev;
393 u32 rx_size, tx_size;
397 if (param->rx_jumbo_pending || param->rx_mini_pending)
400 rx_size = roundup_pow_of_two(param->rx_pending);
401 rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
402 tx_size = roundup_pow_of_two(param->tx_pending);
403 tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
405 if (rx_size == priv->prof->rx_ring_size &&
406 tx_size == priv->prof->tx_ring_size)
409 mutex_lock(&mdev->state_lock);
412 mlx4_en_stop_port(dev);
415 mlx4_en_free_resources(priv);
417 priv->prof->tx_ring_size = tx_size;
418 priv->prof->rx_ring_size = rx_size;
420 err = mlx4_en_alloc_resources(priv);
422 mlx4_err(mdev, "Failed reallocating port resources\n");
426 err = mlx4_en_start_port(dev);
428 mlx4_err(mdev, "Failed starting port\n");
432 mutex_unlock(&mdev->state_lock);
436 static void mlx4_en_get_ringparam(struct net_device *dev,
437 struct ethtool_ringparam *param)
439 struct mlx4_en_priv *priv = netdev_priv(dev);
440 struct mlx4_en_dev *mdev = priv->mdev;
442 memset(param, 0, sizeof(*param));
443 param->rx_max_pending = mdev->dev->caps.max_rq_sg;
444 param->tx_max_pending = mdev->dev->caps.max_sq_sg;
445 param->rx_pending = mdev->profile.prof[priv->port].rx_ring_size;
446 param->tx_pending = mdev->profile.prof[priv->port].tx_ring_size;
449 const struct ethtool_ops mlx4_en_ethtool_ops = {
450 .get_drvinfo = mlx4_en_get_drvinfo,
451 .get_settings = mlx4_en_get_settings,
452 .set_settings = mlx4_en_set_settings,
454 .get_tso = mlx4_en_get_tso,
455 .set_tso = mlx4_en_set_tso,
457 .get_sg = ethtool_op_get_sg,
458 .set_sg = ethtool_op_set_sg,
459 .get_link = ethtool_op_get_link,
460 .get_rx_csum = mlx4_en_get_rx_csum,
461 .set_rx_csum = mlx4_en_set_rx_csum,
462 .get_tx_csum = ethtool_op_get_tx_csum,
463 .set_tx_csum = ethtool_op_set_tx_ipv6_csum,
464 .get_strings = mlx4_en_get_strings,
465 .get_sset_count = mlx4_en_get_sset_count,
466 .get_ethtool_stats = mlx4_en_get_ethtool_stats,
467 .get_wol = mlx4_en_get_wol,
468 .get_msglevel = mlx4_en_get_msglevel,
469 .set_msglevel = mlx4_en_set_msglevel,
470 .get_coalesce = mlx4_en_get_coalesce,
471 .set_coalesce = mlx4_en_set_coalesce,
472 .get_pauseparam = mlx4_en_get_pauseparam,
473 .set_pauseparam = mlx4_en_set_pauseparam,
474 .get_ringparam = mlx4_en_get_ringparam,
475 .set_ringparam = mlx4_en_set_ringparam,
476 .get_flags = ethtool_op_get_flags,
477 .set_flags = ethtool_op_set_flags,