phylib: Add support for board-level PHY fixups
[linux-2.6] / drivers / net / pasemi_mac.c
1 /*
2  * Copyright (C) 2006-2007 PA Semi, Inc
3  *
4  * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18  */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
29 #include <linux/in.h>
30 #include <linux/skbuff.h>
31
32 #include <linux/ip.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
35 #include <linux/inet_lro.h>
36
37 #include <asm/irq.h>
38 #include <asm/firmware.h>
39 #include <asm/pasemi_dma.h>
40
41 #include "pasemi_mac.h"
42
43 /* We have our own align, since ppc64 in general has it at 0 because
44  * of design flaws in some of the server bridge chips. However, for
45  * PWRficient doing the unaligned copies is more expensive than doing
46  * unaligned DMA, so make sure the data is aligned instead.
47  */
48 #define LOCAL_SKB_ALIGN 2
49
50 /* TODO list
51  *
52  * - Multicast support
53  * - Large MTU support
54  * - SW LRO
55  * - Multiqueue RX/TX
56  */
57
58
59 /* Must be a power of two */
60 #define RX_RING_SIZE 2048
61 #define TX_RING_SIZE 4096
62
63 #define LRO_MAX_AGGR 64
64
65 #define PE_MIN_MTU      64
66 #define PE_MAX_MTU      1500
67 #define PE_DEF_MTU      ETH_DATA_LEN
68
69 #define DEFAULT_MSG_ENABLE        \
70         (NETIF_MSG_DRV          | \
71          NETIF_MSG_PROBE        | \
72          NETIF_MSG_LINK         | \
73          NETIF_MSG_TIMER        | \
74          NETIF_MSG_IFDOWN       | \
75          NETIF_MSG_IFUP         | \
76          NETIF_MSG_RX_ERR       | \
77          NETIF_MSG_TX_ERR)
78
79 #define TX_DESC(tx, num)        ((tx)->chan.ring_virt[(num) & (TX_RING_SIZE-1)])
80 #define TX_DESC_INFO(tx, num)   ((tx)->ring_info[(num) & (TX_RING_SIZE-1)])
81 #define RX_DESC(rx, num)        ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)])
82 #define RX_DESC_INFO(rx, num)   ((rx)->ring_info[(num) & (RX_RING_SIZE-1)])
83 #define RX_BUFF(rx, num)        ((rx)->buffers[(num) & (RX_RING_SIZE-1)])
84
85 #define RING_USED(ring)         (((ring)->next_to_fill - (ring)->next_to_clean) \
86                                  & ((ring)->size - 1))
87 #define RING_AVAIL(ring)        ((ring->size) - RING_USED(ring))
88
89 MODULE_LICENSE("GPL");
90 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
91 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
92
93 static int debug = -1;  /* -1 == use DEFAULT_MSG_ENABLE as value */
94 module_param(debug, int, 0);
95 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
96
97 static int translation_enabled(void)
98 {
99 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
100         return 1;
101 #else
102         return firmware_has_feature(FW_FEATURE_LPAR);
103 #endif
104 }
105
106 static void write_iob_reg(unsigned int reg, unsigned int val)
107 {
108         pasemi_write_iob_reg(reg, val);
109 }
110
111 static unsigned int read_mac_reg(const struct pasemi_mac *mac, unsigned int reg)
112 {
113         return pasemi_read_mac_reg(mac->dma_if, reg);
114 }
115
116 static void write_mac_reg(const struct pasemi_mac *mac, unsigned int reg,
117                           unsigned int val)
118 {
119         pasemi_write_mac_reg(mac->dma_if, reg, val);
120 }
121
122 static unsigned int read_dma_reg(unsigned int reg)
123 {
124         return pasemi_read_dma_reg(reg);
125 }
126
127 static void write_dma_reg(unsigned int reg, unsigned int val)
128 {
129         pasemi_write_dma_reg(reg, val);
130 }
131
132 static struct pasemi_mac_rxring *rx_ring(const struct pasemi_mac *mac)
133 {
134         return mac->rx;
135 }
136
137 static struct pasemi_mac_txring *tx_ring(const struct pasemi_mac *mac)
138 {
139         return mac->tx;
140 }
141
142 static inline void prefetch_skb(const struct sk_buff *skb)
143 {
144         const void *d = skb;
145
146         prefetch(d);
147         prefetch(d+64);
148         prefetch(d+128);
149         prefetch(d+192);
150 }
151
152 static int mac_to_intf(struct pasemi_mac *mac)
153 {
154         struct pci_dev *pdev = mac->pdev;
155         u32 tmp;
156         int nintf, off, i, j;
157         int devfn = pdev->devfn;
158
159         tmp = read_dma_reg(PAS_DMA_CAP_IFI);
160         nintf = (tmp & PAS_DMA_CAP_IFI_NIN_M) >> PAS_DMA_CAP_IFI_NIN_S;
161         off = (tmp & PAS_DMA_CAP_IFI_IOFF_M) >> PAS_DMA_CAP_IFI_IOFF_S;
162
163         /* IOFF contains the offset to the registers containing the
164          * DMA interface-to-MAC-pci-id mappings, and NIN contains number
165          * of total interfaces. Each register contains 4 devfns.
166          * Just do a linear search until we find the devfn of the MAC
167          * we're trying to look up.
168          */
169
170         for (i = 0; i < (nintf+3)/4; i++) {
171                 tmp = read_dma_reg(off+4*i);
172                 for (j = 0; j < 4; j++) {
173                         if (((tmp >> (8*j)) & 0xff) == devfn)
174                                 return i*4 + j;
175                 }
176         }
177         return -1;
178 }
179
180 static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
181 {
182         unsigned int flags;
183
184         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
185         flags &= ~PAS_MAC_CFG_PCFG_PE;
186         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
187 }
188
189 static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
190 {
191         unsigned int flags;
192
193         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
194         flags |= PAS_MAC_CFG_PCFG_PE;
195         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
196 }
197
198 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
199 {
200         struct pci_dev *pdev = mac->pdev;
201         struct device_node *dn = pci_device_to_OF_node(pdev);
202         int len;
203         const u8 *maddr;
204         u8 addr[6];
205
206         if (!dn) {
207                 dev_dbg(&pdev->dev,
208                           "No device node for mac, not configuring\n");
209                 return -ENOENT;
210         }
211
212         maddr = of_get_property(dn, "local-mac-address", &len);
213
214         if (maddr && len == 6) {
215                 memcpy(mac->mac_addr, maddr, 6);
216                 return 0;
217         }
218
219         /* Some old versions of firmware mistakenly uses mac-address
220          * (and as a string) instead of a byte array in local-mac-address.
221          */
222
223         if (maddr == NULL)
224                 maddr = of_get_property(dn, "mac-address", NULL);
225
226         if (maddr == NULL) {
227                 dev_warn(&pdev->dev,
228                          "no mac address in device tree, not configuring\n");
229                 return -ENOENT;
230         }
231
232         if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
233                    &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
234                 dev_warn(&pdev->dev,
235                          "can't parse mac address, not configuring\n");
236                 return -EINVAL;
237         }
238
239         memcpy(mac->mac_addr, addr, 6);
240
241         return 0;
242 }
243
244 static int pasemi_mac_set_mac_addr(struct net_device *dev, void *p)
245 {
246         struct pasemi_mac *mac = netdev_priv(dev);
247         struct sockaddr *addr = p;
248         unsigned int adr0, adr1;
249
250         if (!is_valid_ether_addr(addr->sa_data))
251                 return -EINVAL;
252
253         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
254
255         adr0 = dev->dev_addr[2] << 24 |
256                dev->dev_addr[3] << 16 |
257                dev->dev_addr[4] << 8 |
258                dev->dev_addr[5];
259         adr1 = read_mac_reg(mac, PAS_MAC_CFG_ADR1);
260         adr1 &= ~0xffff;
261         adr1 |= dev->dev_addr[0] << 8 | dev->dev_addr[1];
262
263         pasemi_mac_intf_disable(mac);
264         write_mac_reg(mac, PAS_MAC_CFG_ADR0, adr0);
265         write_mac_reg(mac, PAS_MAC_CFG_ADR1, adr1);
266         pasemi_mac_intf_enable(mac);
267
268         return 0;
269 }
270
271 static int get_skb_hdr(struct sk_buff *skb, void **iphdr,
272                        void **tcph, u64 *hdr_flags, void *data)
273 {
274         u64 macrx = (u64) data;
275         unsigned int ip_len;
276         struct iphdr *iph;
277
278         /* IPv4 header checksum failed */
279         if ((macrx & XCT_MACRX_HTY_M) != XCT_MACRX_HTY_IPV4_OK)
280                 return -1;
281
282         /* non tcp packet */
283         skb_reset_network_header(skb);
284         iph = ip_hdr(skb);
285         if (iph->protocol != IPPROTO_TCP)
286                 return -1;
287
288         ip_len = ip_hdrlen(skb);
289         skb_set_transport_header(skb, ip_len);
290         *tcph = tcp_hdr(skb);
291
292         /* check if ip header and tcp header are complete */
293         if (iph->tot_len < ip_len + tcp_hdrlen(skb))
294                 return -1;
295
296         *hdr_flags = LRO_IPV4 | LRO_TCP;
297         *iphdr = iph;
298
299         return 0;
300 }
301
302 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
303                                     const int nfrags,
304                                     struct sk_buff *skb,
305                                     const dma_addr_t *dmas)
306 {
307         int f;
308         struct pci_dev *pdev = mac->dma_pdev;
309
310         pci_unmap_single(pdev, dmas[0], skb_headlen(skb), PCI_DMA_TODEVICE);
311
312         for (f = 0; f < nfrags; f++) {
313                 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
314
315                 pci_unmap_page(pdev, dmas[f+1], frag->size, PCI_DMA_TODEVICE);
316         }
317         dev_kfree_skb_irq(skb);
318
319         /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
320          * aligned up to a power of 2
321          */
322         return (nfrags + 3) & ~1;
323 }
324
325 static int pasemi_mac_setup_rx_resources(const struct net_device *dev)
326 {
327         struct pasemi_mac_rxring *ring;
328         struct pasemi_mac *mac = netdev_priv(dev);
329         int chno;
330         unsigned int cfg;
331
332         ring = pasemi_dma_alloc_chan(RXCHAN, sizeof(struct pasemi_mac_rxring),
333                                      offsetof(struct pasemi_mac_rxring, chan));
334
335         if (!ring) {
336                 dev_err(&mac->pdev->dev, "Can't allocate RX channel\n");
337                 goto out_chan;
338         }
339         chno = ring->chan.chno;
340
341         spin_lock_init(&ring->lock);
342
343         ring->size = RX_RING_SIZE;
344         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
345                                   RX_RING_SIZE, GFP_KERNEL);
346
347         if (!ring->ring_info)
348                 goto out_ring_info;
349
350         /* Allocate descriptors */
351         if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
352                 goto out_ring_desc;
353
354         ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
355                                            RX_RING_SIZE * sizeof(u64),
356                                            &ring->buf_dma, GFP_KERNEL);
357         if (!ring->buffers)
358                 goto out_ring_desc;
359
360         memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
361
362         write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
363                       PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
364
365         write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
366                       PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
367                       PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
368
369         cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
370
371         if (translation_enabled())
372                 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
373
374         write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
375
376         write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
377                       PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
378
379         write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
380                       PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
381                       PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
382
383         cfg = PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2 |
384               PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
385               PAS_DMA_RXINT_CFG_HEN;
386
387         if (translation_enabled())
388                 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
389
390         write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
391
392         ring->next_to_fill = 0;
393         ring->next_to_clean = 0;
394         ring->mac = mac;
395         mac->rx = ring;
396
397         return 0;
398
399 out_ring_desc:
400         kfree(ring->ring_info);
401 out_ring_info:
402         pasemi_dma_free_chan(&ring->chan);
403 out_chan:
404         return -ENOMEM;
405 }
406
407 static struct pasemi_mac_txring *
408 pasemi_mac_setup_tx_resources(const struct net_device *dev)
409 {
410         struct pasemi_mac *mac = netdev_priv(dev);
411         u32 val;
412         struct pasemi_mac_txring *ring;
413         unsigned int cfg;
414         int chno;
415
416         ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_txring),
417                                      offsetof(struct pasemi_mac_txring, chan));
418
419         if (!ring) {
420                 dev_err(&mac->pdev->dev, "Can't allocate TX channel\n");
421                 goto out_chan;
422         }
423
424         chno = ring->chan.chno;
425
426         spin_lock_init(&ring->lock);
427
428         ring->size = TX_RING_SIZE;
429         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
430                                   TX_RING_SIZE, GFP_KERNEL);
431         if (!ring->ring_info)
432                 goto out_ring_info;
433
434         /* Allocate descriptors */
435         if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
436                 goto out_ring_desc;
437
438         write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
439                       PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
440         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
441         val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
442
443         write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
444
445         cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
446               PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
447               PAS_DMA_TXCHAN_CFG_UP |
448               PAS_DMA_TXCHAN_CFG_WT(2);
449
450         if (translation_enabled())
451                 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
452
453         write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
454
455         ring->next_to_fill = 0;
456         ring->next_to_clean = 0;
457         ring->mac = mac;
458
459         return ring;
460
461 out_ring_desc:
462         kfree(ring->ring_info);
463 out_ring_info:
464         pasemi_dma_free_chan(&ring->chan);
465 out_chan:
466         return NULL;
467 }
468
469 static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
470 {
471         struct pasemi_mac_txring *txring = tx_ring(mac);
472         unsigned int i, j;
473         struct pasemi_mac_buffer *info;
474         dma_addr_t dmas[MAX_SKB_FRAGS+1];
475         int freed, nfrags;
476         int start, limit;
477
478         start = txring->next_to_clean;
479         limit = txring->next_to_fill;
480
481         /* Compensate for when fill has wrapped and clean has not */
482         if (start > limit)
483                 limit += TX_RING_SIZE;
484
485         for (i = start; i < limit; i += freed) {
486                 info = &txring->ring_info[(i+1) & (TX_RING_SIZE-1)];
487                 if (info->dma && info->skb) {
488                         nfrags = skb_shinfo(info->skb)->nr_frags;
489                         for (j = 0; j <= nfrags; j++)
490                                 dmas[j] = txring->ring_info[(i+1+j) &
491                                                 (TX_RING_SIZE-1)].dma;
492                         freed = pasemi_mac_unmap_tx_skb(mac, nfrags,
493                                                         info->skb, dmas);
494                 } else
495                         freed = 2;
496         }
497
498         kfree(txring->ring_info);
499         pasemi_dma_free_chan(&txring->chan);
500
501 }
502
503 static void pasemi_mac_free_rx_buffers(struct pasemi_mac *mac)
504 {
505         struct pasemi_mac_rxring *rx = rx_ring(mac);
506         unsigned int i;
507         struct pasemi_mac_buffer *info;
508
509         for (i = 0; i < RX_RING_SIZE; i++) {
510                 info = &RX_DESC_INFO(rx, i);
511                 if (info->skb && info->dma) {
512                         pci_unmap_single(mac->dma_pdev,
513                                          info->dma,
514                                          info->skb->len,
515                                          PCI_DMA_FROMDEVICE);
516                         dev_kfree_skb_any(info->skb);
517                 }
518                 info->dma = 0;
519                 info->skb = NULL;
520         }
521
522         for (i = 0; i < RX_RING_SIZE; i++)
523                 RX_BUFF(rx, i) = 0;
524 }
525
526 static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
527 {
528         pasemi_mac_free_rx_buffers(mac);
529
530         dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
531                           rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
532
533         kfree(rx_ring(mac)->ring_info);
534         pasemi_dma_free_chan(&rx_ring(mac)->chan);
535         mac->rx = NULL;
536 }
537
538 static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,
539                                          const int limit)
540 {
541         const struct pasemi_mac *mac = netdev_priv(dev);
542         struct pasemi_mac_rxring *rx = rx_ring(mac);
543         int fill, count;
544
545         if (limit <= 0)
546                 return;
547
548         fill = rx_ring(mac)->next_to_fill;
549         for (count = 0; count < limit; count++) {
550                 struct pasemi_mac_buffer *info = &RX_DESC_INFO(rx, fill);
551                 u64 *buff = &RX_BUFF(rx, fill);
552                 struct sk_buff *skb;
553                 dma_addr_t dma;
554
555                 /* Entry in use? */
556                 WARN_ON(*buff);
557
558                 skb = dev_alloc_skb(mac->bufsz);
559                 skb_reserve(skb, LOCAL_SKB_ALIGN);
560
561                 if (unlikely(!skb))
562                         break;
563
564                 dma = pci_map_single(mac->dma_pdev, skb->data,
565                                      mac->bufsz - LOCAL_SKB_ALIGN,
566                                      PCI_DMA_FROMDEVICE);
567
568                 if (unlikely(dma_mapping_error(dma))) {
569                         dev_kfree_skb_irq(info->skb);
570                         break;
571                 }
572
573                 info->skb = skb;
574                 info->dma = dma;
575                 *buff = XCT_RXB_LEN(mac->bufsz) | XCT_RXB_ADDR(dma);
576                 fill++;
577         }
578
579         wmb();
580
581         write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
582
583         rx_ring(mac)->next_to_fill = (rx_ring(mac)->next_to_fill + count) &
584                                 (RX_RING_SIZE - 1);
585 }
586
587 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac)
588 {
589         struct pasemi_mac_rxring *rx = rx_ring(mac);
590         unsigned int reg, pcnt;
591         /* Re-enable packet count interrupts: finally
592          * ack the packet count interrupt we got in rx_intr.
593          */
594
595         pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
596
597         reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
598
599         if (*rx->chan.status & PAS_STATUS_TIMER)
600                 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
601
602         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
603 }
604
605 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac *mac)
606 {
607         unsigned int reg, pcnt;
608
609         /* Re-enable packet count interrupts */
610         pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
611
612         reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
613
614         write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
615 }
616
617
618 static inline void pasemi_mac_rx_error(const struct pasemi_mac *mac,
619                                        const u64 macrx)
620 {
621         unsigned int rcmdsta, ccmdsta;
622         struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
623
624         if (!netif_msg_rx_err(mac))
625                 return;
626
627         rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
628         ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
629
630         printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
631                 macrx, *chan->status);
632
633         printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
634                 rcmdsta, ccmdsta);
635 }
636
637 static inline void pasemi_mac_tx_error(const struct pasemi_mac *mac,
638                                        const u64 mactx)
639 {
640         unsigned int cmdsta;
641         struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
642
643         if (!netif_msg_tx_err(mac))
644                 return;
645
646         cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
647
648         printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
649                 "tx status 0x%016lx\n", mactx, *chan->status);
650
651         printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
652 }
653
654 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
655                                const int limit)
656 {
657         const struct pasemi_dmachan *chan = &rx->chan;
658         struct pasemi_mac *mac = rx->mac;
659         struct pci_dev *pdev = mac->dma_pdev;
660         unsigned int n;
661         int count, buf_index, tot_bytes, packets;
662         struct pasemi_mac_buffer *info;
663         struct sk_buff *skb;
664         unsigned int len;
665         u64 macrx, eval;
666         dma_addr_t dma;
667
668         tot_bytes = 0;
669         packets = 0;
670
671         spin_lock(&rx->lock);
672
673         n = rx->next_to_clean;
674
675         prefetch(&RX_DESC(rx, n));
676
677         for (count = 0; count < limit; count++) {
678                 macrx = RX_DESC(rx, n);
679                 prefetch(&RX_DESC(rx, n+4));
680
681                 if ((macrx & XCT_MACRX_E) ||
682                     (*chan->status & PAS_STATUS_ERROR))
683                         pasemi_mac_rx_error(mac, macrx);
684
685                 if (!(macrx & XCT_MACRX_O))
686                         break;
687
688                 info = NULL;
689
690                 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
691
692                 eval = (RX_DESC(rx, n+1) & XCT_RXRES_8B_EVAL_M) >>
693                         XCT_RXRES_8B_EVAL_S;
694                 buf_index = eval-1;
695
696                 dma = (RX_DESC(rx, n+2) & XCT_PTR_ADDR_M);
697                 info = &RX_DESC_INFO(rx, buf_index);
698
699                 skb = info->skb;
700
701                 prefetch_skb(skb);
702
703                 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
704
705                 pci_unmap_single(pdev, dma, mac->bufsz - LOCAL_SKB_ALIGN,
706                                  PCI_DMA_FROMDEVICE);
707
708                 if (macrx & XCT_MACRX_CRC) {
709                         /* CRC error flagged */
710                         mac->netdev->stats.rx_errors++;
711                         mac->netdev->stats.rx_crc_errors++;
712                         /* No need to free skb, it'll be reused */
713                         goto next;
714                 }
715
716                 info->skb = NULL;
717                 info->dma = 0;
718
719                 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
720                         skb->ip_summed = CHECKSUM_UNNECESSARY;
721                         skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
722                                            XCT_MACRX_CSUM_S;
723                 } else
724                         skb->ip_summed = CHECKSUM_NONE;
725
726                 packets++;
727                 tot_bytes += len;
728
729                 /* Don't include CRC */
730                 skb_put(skb, len-4);
731
732                 skb->protocol = eth_type_trans(skb, mac->netdev);
733                 lro_receive_skb(&mac->lro_mgr, skb, (void *)macrx);
734
735 next:
736                 RX_DESC(rx, n) = 0;
737                 RX_DESC(rx, n+1) = 0;
738
739                 /* Need to zero it out since hardware doesn't, since the
740                  * replenish loop uses it to tell when it's done.
741                  */
742                 RX_BUFF(rx, buf_index) = 0;
743
744                 n += 4;
745         }
746
747         if (n > RX_RING_SIZE) {
748                 /* Errata 5971 workaround: L2 target of headers */
749                 write_iob_reg(PAS_IOB_COM_PKTHDRCNT, 0);
750                 n &= (RX_RING_SIZE-1);
751         }
752
753         rx_ring(mac)->next_to_clean = n;
754
755         lro_flush_all(&mac->lro_mgr);
756
757         /* Increase is in number of 16-byte entries, and since each descriptor
758          * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
759          * count*2.
760          */
761         write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
762
763         pasemi_mac_replenish_rx_ring(mac->netdev, count);
764
765         mac->netdev->stats.rx_bytes += tot_bytes;
766         mac->netdev->stats.rx_packets += packets;
767
768         spin_unlock(&rx_ring(mac)->lock);
769
770         return count;
771 }
772
773 /* Can't make this too large or we blow the kernel stack limits */
774 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
775
776 static int pasemi_mac_clean_tx(struct pasemi_mac_txring *txring)
777 {
778         struct pasemi_dmachan *chan = &txring->chan;
779         struct pasemi_mac *mac = txring->mac;
780         int i, j;
781         unsigned int start, descr_count, buf_count, batch_limit;
782         unsigned int ring_limit;
783         unsigned int total_count;
784         unsigned long flags;
785         struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
786         dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
787         int nf[TX_CLEAN_BATCHSIZE];
788         int nr_frags;
789
790         total_count = 0;
791         batch_limit = TX_CLEAN_BATCHSIZE;
792 restart:
793         spin_lock_irqsave(&txring->lock, flags);
794
795         start = txring->next_to_clean;
796         ring_limit = txring->next_to_fill;
797
798         prefetch(&TX_DESC_INFO(txring, start+1).skb);
799
800         /* Compensate for when fill has wrapped but clean has not */
801         if (start > ring_limit)
802                 ring_limit += TX_RING_SIZE;
803
804         buf_count = 0;
805         descr_count = 0;
806
807         for (i = start;
808              descr_count < batch_limit && i < ring_limit;
809              i += buf_count) {
810                 u64 mactx = TX_DESC(txring, i);
811                 struct sk_buff *skb;
812
813                 skb = TX_DESC_INFO(txring, i+1).skb;
814                 nr_frags = TX_DESC_INFO(txring, i).dma;
815
816                 if ((mactx  & XCT_MACTX_E) ||
817                     (*chan->status & PAS_STATUS_ERROR))
818                         pasemi_mac_tx_error(mac, mactx);
819
820                 if (unlikely(mactx & XCT_MACTX_O))
821                         /* Not yet transmitted */
822                         break;
823
824                 buf_count = 2 + nr_frags;
825                 /* Since we always fill with an even number of entries, make
826                  * sure we skip any unused one at the end as well.
827                  */
828                 if (buf_count & 1)
829                         buf_count++;
830
831                 for (j = 0; j <= nr_frags; j++)
832                         dmas[descr_count][j] = TX_DESC_INFO(txring, i+1+j).dma;
833
834                 skbs[descr_count] = skb;
835                 nf[descr_count] = nr_frags;
836
837                 TX_DESC(txring, i) = 0;
838                 TX_DESC(txring, i+1) = 0;
839
840                 descr_count++;
841         }
842         txring->next_to_clean = i & (TX_RING_SIZE-1);
843
844         spin_unlock_irqrestore(&txring->lock, flags);
845         netif_wake_queue(mac->netdev);
846
847         for (i = 0; i < descr_count; i++)
848                 pasemi_mac_unmap_tx_skb(mac, nf[i], skbs[i], dmas[i]);
849
850         total_count += descr_count;
851
852         /* If the batch was full, try to clean more */
853         if (descr_count == batch_limit)
854                 goto restart;
855
856         return total_count;
857 }
858
859
860 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
861 {
862         const struct pasemi_mac_rxring *rxring = data;
863         struct pasemi_mac *mac = rxring->mac;
864         struct net_device *dev = mac->netdev;
865         const struct pasemi_dmachan *chan = &rxring->chan;
866         unsigned int reg;
867
868         if (!(*chan->status & PAS_STATUS_CAUSE_M))
869                 return IRQ_NONE;
870
871         /* Don't reset packet count so it won't fire again but clear
872          * all others.
873          */
874
875         reg = 0;
876         if (*chan->status & PAS_STATUS_SOFT)
877                 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
878         if (*chan->status & PAS_STATUS_ERROR)
879                 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
880
881         netif_rx_schedule(dev, &mac->napi);
882
883         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
884
885         return IRQ_HANDLED;
886 }
887
888 #define TX_CLEAN_INTERVAL HZ
889
890 static void pasemi_mac_tx_timer(unsigned long data)
891 {
892         struct pasemi_mac_txring *txring = (struct pasemi_mac_txring *)data;
893         struct pasemi_mac *mac = txring->mac;
894
895         pasemi_mac_clean_tx(txring);
896
897         mod_timer(&txring->clean_timer, jiffies + TX_CLEAN_INTERVAL);
898
899         pasemi_mac_restart_tx_intr(mac);
900 }
901
902 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
903 {
904         struct pasemi_mac_txring *txring = data;
905         const struct pasemi_dmachan *chan = &txring->chan;
906         struct pasemi_mac *mac = txring->mac;
907         unsigned int reg;
908
909         if (!(*chan->status & PAS_STATUS_CAUSE_M))
910                 return IRQ_NONE;
911
912         reg = 0;
913
914         if (*chan->status & PAS_STATUS_SOFT)
915                 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
916         if (*chan->status & PAS_STATUS_ERROR)
917                 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
918
919         mod_timer(&txring->clean_timer, jiffies + (TX_CLEAN_INTERVAL)*2);
920
921         netif_rx_schedule(mac->netdev, &mac->napi);
922
923         if (reg)
924                 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
925
926         return IRQ_HANDLED;
927 }
928
929 static void pasemi_adjust_link(struct net_device *dev)
930 {
931         struct pasemi_mac *mac = netdev_priv(dev);
932         int msg;
933         unsigned int flags;
934         unsigned int new_flags;
935
936         if (!mac->phydev->link) {
937                 /* If no link, MAC speed settings don't matter. Just report
938                  * link down and return.
939                  */
940                 if (mac->link && netif_msg_link(mac))
941                         printk(KERN_INFO "%s: Link is down.\n", dev->name);
942
943                 netif_carrier_off(dev);
944                 pasemi_mac_intf_disable(mac);
945                 mac->link = 0;
946
947                 return;
948         } else {
949                 pasemi_mac_intf_enable(mac);
950                 netif_carrier_on(dev);
951         }
952
953         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
954         new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
955                               PAS_MAC_CFG_PCFG_TSR_M);
956
957         if (!mac->phydev->duplex)
958                 new_flags |= PAS_MAC_CFG_PCFG_HD;
959
960         switch (mac->phydev->speed) {
961         case 1000:
962                 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
963                              PAS_MAC_CFG_PCFG_TSR_1G;
964                 break;
965         case 100:
966                 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
967                              PAS_MAC_CFG_PCFG_TSR_100M;
968                 break;
969         case 10:
970                 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
971                              PAS_MAC_CFG_PCFG_TSR_10M;
972                 break;
973         default:
974                 printk("Unsupported speed %d\n", mac->phydev->speed);
975         }
976
977         /* Print on link or speed/duplex change */
978         msg = mac->link != mac->phydev->link || flags != new_flags;
979
980         mac->duplex = mac->phydev->duplex;
981         mac->speed = mac->phydev->speed;
982         mac->link = mac->phydev->link;
983
984         if (new_flags != flags)
985                 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
986
987         if (msg && netif_msg_link(mac))
988                 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
989                        dev->name, mac->speed, mac->duplex ? "full" : "half");
990 }
991
992 static int pasemi_mac_phy_init(struct net_device *dev)
993 {
994         struct pasemi_mac *mac = netdev_priv(dev);
995         struct device_node *dn, *phy_dn;
996         struct phy_device *phydev;
997         unsigned int phy_id;
998         const phandle *ph;
999         const unsigned int *prop;
1000         struct resource r;
1001         int ret;
1002
1003         dn = pci_device_to_OF_node(mac->pdev);
1004         ph = of_get_property(dn, "phy-handle", NULL);
1005         if (!ph)
1006                 return -ENODEV;
1007         phy_dn = of_find_node_by_phandle(*ph);
1008
1009         prop = of_get_property(phy_dn, "reg", NULL);
1010         ret = of_address_to_resource(phy_dn->parent, 0, &r);
1011         if (ret)
1012                 goto err;
1013
1014         phy_id = *prop;
1015         snprintf(mac->phy_id, BUS_ID_SIZE, "%x:%02x", (int)r.start, phy_id);
1016
1017         of_node_put(phy_dn);
1018
1019         mac->link = 0;
1020         mac->speed = 0;
1021         mac->duplex = -1;
1022
1023         phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
1024
1025         if (IS_ERR(phydev)) {
1026                 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
1027                 return PTR_ERR(phydev);
1028         }
1029
1030         mac->phydev = phydev;
1031
1032         return 0;
1033
1034 err:
1035         of_node_put(phy_dn);
1036         return -ENODEV;
1037 }
1038
1039
1040 static int pasemi_mac_open(struct net_device *dev)
1041 {
1042         struct pasemi_mac *mac = netdev_priv(dev);
1043         unsigned int flags;
1044         int ret;
1045
1046         /* enable rx section */
1047         write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
1048
1049         /* enable tx section */
1050         write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
1051
1052         flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
1053                 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
1054                 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
1055
1056         write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
1057
1058         ret = pasemi_mac_setup_rx_resources(dev);
1059         if (ret)
1060                 goto out_rx_resources;
1061
1062         mac->tx = pasemi_mac_setup_tx_resources(dev);
1063
1064         if (!mac->tx)
1065                 goto out_tx_ring;
1066
1067         /* 0x3ff with 33MHz clock is about 31us */
1068         write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG,
1069                       PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
1070
1071         write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
1072                       PAS_IOB_DMA_RXCH_CFG_CNTTH(256));
1073
1074         write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
1075                       PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
1076
1077         write_mac_reg(mac, PAS_MAC_IPC_CHNL,
1078                       PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
1079                       PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
1080
1081         /* enable rx if */
1082         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1083                       PAS_DMA_RXINT_RCMDSTA_EN |
1084                       PAS_DMA_RXINT_RCMDSTA_DROPS_M |
1085                       PAS_DMA_RXINT_RCMDSTA_BP |
1086                       PAS_DMA_RXINT_RCMDSTA_OO |
1087                       PAS_DMA_RXINT_RCMDSTA_BT);
1088
1089         /* enable rx channel */
1090         pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1091                                                    PAS_DMA_RXCHAN_CCMDSTA_OD |
1092                                                    PAS_DMA_RXCHAN_CCMDSTA_FD |
1093                                                    PAS_DMA_RXCHAN_CCMDSTA_DT);
1094
1095         /* enable tx channel */
1096         pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1097                                                    PAS_DMA_TXCHAN_TCMDSTA_DB |
1098                                                    PAS_DMA_TXCHAN_TCMDSTA_DE |
1099                                                    PAS_DMA_TXCHAN_TCMDSTA_DA);
1100
1101         pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
1102
1103         write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1104                       RX_RING_SIZE>>1);
1105
1106         /* Clear out any residual packet count state from firmware */
1107         pasemi_mac_restart_rx_intr(mac);
1108         pasemi_mac_restart_tx_intr(mac);
1109
1110         flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
1111
1112         if (mac->type == MAC_TYPE_GMAC)
1113                 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
1114         else
1115                 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
1116
1117         /* Enable interface in MAC */
1118         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1119
1120         ret = pasemi_mac_phy_init(dev);
1121         if (ret) {
1122                 /* Since we won't get link notification, just enable RX */
1123                 pasemi_mac_intf_enable(mac);
1124                 if (mac->type == MAC_TYPE_GMAC) {
1125                         /* Warn for missing PHY on SGMII (1Gig) ports */
1126                         dev_warn(&mac->pdev->dev,
1127                                  "PHY init failed: %d.\n", ret);
1128                         dev_warn(&mac->pdev->dev,
1129                                  "Defaulting to 1Gbit full duplex\n");
1130                 }
1131         }
1132
1133         netif_start_queue(dev);
1134         napi_enable(&mac->napi);
1135
1136         snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx",
1137                  dev->name);
1138
1139         ret = request_irq(mac->tx->chan.irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
1140                           mac->tx_irq_name, mac->tx);
1141         if (ret) {
1142                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1143                         mac->tx->chan.irq, ret);
1144                 goto out_tx_int;
1145         }
1146
1147         snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx",
1148                  dev->name);
1149
1150         ret = request_irq(mac->rx->chan.irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
1151                           mac->rx_irq_name, mac->rx);
1152         if (ret) {
1153                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1154                         mac->rx->chan.irq, ret);
1155                 goto out_rx_int;
1156         }
1157
1158         if (mac->phydev)
1159                 phy_start(mac->phydev);
1160
1161         init_timer(&mac->tx->clean_timer);
1162         mac->tx->clean_timer.function = pasemi_mac_tx_timer;
1163         mac->tx->clean_timer.data = (unsigned long)mac->tx;
1164         mac->tx->clean_timer.expires = jiffies+HZ;
1165         add_timer(&mac->tx->clean_timer);
1166
1167         return 0;
1168
1169 out_rx_int:
1170         free_irq(mac->tx->chan.irq, mac->tx);
1171 out_tx_int:
1172         napi_disable(&mac->napi);
1173         netif_stop_queue(dev);
1174 out_tx_ring:
1175         if (mac->tx)
1176                 pasemi_mac_free_tx_resources(mac);
1177         pasemi_mac_free_rx_resources(mac);
1178 out_rx_resources:
1179
1180         return ret;
1181 }
1182
1183 #define MAX_RETRIES 5000
1184
1185 static void pasemi_mac_pause_txchan(struct pasemi_mac *mac)
1186 {
1187         unsigned int sta, retries;
1188         int txch = tx_ring(mac)->chan.chno;
1189
1190         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
1191                       PAS_DMA_TXCHAN_TCMDSTA_ST);
1192
1193         for (retries = 0; retries < MAX_RETRIES; retries++) {
1194                 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1195                 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1196                         break;
1197                 cond_resched();
1198         }
1199
1200         if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1201                 dev_err(&mac->dma_pdev->dev,
1202                         "Failed to stop tx channel, tcmdsta %08x\n", sta);
1203
1204         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
1205 }
1206
1207 static void pasemi_mac_pause_rxchan(struct pasemi_mac *mac)
1208 {
1209         unsigned int sta, retries;
1210         int rxch = rx_ring(mac)->chan.chno;
1211
1212         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
1213                       PAS_DMA_RXCHAN_CCMDSTA_ST);
1214         for (retries = 0; retries < MAX_RETRIES; retries++) {
1215                 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1216                 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1217                         break;
1218                 cond_resched();
1219         }
1220
1221         if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1222                 dev_err(&mac->dma_pdev->dev,
1223                         "Failed to stop rx channel, ccmdsta 08%x\n", sta);
1224         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
1225 }
1226
1227 static void pasemi_mac_pause_rxint(struct pasemi_mac *mac)
1228 {
1229         unsigned int sta, retries;
1230
1231         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1232                       PAS_DMA_RXINT_RCMDSTA_ST);
1233         for (retries = 0; retries < MAX_RETRIES; retries++) {
1234                 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1235                 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1236                         break;
1237                 cond_resched();
1238         }
1239
1240         if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1241                 dev_err(&mac->dma_pdev->dev,
1242                         "Failed to stop rx interface, rcmdsta %08x\n", sta);
1243         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1244 }
1245
1246 static int pasemi_mac_close(struct net_device *dev)
1247 {
1248         struct pasemi_mac *mac = netdev_priv(dev);
1249         unsigned int sta;
1250         int rxch, txch;
1251
1252         rxch = rx_ring(mac)->chan.chno;
1253         txch = tx_ring(mac)->chan.chno;
1254
1255         if (mac->phydev) {
1256                 phy_stop(mac->phydev);
1257                 phy_disconnect(mac->phydev);
1258         }
1259
1260         del_timer_sync(&mac->tx->clean_timer);
1261
1262         netif_stop_queue(dev);
1263         napi_disable(&mac->napi);
1264
1265         sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1266         if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1267                       PAS_DMA_RXINT_RCMDSTA_OO |
1268                       PAS_DMA_RXINT_RCMDSTA_BT))
1269                 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1270
1271         sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1272         if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1273                      PAS_DMA_RXCHAN_CCMDSTA_OD |
1274                      PAS_DMA_RXCHAN_CCMDSTA_FD |
1275                      PAS_DMA_RXCHAN_CCMDSTA_DT))
1276                 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1277
1278         sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1279         if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ | PAS_DMA_TXCHAN_TCMDSTA_DB |
1280                       PAS_DMA_TXCHAN_TCMDSTA_DE | PAS_DMA_TXCHAN_TCMDSTA_DA))
1281                 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1282
1283         /* Clean out any pending buffers */
1284         pasemi_mac_clean_tx(tx_ring(mac));
1285         pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1286
1287         pasemi_mac_pause_txchan(mac);
1288         pasemi_mac_pause_rxint(mac);
1289         pasemi_mac_pause_rxchan(mac);
1290         pasemi_mac_intf_disable(mac);
1291
1292         free_irq(mac->tx->chan.irq, mac->tx);
1293         free_irq(mac->rx->chan.irq, mac->rx);
1294
1295         /* Free resources */
1296         pasemi_mac_free_rx_resources(mac);
1297         pasemi_mac_free_tx_resources(mac);
1298
1299         return 0;
1300 }
1301
1302 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1303 {
1304         struct pasemi_mac *mac = netdev_priv(dev);
1305         struct pasemi_mac_txring *txring;
1306         u64 dflags, mactx;
1307         dma_addr_t map[MAX_SKB_FRAGS+1];
1308         unsigned int map_size[MAX_SKB_FRAGS+1];
1309         unsigned long flags;
1310         int i, nfrags;
1311         int fill;
1312
1313         dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1314
1315         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1316                 const unsigned char *nh = skb_network_header(skb);
1317
1318                 switch (ip_hdr(skb)->protocol) {
1319                 case IPPROTO_TCP:
1320                         dflags |= XCT_MACTX_CSUM_TCP;
1321                         dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1322                         dflags |= XCT_MACTX_IPO(nh - skb->data);
1323                         break;
1324                 case IPPROTO_UDP:
1325                         dflags |= XCT_MACTX_CSUM_UDP;
1326                         dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1327                         dflags |= XCT_MACTX_IPO(nh - skb->data);
1328                         break;
1329                 }
1330         }
1331
1332         nfrags = skb_shinfo(skb)->nr_frags;
1333
1334         map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1335                                 PCI_DMA_TODEVICE);
1336         map_size[0] = skb_headlen(skb);
1337         if (dma_mapping_error(map[0]))
1338                 goto out_err_nolock;
1339
1340         for (i = 0; i < nfrags; i++) {
1341                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1342
1343                 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1344                                         frag->page_offset, frag->size,
1345                                         PCI_DMA_TODEVICE);
1346                 map_size[i+1] = frag->size;
1347                 if (dma_mapping_error(map[i+1])) {
1348                         nfrags = i;
1349                         goto out_err_nolock;
1350                 }
1351         }
1352
1353         mactx = dflags | XCT_MACTX_LLEN(skb->len);
1354
1355         txring = tx_ring(mac);
1356
1357         spin_lock_irqsave(&txring->lock, flags);
1358
1359         fill = txring->next_to_fill;
1360
1361         /* Avoid stepping on the same cache line that the DMA controller
1362          * is currently about to send, so leave at least 8 words available.
1363          * Total free space needed is mactx + fragments + 8
1364          */
1365         if (RING_AVAIL(txring) < nfrags + 10) {
1366                 /* no room -- stop the queue and wait for tx intr */
1367                 netif_stop_queue(dev);
1368                 goto out_err;
1369         }
1370
1371         TX_DESC(txring, fill) = mactx;
1372         TX_DESC_INFO(txring, fill).dma = nfrags;
1373         fill++;
1374         TX_DESC_INFO(txring, fill).skb = skb;
1375         for (i = 0; i <= nfrags; i++) {
1376                 TX_DESC(txring, fill+i) =
1377                         XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1378                 TX_DESC_INFO(txring, fill+i).dma = map[i];
1379         }
1380
1381         /* We have to add an even number of 8-byte entries to the ring
1382          * even if the last one is unused. That means always an odd number
1383          * of pointers + one mactx descriptor.
1384          */
1385         if (nfrags & 1)
1386                 nfrags++;
1387
1388         txring->next_to_fill = (fill + nfrags + 1) & (TX_RING_SIZE-1);
1389
1390         dev->stats.tx_packets++;
1391         dev->stats.tx_bytes += skb->len;
1392
1393         spin_unlock_irqrestore(&txring->lock, flags);
1394
1395         write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1396
1397         return NETDEV_TX_OK;
1398
1399 out_err:
1400         spin_unlock_irqrestore(&txring->lock, flags);
1401 out_err_nolock:
1402         while (nfrags--)
1403                 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1404                                  PCI_DMA_TODEVICE);
1405
1406         return NETDEV_TX_BUSY;
1407 }
1408
1409 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1410 {
1411         const struct pasemi_mac *mac = netdev_priv(dev);
1412         unsigned int flags;
1413
1414         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1415
1416         /* Set promiscuous */
1417         if (dev->flags & IFF_PROMISC)
1418                 flags |= PAS_MAC_CFG_PCFG_PR;
1419         else
1420                 flags &= ~PAS_MAC_CFG_PCFG_PR;
1421
1422         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1423 }
1424
1425
1426 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1427 {
1428         struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1429         struct net_device *dev = mac->netdev;
1430         int pkts;
1431
1432         pasemi_mac_clean_tx(tx_ring(mac));
1433         pkts = pasemi_mac_clean_rx(rx_ring(mac), budget);
1434         if (pkts < budget) {
1435                 /* all done, no more packets present */
1436                 netif_rx_complete(dev, napi);
1437
1438                 pasemi_mac_restart_rx_intr(mac);
1439                 pasemi_mac_restart_tx_intr(mac);
1440         }
1441         return pkts;
1442 }
1443
1444 static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu)
1445 {
1446         struct pasemi_mac *mac = netdev_priv(dev);
1447         unsigned int reg;
1448         unsigned int rcmdsta;
1449         int running;
1450
1451         if (new_mtu < PE_MIN_MTU || new_mtu > PE_MAX_MTU)
1452                 return -EINVAL;
1453
1454         running = netif_running(dev);
1455
1456         if (running) {
1457                 /* Need to stop the interface, clean out all already
1458                  * received buffers, free all unused buffers on the RX
1459                  * interface ring, then finally re-fill the rx ring with
1460                  * the new-size buffers and restart.
1461                  */
1462
1463                 napi_disable(&mac->napi);
1464                 netif_tx_disable(dev);
1465                 pasemi_mac_intf_disable(mac);
1466
1467                 rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1468                 pasemi_mac_pause_rxint(mac);
1469                 pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1470                 pasemi_mac_free_rx_buffers(mac);
1471         }
1472
1473         /* Change maxf, i.e. what size frames are accepted.
1474          * Need room for ethernet header and CRC word
1475          */
1476         reg = read_mac_reg(mac, PAS_MAC_CFG_MACCFG);
1477         reg &= ~PAS_MAC_CFG_MACCFG_MAXF_M;
1478         reg |= PAS_MAC_CFG_MACCFG_MAXF(new_mtu + ETH_HLEN + 4);
1479         write_mac_reg(mac, PAS_MAC_CFG_MACCFG, reg);
1480
1481         dev->mtu = new_mtu;
1482         /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1483         mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1484
1485         if (running) {
1486                 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1487                               rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN);
1488
1489                 rx_ring(mac)->next_to_fill = 0;
1490                 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE-1);
1491
1492                 napi_enable(&mac->napi);
1493                 netif_start_queue(dev);
1494                 pasemi_mac_intf_enable(mac);
1495         }
1496
1497         return 0;
1498 }
1499
1500 static int __devinit
1501 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1502 {
1503         struct net_device *dev;
1504         struct pasemi_mac *mac;
1505         int err;
1506         DECLARE_MAC_BUF(mac_buf);
1507
1508         err = pci_enable_device(pdev);
1509         if (err)
1510                 return err;
1511
1512         dev = alloc_etherdev(sizeof(struct pasemi_mac));
1513         if (dev == NULL) {
1514                 dev_err(&pdev->dev,
1515                         "pasemi_mac: Could not allocate ethernet device.\n");
1516                 err = -ENOMEM;
1517                 goto out_disable_device;
1518         }
1519
1520         pci_set_drvdata(pdev, dev);
1521         SET_NETDEV_DEV(dev, &pdev->dev);
1522
1523         mac = netdev_priv(dev);
1524
1525         mac->pdev = pdev;
1526         mac->netdev = dev;
1527
1528         netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1529
1530         dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG |
1531                         NETIF_F_HIGHDMA;
1532
1533         mac->lro_mgr.max_aggr = LRO_MAX_AGGR;
1534         mac->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1535         mac->lro_mgr.lro_arr = mac->lro_desc;
1536         mac->lro_mgr.get_skb_header = get_skb_hdr;
1537         mac->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1538         mac->lro_mgr.dev = mac->netdev;
1539         mac->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1540         mac->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1541
1542
1543         mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1544         if (!mac->dma_pdev) {
1545                 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1546                 err = -ENODEV;
1547                 goto out;
1548         }
1549
1550         mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1551         if (!mac->iob_pdev) {
1552                 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1553                 err = -ENODEV;
1554                 goto out;
1555         }
1556
1557         /* get mac addr from device tree */
1558         if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1559                 err = -ENODEV;
1560                 goto out;
1561         }
1562         memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1563
1564         mac->dma_if = mac_to_intf(mac);
1565         if (mac->dma_if < 0) {
1566                 dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1567                 err = -ENODEV;
1568                 goto out;
1569         }
1570
1571         switch (pdev->device) {
1572         case 0xa005:
1573                 mac->type = MAC_TYPE_GMAC;
1574                 break;
1575         case 0xa006:
1576                 mac->type = MAC_TYPE_XAUI;
1577                 break;
1578         default:
1579                 err = -ENODEV;
1580                 goto out;
1581         }
1582
1583         dev->open = pasemi_mac_open;
1584         dev->stop = pasemi_mac_close;
1585         dev->hard_start_xmit = pasemi_mac_start_tx;
1586         dev->set_multicast_list = pasemi_mac_set_rx_mode;
1587         dev->set_mac_address = pasemi_mac_set_mac_addr;
1588         dev->mtu = PE_DEF_MTU;
1589         /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1590         mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1591
1592         dev->change_mtu = pasemi_mac_change_mtu;
1593
1594         if (err)
1595                 goto out;
1596
1597         mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1598
1599         /* Enable most messages by default */
1600         mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1601
1602         err = register_netdev(dev);
1603
1604         if (err) {
1605                 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1606                         err);
1607                 goto out;
1608         } else if netif_msg_probe(mac)
1609                 printk(KERN_INFO "%s: PA Semi %s: intf %d, hw addr %s\n",
1610                        dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1611                        mac->dma_if, print_mac(mac_buf, dev->dev_addr));
1612
1613         return err;
1614
1615 out:
1616         if (mac->iob_pdev)
1617                 pci_dev_put(mac->iob_pdev);
1618         if (mac->dma_pdev)
1619                 pci_dev_put(mac->dma_pdev);
1620
1621         free_netdev(dev);
1622 out_disable_device:
1623         pci_disable_device(pdev);
1624         return err;
1625
1626 }
1627
1628 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1629 {
1630         struct net_device *netdev = pci_get_drvdata(pdev);
1631         struct pasemi_mac *mac;
1632
1633         if (!netdev)
1634                 return;
1635
1636         mac = netdev_priv(netdev);
1637
1638         unregister_netdev(netdev);
1639
1640         pci_disable_device(pdev);
1641         pci_dev_put(mac->dma_pdev);
1642         pci_dev_put(mac->iob_pdev);
1643
1644         pasemi_dma_free_chan(&mac->tx->chan);
1645         pasemi_dma_free_chan(&mac->rx->chan);
1646
1647         pci_set_drvdata(pdev, NULL);
1648         free_netdev(netdev);
1649 }
1650
1651 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1652         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1653         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1654         { },
1655 };
1656
1657 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1658
1659 static struct pci_driver pasemi_mac_driver = {
1660         .name           = "pasemi_mac",
1661         .id_table       = pasemi_mac_pci_tbl,
1662         .probe          = pasemi_mac_probe,
1663         .remove         = __devexit_p(pasemi_mac_remove),
1664 };
1665
1666 static void __exit pasemi_mac_cleanup_module(void)
1667 {
1668         pci_unregister_driver(&pasemi_mac_driver);
1669 }
1670
1671 int pasemi_mac_init_module(void)
1672 {
1673         int err;
1674
1675         err = pasemi_dma_init();
1676         if (err)
1677                 return err;
1678
1679         return pci_register_driver(&pasemi_mac_driver);
1680 }
1681
1682 module_init(pasemi_mac_init_module);
1683 module_exit(pasemi_mac_cleanup_module);