1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
3 * Copyright (C) 2004,2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 I2C Controller
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
26 #include <linux/i2c.h>
27 #include <linux/i2c-id.h>
28 #include <linux/init.h>
29 #include <linux/time.h>
30 #include <linux/interrupt.h>
31 #include <linux/delay.h>
32 #include <linux/errno.h>
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/clk.h>
37 #include <asm/hardware.h>
41 #include <asm/arch/regs-gpio.h>
42 #include <asm/arch/regs-iic.h>
43 #include <asm/arch/iic.h>
45 /* i2c controller state */
47 enum s3c24xx_i2c_state {
57 wait_queue_head_t wait;
64 enum s3c24xx_i2c_state state;
70 struct resource *ioarea;
71 struct i2c_adapter adap;
74 /* default platform data to use if not supplied in the platform_device
77 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {
82 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
85 /* s3c24xx_i2c_is2440()
87 * return true is this is an s3c2440
90 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
92 struct platform_device *pdev = to_platform_device(i2c->dev);
94 return !strcmp(pdev->name, "s3c2440-i2c");
98 /* s3c24xx_i2c_get_platformdata
100 * get the platform data associated with the given device, or return
101 * the default if there is none
104 static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)
106 if (dev->platform_data != NULL)
107 return (struct s3c2410_platform_i2c *)dev->platform_data;
109 return &s3c24xx_i2c_default_platform;
112 /* s3c24xx_i2c_master_complete
114 * complete the message and wake up the caller, using the given return code,
115 * or zero to mean ok.
118 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
120 dev_dbg(i2c->dev, "master_complete %d\n", ret);
132 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
136 tmp = readl(i2c->regs + S3C2410_IICCON);
137 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
141 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
145 tmp = readl(i2c->regs + S3C2410_IICCON);
146 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
150 /* irq enable/disable functions */
152 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
156 tmp = readl(i2c->regs + S3C2410_IICCON);
157 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
160 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
164 tmp = readl(i2c->regs + S3C2410_IICCON);
165 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
169 /* s3c24xx_i2c_message_start
171 * put the start of a message onto the bus
174 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
177 unsigned int addr = (msg->addr & 0x7f) << 1;
179 unsigned long iiccon;
182 stat |= S3C2410_IICSTAT_TXRXEN;
184 if (msg->flags & I2C_M_RD) {
185 stat |= S3C2410_IICSTAT_MASTER_RX;
188 stat |= S3C2410_IICSTAT_MASTER_TX;
190 if (msg->flags & I2C_M_REV_DIR_ADDR)
193 // todo - check for wether ack wanted or not
194 s3c24xx_i2c_enable_ack(i2c);
196 iiccon = readl(i2c->regs + S3C2410_IICCON);
197 writel(stat, i2c->regs + S3C2410_IICSTAT);
199 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
200 writeb(addr, i2c->regs + S3C2410_IICDS);
202 // delay a bit and reset iiccon before setting start (per samsung)
204 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
205 writel(iiccon, i2c->regs + S3C2410_IICCON);
207 stat |= S3C2410_IICSTAT_START;
208 writel(stat, i2c->regs + S3C2410_IICSTAT);
211 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
213 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
215 dev_dbg(i2c->dev, "STOP\n");
217 /* stop the transfer */
218 iicstat &= ~ S3C2410_IICSTAT_START;
219 writel(iicstat, i2c->regs + S3C2410_IICSTAT);
221 i2c->state = STATE_STOP;
223 s3c24xx_i2c_master_complete(i2c, ret);
224 s3c24xx_i2c_disable_irq(i2c);
227 /* helper functions to determine the current state in the set of
228 * messages we are sending */
232 * returns TRUE if the current message is the last in the set
235 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
237 return i2c->msg_idx >= (i2c->msg_num - 1);
242 * returns TRUE if we this is the last byte in the current message
245 static inline int is_msglast(struct s3c24xx_i2c *i2c)
247 return i2c->msg_ptr == i2c->msg->len-1;
252 * returns TRUE if we reached the end of the current message
255 static inline int is_msgend(struct s3c24xx_i2c *i2c)
257 return i2c->msg_ptr >= i2c->msg->len;
260 /* i2s_s3c_irq_nextbyte
262 * process an interrupt and work out what to do
265 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
271 switch (i2c->state) {
274 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);
279 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
280 s3c24xx_i2c_disable_irq(i2c);
284 /* last thing we did was send a start condition on the
285 * bus, or started a new i2c message
288 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
289 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
290 /* ack was not received... */
292 dev_dbg(i2c->dev, "ack was not received\n");
293 s3c24xx_i2c_stop(i2c, -EREMOTEIO);
297 if (i2c->msg->flags & I2C_M_RD)
298 i2c->state = STATE_READ;
300 i2c->state = STATE_WRITE;
302 /* terminate the transfer if there is nothing to do
303 * (used by the i2c probe to find devices */
305 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
306 s3c24xx_i2c_stop(i2c, 0);
310 if (i2c->state == STATE_READ)
313 /* fall through to the write state, as we will need to
314 * send a byte as well */
317 /* we are writing data to the device... check for the
318 * end of the message, and if so, work out what to do
322 if (!is_msgend(i2c)) {
323 byte = i2c->msg->buf[i2c->msg_ptr++];
324 writeb(byte, i2c->regs + S3C2410_IICDS);
326 } else if (!is_lastmsg(i2c)) {
327 /* we need to go to the next i2c message */
329 dev_dbg(i2c->dev, "WRITE: Next Message\n");
335 /* check to see if we need to do another message */
336 if (i2c->msg->flags & I2C_M_NOSTART) {
338 if (i2c->msg->flags & I2C_M_RD) {
339 /* cannot do this, the controller
340 * forces us to send a new START
341 * when we change direction */
343 s3c24xx_i2c_stop(i2c, -EINVAL);
349 /* send the new start */
350 s3c24xx_i2c_message_start(i2c, i2c->msg);
351 i2c->state = STATE_START;
357 s3c24xx_i2c_stop(i2c, 0);
362 /* we have a byte of data in the data register, do
363 * something with it, and then work out wether we are
364 * going to do any more read/write
367 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&
368 !(is_msglast(i2c) && is_lastmsg(i2c))) {
370 if (iicstat & S3C2410_IICSTAT_LASTBIT) {
371 dev_dbg(i2c->dev, "READ: No Ack\n");
373 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
378 byte = readb(i2c->regs + S3C2410_IICDS);
379 i2c->msg->buf[i2c->msg_ptr++] = byte;
382 if (is_msglast(i2c)) {
383 /* last byte of buffer */
386 s3c24xx_i2c_disable_ack(i2c);
388 } else if (is_msgend(i2c)) {
389 /* ok, we've read the entire buffer, see if there
390 * is anything else we need to do */
392 if (is_lastmsg(i2c)) {
393 /* last message, send stop and complete */
394 dev_dbg(i2c->dev, "READ: Send Stop\n");
396 s3c24xx_i2c_stop(i2c, 0);
398 /* go to the next transfer */
399 dev_dbg(i2c->dev, "READ: Next Transfer\n");
410 /* acknowlegde the IRQ and get back on with the work */
413 tmp = readl(i2c->regs + S3C2410_IICCON);
414 tmp &= ~S3C2410_IICCON_IRQPEND;
415 writel(tmp, i2c->regs + S3C2410_IICCON);
422 * top level IRQ servicing routine
425 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
427 struct s3c24xx_i2c *i2c = dev_id;
428 unsigned long status;
431 status = readl(i2c->regs + S3C2410_IICSTAT);
433 if (status & S3C2410_IICSTAT_ARBITR) {
434 // deal with arbitration loss
435 dev_err(i2c->dev, "deal with arbitration loss\n");
438 if (i2c->state == STATE_IDLE) {
439 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
441 tmp = readl(i2c->regs + S3C2410_IICCON);
442 tmp &= ~S3C2410_IICCON_IRQPEND;
443 writel(tmp, i2c->regs + S3C2410_IICCON);
447 /* pretty much this leaves us with the fact that we've
448 * transmitted or received whatever byte we last sent */
450 i2s_s3c_irq_nextbyte(i2c, status);
457 /* s3c24xx_i2c_set_master
459 * get the i2c bus for a master transaction
462 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
464 unsigned long iicstat;
467 while (timeout-- > 0) {
468 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
470 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
476 dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",
477 __raw_readl(S3C2410_GPEDAT));
482 /* s3c24xx_i2c_doxfer
484 * this starts an i2c transfer
487 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)
489 unsigned long timeout;
492 ret = s3c24xx_i2c_set_master(i2c);
494 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
499 spin_lock_irq(&i2c->lock);
505 i2c->state = STATE_START;
507 s3c24xx_i2c_enable_irq(i2c);
508 s3c24xx_i2c_message_start(i2c, msgs);
509 spin_unlock_irq(&i2c->lock);
511 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
515 /* having these next two as dev_err() makes life very
516 * noisy when doing an i2cdetect */
519 dev_dbg(i2c->dev, "timeout\n");
521 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
523 /* ensure the stop has been through the bus */
533 * first port of call from the i2c bus code when an message needs
534 * transferring across the i2c bus.
537 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
538 struct i2c_msg *msgs, int num)
540 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
544 for (retry = 0; retry < adap->retries; retry++) {
546 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
551 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
559 /* declare our i2c functionality */
560 static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
562 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
565 /* i2c bus registration info */
567 static const struct i2c_algorithm s3c24xx_i2c_algorithm = {
568 .master_xfer = s3c24xx_i2c_xfer,
569 .functionality = s3c24xx_i2c_func,
572 static struct s3c24xx_i2c s3c24xx_i2c = {
573 .lock = SPIN_LOCK_UNLOCKED,
574 .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),
576 .name = "s3c2410-i2c",
577 .owner = THIS_MODULE,
578 .algo = &s3c24xx_i2c_algorithm,
580 .class = I2C_CLASS_HWMON,
584 /* s3c24xx_i2c_calcdivisor
586 * return the divisor settings for a given frequency
589 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
590 unsigned int *div1, unsigned int *divs)
592 unsigned int calc_divs = clkin / wanted;
593 unsigned int calc_div1;
595 if (calc_divs > (16*16))
600 calc_divs += calc_div1-1;
601 calc_divs /= calc_div1;
611 return clkin / (calc_divs * calc_div1);
616 * test wether a frequency is within the acceptable range of error
619 static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
621 int diff = freq - wanted;
623 return (diff >= -2 && diff <= 2);
626 /* s3c24xx_i2c_getdivisor
628 * work out a divisor for the user requested frequency setting,
629 * either by the requested frequency, or scanning the acceptable
630 * range of frequencies until something is found
633 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
634 struct s3c2410_platform_i2c *pdata,
635 unsigned long *iicon,
638 unsigned long clkin = clk_get_rate(i2c->clk);
640 unsigned int divs, div1;
644 clkin /= 1000; /* clkin now in KHz */
646 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
647 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
649 if (pdata->bus_freq != 0) {
650 freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
652 if (freq_acceptable(freq, pdata->bus_freq/1000))
656 /* ok, we may have to search for something suitable... */
658 start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
659 end = pdata->min_freq;
666 for (; start > end; start--) {
667 freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
668 if (freq_acceptable(freq, start))
672 /* cannot find frequency spec */
679 *iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
685 * initialise the controller, set the IO lines and frequency
688 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
690 unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
691 struct s3c2410_platform_i2c *pdata;
694 /* get the plafrom data */
696 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
698 /* inititalise the gpio */
700 s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
701 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
703 /* write slave address */
705 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
707 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
709 /* we need to work out the divisors for the clock... */
711 if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
712 dev_err(i2c->dev, "cannot meet bus frequency required\n");
716 /* todo - check that the i2c lines aren't being dragged anywhere */
718 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
719 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
721 writel(iicon, i2c->regs + S3C2410_IICCON);
723 /* check for s3c2440 i2c controller */
725 if (s3c24xx_i2c_is2440(i2c)) {
726 dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
728 writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
734 static void s3c24xx_i2c_free(struct s3c24xx_i2c *i2c)
736 if (i2c->clk != NULL && !IS_ERR(i2c->clk)) {
737 clk_disable(i2c->clk);
742 if (i2c->regs != NULL) {
747 if (i2c->ioarea != NULL) {
748 release_resource(i2c->ioarea);
756 * called by the bus driver when a suitable device is found
759 static int s3c24xx_i2c_probe(struct platform_device *pdev)
761 struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
762 struct resource *res;
765 /* find the clock and enable it */
767 i2c->dev = &pdev->dev;
768 i2c->clk = clk_get(&pdev->dev, "i2c");
769 if (IS_ERR(i2c->clk)) {
770 dev_err(&pdev->dev, "cannot get clock\n");
775 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
777 clk_enable(i2c->clk);
779 /* map the registers */
781 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
783 dev_err(&pdev->dev, "cannot find IO resource\n");
788 i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
791 if (i2c->ioarea == NULL) {
792 dev_err(&pdev->dev, "cannot request IO\n");
797 i2c->regs = ioremap(res->start, (res->end-res->start)+1);
799 if (i2c->regs == NULL) {
800 dev_err(&pdev->dev, "cannot map IO\n");
805 dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);
807 /* setup info block for the i2c core */
809 i2c->adap.algo_data = i2c;
810 i2c->adap.dev.parent = &pdev->dev;
812 /* initialise the i2c controller */
814 ret = s3c24xx_i2c_init(i2c);
818 /* find the IRQ for this unit (note, this relies on the init call to
819 * ensure no current IRQs pending
822 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
824 dev_err(&pdev->dev, "cannot find IRQ\n");
829 ret = request_irq(res->start, s3c24xx_i2c_irq, IRQF_DISABLED,
833 dev_err(&pdev->dev, "cannot claim IRQ\n");
839 dev_dbg(&pdev->dev, "irq resource %p (%ld)\n", res, res->start);
841 ret = i2c_add_adapter(&i2c->adap);
843 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
847 platform_set_drvdata(pdev, i2c);
849 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
853 s3c24xx_i2c_free(i2c);
858 /* s3c24xx_i2c_remove
860 * called when device is removed from the bus
863 static int s3c24xx_i2c_remove(struct platform_device *pdev)
865 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
868 s3c24xx_i2c_free(i2c);
869 platform_set_drvdata(pdev, NULL);
876 static int s3c24xx_i2c_resume(struct platform_device *dev)
878 struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
881 s3c24xx_i2c_init(i2c);
887 #define s3c24xx_i2c_resume NULL
890 /* device driver for platform bus bits */
892 static struct platform_driver s3c2410_i2c_driver = {
893 .probe = s3c24xx_i2c_probe,
894 .remove = s3c24xx_i2c_remove,
895 .resume = s3c24xx_i2c_resume,
897 .owner = THIS_MODULE,
898 .name = "s3c2410-i2c",
902 static struct platform_driver s3c2440_i2c_driver = {
903 .probe = s3c24xx_i2c_probe,
904 .remove = s3c24xx_i2c_remove,
905 .resume = s3c24xx_i2c_resume,
907 .owner = THIS_MODULE,
908 .name = "s3c2440-i2c",
912 static int __init i2c_adap_s3c_init(void)
916 ret = platform_driver_register(&s3c2410_i2c_driver);
918 ret = platform_driver_register(&s3c2440_i2c_driver);
920 platform_driver_unregister(&s3c2410_i2c_driver);
926 static void __exit i2c_adap_s3c_exit(void)
928 platform_driver_unregister(&s3c2410_i2c_driver);
929 platform_driver_unregister(&s3c2440_i2c_driver);
932 module_init(i2c_adap_s3c_init);
933 module_exit(i2c_adap_s3c_exit);
935 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
936 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
937 MODULE_LICENSE("GPL");