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   1
   2 /*    low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
   3  *
   4  *    Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
   5  *    Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
   6  *
   7  *    This program is free software; you can redistribute it and/or modify
   8  *    it under the terms of the GNU General Public License as published by
   9  *    the Free Software Foundation; either version 2 of the License, or
  10  *    (at your option) any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  *
  17  *    You should have received a copy of the GNU General Public License
  18  *    along with this program; if not, write to the Free Software
  19  *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <asm/assembly.h>
  23
  24 #include <linux/init.h>
  25 #include <linux/linkage.h>
  26
  27 #ifdef CONFIG_64BIT
  28         .level          2.0w
  29 #endif /* CONFIG_64BIT */
  30
  31 #define MTDIAG_1(gr)    .word 0x14201840 + gr*0x10000
  32 #define MTDIAG_2(gr)    .word 0x14401840 + gr*0x10000
  33 #define MFDIAG_1(gr)    .word 0x142008A0 + gr
  34 #define MFDIAG_2(gr)    .word 0x144008A0 + gr
  35 #define STDIAG(dr)      .word 0x14000AA0 + dr*0x200000
  36 #define SFDIAG(dr)      .word 0x14000BA0 + dr*0x200000
  37 #define DR2_SLOW_RET    53
  38
  39
  40 ;
  41 ; Enable the performance counters
  42 ;
  43 ; The coprocessor only needs to be enabled when
  44 ; starting/stopping the coprocessor with the pmenb/pmdis.
  45 ;
  46         .text
  47
  48 ENTRY(perf_intrigue_enable_perf_counters)
  49         .proc
  50         .callinfo  frame=0,NO_CALLS
  51         .entry
  52
  53         ldi     0x20,%r25                ; load up perfmon bit
  54         mfctl   ccr,%r26                 ; get coprocessor register
  55         or      %r25,%r26,%r26             ; set bit
  56         mtctl   %r26,ccr                 ; turn on performance coprocessor
  57         pmenb                           ; enable performance monitor
  58         ssm     0,0                     ; dummy op to ensure completion
  59         sync                            ; follow ERS
  60         andcm   %r26,%r25,%r26             ; clear bit now
  61         mtctl   %r26,ccr                 ; turn off performance coprocessor
  62         nop                             ; NOPs as specified in ERS
  63         nop
  64         nop
  65         nop
  66         nop
  67         nop
  68         nop
  69         bve    (%r2)
  70         nop
  71         .exit
  72         .procend
  73 ENDPROC(perf_intrigue_enable_perf_counters)
  74
  75 ENTRY(perf_intrigue_disable_perf_counters)
  76         .proc
  77         .callinfo  frame=0,NO_CALLS
  78         .entry
  79         ldi     0x20,%r25                ; load up perfmon bit
  80         mfctl   ccr,%r26                 ; get coprocessor register
  81         or      %r25,%r26,%r26             ; set bit
  82         mtctl   %r26,ccr                 ; turn on performance coprocessor
  83         pmdis                           ; disable performance monitor
  84         ssm     0,0                     ; dummy op to ensure completion
  85         andcm   %r26,%r25,%r26             ; clear bit now
  86         bve    (%r2)
  87         mtctl   %r26,ccr                 ; turn off performance coprocessor
  88         .exit
  89         .procend
  90 ENDPROC(perf_intrigue_disable_perf_counters)
  91
  92 ;***********************************************************************
  93 ;*
  94 ;* Name: perf_rdr_shift_in_W
  95 ;*
  96 ;* Description:
  97 ;*      This routine shifts data in from the RDR in arg0 and returns
  98 ;*      the result in ret0.  If the RDR is <= 64 bits in length, it
  99 ;*      is shifted shifted backup immediately.  This is to compensate
 100 ;*      for RDR10 which has bits that preclude PDC stack operations
 101 ;*      when they are in the wrong state.
 102 ;*
 103 ;* Arguments:
 104 ;*      arg0 : rdr to be read
 105 ;*      arg1 : bit length of rdr
 106 ;*
 107 ;* Returns:
 108 ;*      ret0 = next 64 bits of rdr data from staging register
 109 ;*
 110 ;* Register usage:
 111 ;*      arg0 : rdr to be read
 112 ;*      arg1 : bit length of rdr
 113 ;*      %r24  - original DR2 value
 114 ;*      %r1   - scratch
 115 ;*  %r29  - scratch
 116 ;*
 117 ;* Returns:
 118 ;*      ret0 = RDR data (right justified)
 119 ;*
 120 ;***********************************************************************
 121
 122 ENTRY(perf_rdr_shift_in_W)
 123         .proc
 124         .callinfo frame=0,NO_CALLS
 125         .entry
 126 ;
 127 ; read(shift in) the RDR.
 128 ;
 129
 130 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
 131 ; shifting is done, from or to, remote diagnose registers.
 132 ;
 133
 134         depdi,z         1,DR2_SLOW_RET,1,%r29
 135         MFDIAG_2        (24)
 136         or                  %r24,%r29,%r29
 137         MTDIAG_2        (29)                    ; set DR2_SLOW_RET
 138
 139         nop
 140         nop
 141         nop
 142         nop
 143
 144 ;
 145 ; Cacheline start (32-byte cacheline)
 146 ;
 147         nop
 148         nop
 149         nop
 150         extrd,u         arg1,63,6,%r1   ; setup shift amount by bits to move
 151
 152         mtsar           %r1
 153         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
 154         blr             %r1,%r0         ; branch to 8-instruction sequence
 155         nop
 156
 157 ;
 158 ; Cacheline start (32-byte cacheline)
 159 ;
 160
 161         ;
 162         ; RDR 0 sequence
 163         ;
 164         SFDIAG          (0)
 165         ssm                 0,0
 166         MFDIAG_1        (28)
 167         shrpd           ret0,%r0,%sar,%r1
 168         MTDIAG_1        (1)                     ; mtdiag %dr1, %r1
 169         STDIAG          (0)
 170         ssm                 0,0
 171         b,n         perf_rdr_shift_in_W_leave
 172
 173         ;
 174         ; RDR 1 sequence
 175         ;
 176         sync
 177         ssm                 0,0
 178         SFDIAG          (1)
 179         ssm                 0,0
 180         MFDIAG_1        (28)
 181         ssm                 0,0
 182         b,n         perf_rdr_shift_in_W_leave
 183         nop
 184
 185         ;
 186         ; RDR 2 read sequence
 187         ;
 188         SFDIAG          (2)
 189         ssm                 0,0
 190         MFDIAG_1        (28)
 191         shrpd           ret0,%r0,%sar,%r1
 192         MTDIAG_1        (1)
 193         STDIAG          (2)
 194         ssm                 0,0
 195         b,n         perf_rdr_shift_in_W_leave
 196
 197         ;
 198         ; RDR 3 read sequence
 199         ;
 200         b,n         perf_rdr_shift_in_W_leave
 201         nop
 202         nop
 203         nop
 204         nop
 205         nop
 206         nop
 207         nop
 208
 209         ;
 210         ; RDR 4 read sequence
 211         ;
 212         sync
 213         ssm             0,0
 214         SFDIAG          (4)
 215         ssm             0,0
 216         MFDIAG_1        (28)
 217         b,n         perf_rdr_shift_in_W_leave
 218         ssm             0,0
 219         nop
 220
 221         ;
 222         ; RDR 5 read sequence
 223         ;
 224         sync
 225         ssm             0,0
 226         SFDIAG          (5)
 227         ssm             0,0
 228         MFDIAG_1        (28)
 229         b,n         perf_rdr_shift_in_W_leave
 230         ssm             0,0
 231         nop
 232
 233         ;
 234         ; RDR 6 read sequence
 235         ;
 236         sync
 237         ssm             0,0
 238         SFDIAG          (6)
 239         ssm             0,0
 240         MFDIAG_1        (28)
 241         b,n         perf_rdr_shift_in_W_leave
 242         ssm             0,0
 243         nop
 244
 245         ;
 246         ; RDR 7 read sequence
 247         ;
 248         b,n         perf_rdr_shift_in_W_leave
 249         nop
 250         nop
 251         nop
 252         nop
 253         nop
 254         nop
 255         nop
 256
 257         ;
 258         ; RDR 8 read sequence
 259         ;
 260         b,n         perf_rdr_shift_in_W_leave
 261         nop
 262         nop
 263         nop
 264         nop
 265         nop
 266         nop
 267         nop
 268
 269         ;
 270         ; RDR 9 read sequence
 271         ;
 272         b,n         perf_rdr_shift_in_W_leave
 273         nop
 274         nop
 275         nop
 276         nop
 277         nop
 278         nop
 279         nop
 280
 281         ;
 282         ; RDR 10 read sequence
 283         ;
 284         SFDIAG          (10)
 285         ssm             0,0
 286         MFDIAG_1        (28)
 287         shrpd           ret0,%r0,%sar,%r1
 288         MTDIAG_1        (1)
 289         STDIAG          (10)
 290         ssm             0,0
 291         b,n         perf_rdr_shift_in_W_leave
 292
 293         ;
 294         ; RDR 11 read sequence
 295         ;
 296         SFDIAG          (11)
 297         ssm             0,0
 298         MFDIAG_1        (28)
 299         shrpd           ret0,%r0,%sar,%r1
 300         MTDIAG_1        (1)
 301         STDIAG          (11)
 302         ssm             0,0
 303         b,n         perf_rdr_shift_in_W_leave
 304
 305         ;
 306         ; RDR 12 read sequence
 307         ;
 308         b,n         perf_rdr_shift_in_W_leave
 309         nop
 310         nop
 311         nop
 312         nop
 313         nop
 314         nop
 315         nop
 316
 317         ;
 318         ; RDR 13 read sequence
 319         ;
 320         sync
 321         ssm             0,0
 322         SFDIAG          (13)
 323         ssm             0,0
 324         MFDIAG_1        (28)
 325         b,n         perf_rdr_shift_in_W_leave
 326         ssm             0,0
 327         nop
 328
 329         ;
 330         ; RDR 14 read sequence
 331         ;
 332         SFDIAG          (14)
 333         ssm             0,0
 334         MFDIAG_1        (28)
 335         shrpd           ret0,%r0,%sar,%r1
 336         MTDIAG_1        (1)
 337         STDIAG          (14)
 338         ssm             0,0
 339         b,n         perf_rdr_shift_in_W_leave
 340
 341         ;
 342         ; RDR 15 read sequence
 343         ;
 344         sync
 345         ssm             0,0
 346         SFDIAG          (15)
 347         ssm             0,0
 348         MFDIAG_1        (28)
 349         ssm             0,0
 350         b,n         perf_rdr_shift_in_W_leave
 351         nop
 352
 353         ;
 354         ; RDR 16 read sequence
 355         ;
 356         sync
 357         ssm             0,0
 358         SFDIAG          (16)
 359         ssm             0,0
 360         MFDIAG_1        (28)
 361         b,n         perf_rdr_shift_in_W_leave
 362         ssm             0,0
 363         nop
 364
 365         ;
 366         ; RDR 17 read sequence
 367         ;
 368         SFDIAG          (17)
 369         ssm             0,0
 370         MFDIAG_1        (28)
 371         shrpd           ret0,%r0,%sar,%r1
 372         MTDIAG_1        (1)
 373         STDIAG          (17)
 374         ssm             0,0
 375         b,n         perf_rdr_shift_in_W_leave
 376
 377         ;
 378         ; RDR 18 read sequence
 379         ;
 380         SFDIAG          (18)
 381         ssm             0,0
 382         MFDIAG_1        (28)
 383         shrpd           ret0,%r0,%sar,%r1
 384         MTDIAG_1        (1)
 385         STDIAG          (18)
 386         ssm             0,0
 387         b,n         perf_rdr_shift_in_W_leave
 388
 389         ;
 390         ; RDR 19 read sequence
 391         ;
 392         b,n         perf_rdr_shift_in_W_leave
 393         nop
 394         nop
 395         nop
 396         nop
 397         nop
 398         nop
 399         nop
 400
 401         ;
 402         ; RDR 20 read sequence
 403         ;
 404         sync
 405         ssm             0,0
 406         SFDIAG          (20)
 407         ssm             0,0
 408         MFDIAG_1        (28)
 409         b,n         perf_rdr_shift_in_W_leave
 410         ssm             0,0
 411         nop
 412
 413         ;
 414         ; RDR 21 read sequence
 415         ;
 416         sync
 417         ssm             0,0
 418         SFDIAG          (21)
 419         ssm             0,0
 420         MFDIAG_1        (28)
 421         b,n         perf_rdr_shift_in_W_leave
 422         ssm             0,0
 423         nop
 424
 425         ;
 426         ; RDR 22 read sequence
 427         ;
 428         sync
 429         ssm             0,0
 430         SFDIAG          (22)
 431         ssm             0,0
 432         MFDIAG_1        (28)
 433         b,n         perf_rdr_shift_in_W_leave
 434         ssm             0,0
 435         nop
 436
 437         ;
 438         ; RDR 23 read sequence
 439         ;
 440         sync
 441         ssm             0,0
 442         SFDIAG          (23)
 443         ssm             0,0
 444         MFDIAG_1        (28)
 445         b,n         perf_rdr_shift_in_W_leave
 446         ssm             0,0
 447         nop
 448
 449         ;
 450         ; RDR 24 read sequence
 451         ;
 452         sync
 453         ssm             0,0
 454         SFDIAG          (24)
 455         ssm             0,0
 456         MFDIAG_1        (28)
 457         b,n         perf_rdr_shift_in_W_leave
 458         ssm             0,0
 459         nop
 460
 461         ;
 462         ; RDR 25 read sequence
 463         ;
 464         sync
 465         ssm             0,0
 466         SFDIAG          (25)
 467         ssm             0,0
 468         MFDIAG_1        (28)
 469         b,n         perf_rdr_shift_in_W_leave
 470         ssm             0,0
 471         nop
 472
 473         ;
 474         ; RDR 26 read sequence
 475         ;
 476         SFDIAG          (26)
 477         ssm             0,0
 478         MFDIAG_1        (28)
 479         shrpd           ret0,%r0,%sar,%r1
 480         MTDIAG_1        (1)
 481         STDIAG          (26)
 482         ssm             0,0
 483         b,n         perf_rdr_shift_in_W_leave
 484
 485         ;
 486         ; RDR 27 read sequence
 487         ;
 488         SFDIAG          (27)
 489         ssm             0,0
 490         MFDIAG_1        (28)
 491         shrpd           ret0,%r0,%sar,%r1
 492         MTDIAG_1        (1)
 493         STDIAG          (27)
 494         ssm             0,0
 495         b,n         perf_rdr_shift_in_W_leave
 496
 497         ;
 498         ; RDR 28 read sequence
 499         ;
 500         sync
 501         ssm             0,0
 502         SFDIAG          (28)
 503         ssm             0,0
 504         MFDIAG_1        (28)
 505         b,n         perf_rdr_shift_in_W_leave
 506         ssm             0,0
 507         nop
 508
 509         ;
 510         ; RDR 29 read sequence
 511         ;
 512         sync
 513         ssm             0,0
 514         SFDIAG          (29)
 515         ssm             0,0
 516         MFDIAG_1        (28)
 517         b,n         perf_rdr_shift_in_W_leave
 518         ssm             0,0
 519         nop
 520
 521         ;
 522         ; RDR 30 read sequence
 523         ;
 524         SFDIAG          (30)
 525         ssm             0,0
 526         MFDIAG_1        (28)
 527         shrpd           ret0,%r0,%sar,%r1
 528         MTDIAG_1        (1)
 529         STDIAG          (30)
 530         ssm             0,0
 531         b,n         perf_rdr_shift_in_W_leave
 532
 533         ;
 534         ; RDR 31 read sequence
 535         ;
 536         sync
 537         ssm             0,0
 538         SFDIAG          (31)
 539         ssm             0,0
 540         MFDIAG_1        (28)
 541         nop
 542         ssm             0,0
 543         nop
 544
 545         ;
 546         ; Fallthrough
 547         ;
 548
 549 perf_rdr_shift_in_W_leave:
 550         bve                 (%r2)
 551         .exit
 552         MTDIAG_2        (24)                    ; restore DR2
 553         .procend
 554 ENDPROC(perf_rdr_shift_in_W)
 555
 556
 557 ;***********************************************************************
 558 ;*
 559 ;* Name: perf_rdr_shift_out_W
 560 ;*
 561 ;* Description:
 562 ;*      This routine moves data to the RDR's.  The double-word that
 563 ;*      arg1 points to is loaded and moved into the staging register.
 564 ;*      Then the STDIAG instruction for the RDR # in arg0 is called
 565 ;*      to move the data to the RDR.
 566 ;*
 567 ;* Arguments:
 568 ;*      arg0 = rdr number
 569 ;*      arg1 = 64-bit value to write
 570 ;*      %r24 - DR2 | DR2_SLOW_RET
 571 ;*      %r23 - original DR2 value
 572 ;*
 573 ;* Returns:
 574 ;*      None
 575 ;*
 576 ;* Register usage:
 577 ;*
 578 ;***********************************************************************
 579
 580 ENTRY(perf_rdr_shift_out_W)
 581         .proc
 582         .callinfo frame=0,NO_CALLS
 583         .entry
 584 ;
 585 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
 586 ; shifting is done, from or to, the remote diagnose registers.
 587 ;
 588
 589         depdi,z         1,DR2_SLOW_RET,1,%r24
 590         MFDIAG_2        (23)
 591         or              %r24,%r23,%r24
 592         MTDIAG_2        (24)            ; set DR2_SLOW_RET
 593         MTDIAG_1        (25)            ; data to the staging register
 594         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
 595         blr                 %r1,%r0     ; branch to 8-instruction sequence
 596         nop
 597
 598         ;
 599         ; RDR 0 write sequence
 600         ;
 601         sync                            ; RDR 0 write sequence
 602         ssm             0,0
 603         STDIAG          (0)
 604         ssm             0,0
 605         b,n         perf_rdr_shift_out_W_leave
 606         nop
 607         ssm             0,0
 608         nop
 609
 610         ;
 611         ; RDR 1 write sequence
 612         ;
 613         sync
 614         ssm             0,0
 615         STDIAG          (1)
 616         ssm             0,0
 617         b,n         perf_rdr_shift_out_W_leave
 618         nop
 619         ssm             0,0
 620         nop
 621
 622         ;
 623         ; RDR 2 write sequence
 624         ;
 625         sync
 626         ssm             0,0
 627         STDIAG          (2)
 628         ssm             0,0
 629         b,n         perf_rdr_shift_out_W_leave
 630         nop
 631         ssm             0,0
 632         nop
 633
 634         ;
 635         ; RDR 3 write sequence
 636         ;
 637         sync
 638         ssm             0,0
 639         STDIAG          (3)
 640         ssm             0,0
 641         b,n         perf_rdr_shift_out_W_leave
 642         nop
 643         ssm             0,0
 644         nop
 645
 646         ;
 647         ; RDR 4 write sequence
 648         ;
 649         sync
 650         ssm             0,0
 651         STDIAG          (4)
 652         ssm             0,0
 653         b,n         perf_rdr_shift_out_W_leave
 654         nop
 655         ssm             0,0
 656         nop
 657
 658         ;
 659         ; RDR 5 write sequence
 660         ;
 661         sync
 662         ssm             0,0
 663         STDIAG          (5)
 664         ssm             0,0
 665         b,n         perf_rdr_shift_out_W_leave
 666         nop
 667         ssm             0,0
 668         nop
 669
 670         ;
 671         ; RDR 6 write sequence
 672         ;
 673         sync
 674         ssm             0,0
 675         STDIAG          (6)
 676         ssm             0,0
 677         b,n         perf_rdr_shift_out_W_leave
 678         nop
 679         ssm             0,0
 680         nop
 681
 682         ;
 683         ; RDR 7 write sequence
 684         ;
 685         sync
 686         ssm             0,0
 687         STDIAG          (7)
 688         ssm             0,0
 689         b,n         perf_rdr_shift_out_W_leave
 690         nop
 691         ssm             0,0
 692         nop
 693
 694         ;
 695         ; RDR 8 write sequence
 696         ;
 697         sync
 698         ssm             0,0
 699         STDIAG          (8)
 700         ssm             0,0
 701         b,n         perf_rdr_shift_out_W_leave
 702         nop
 703         ssm             0,0
 704         nop
 705
 706         ;
 707         ; RDR 9 write sequence
 708         ;
 709         sync
 710         ssm             0,0
 711         STDIAG          (9)
 712         ssm             0,0
 713         b,n         perf_rdr_shift_out_W_leave
 714         nop
 715         ssm             0,0
 716         nop
 717
 718         ;
 719         ; RDR 10 write sequence
 720         ;
 721         sync
 722         ssm             0,0
 723         STDIAG          (10)
 724         STDIAG          (26)
 725         ssm             0,0
 726         b,n         perf_rdr_shift_out_W_leave
 727         ssm             0,0
 728         nop
 729
 730         ;
 731         ; RDR 11 write sequence
 732         ;
 733         sync
 734         ssm             0,0
 735         STDIAG          (11)
 736         STDIAG          (27)
 737         ssm             0,0
 738         b,n         perf_rdr_shift_out_W_leave
 739         ssm             0,0
 740         nop
 741
 742         ;
 743         ; RDR 12 write sequence
 744         ;
 745         sync
 746         ssm             0,0
 747         STDIAG          (12)
 748         ssm             0,0
 749         b,n         perf_rdr_shift_out_W_leave
 750         nop
 751         ssm             0,0
 752         nop
 753
 754         ;
 755         ; RDR 13 write sequence
 756         ;
 757         sync
 758         ssm             0,0
 759         STDIAG          (13)
 760         ssm             0,0
 761         b,n         perf_rdr_shift_out_W_leave
 762         nop
 763         ssm             0,0
 764         nop
 765
 766         ;
 767         ; RDR 14 write sequence
 768         ;
 769         sync
 770         ssm             0,0
 771         STDIAG          (14)
 772         ssm             0,0
 773         b,n         perf_rdr_shift_out_W_leave
 774         nop
 775         ssm             0,0
 776         nop
 777
 778         ;
 779         ; RDR 15 write sequence
 780         ;
 781         sync
 782         ssm             0,0
 783         STDIAG          (15)
 784         ssm             0,0
 785         b,n         perf_rdr_shift_out_W_leave
 786         nop
 787         ssm             0,0
 788         nop
 789
 790         ;
 791         ; RDR 16 write sequence
 792         ;
 793         sync
 794         ssm             0,0
 795         STDIAG          (16)
 796         ssm             0,0
 797         b,n         perf_rdr_shift_out_W_leave
 798         nop
 799         ssm             0,0
 800         nop
 801
 802         ;
 803         ; RDR 17 write sequence
 804         ;
 805         sync
 806         ssm             0,0
 807         STDIAG          (17)
 808         ssm             0,0
 809         b,n         perf_rdr_shift_out_W_leave
 810         nop
 811         ssm             0,0
 812         nop
 813
 814         ;
 815         ; RDR 18 write sequence
 816         ;
 817         sync
 818         ssm             0,0
 819         STDIAG          (18)
 820         ssm             0,0
 821         b,n         perf_rdr_shift_out_W_leave
 822         nop
 823         ssm             0,0
 824         nop
 825
 826         ;
 827         ; RDR 19 write sequence
 828         ;
 829         sync
 830         ssm             0,0
 831         STDIAG          (19)
 832         ssm             0,0
 833         b,n         perf_rdr_shift_out_W_leave
 834         nop
 835         ssm             0,0
 836         nop
 837
 838         ;
 839         ; RDR 20 write sequence
 840         ;
 841         sync
 842         ssm             0,0
 843         STDIAG          (20)
 844         ssm             0,0
 845         b,n         perf_rdr_shift_out_W_leave
 846         nop
 847         ssm             0,0
 848         nop
 849
 850         ;
 851         ; RDR 21 write sequence
 852         ;
 853         sync
 854         ssm             0,0
 855         STDIAG          (21)
 856         ssm             0,0
 857         b,n         perf_rdr_shift_out_W_leave
 858         nop
 859         ssm             0,0
 860         nop
 861
 862         ;
 863         ; RDR 22 write sequence
 864         ;
 865         sync
 866         ssm             0,0
 867         STDIAG          (22)
 868         ssm             0,0
 869         b,n         perf_rdr_shift_out_W_leave
 870         nop
 871         ssm             0,0
 872         nop
 873
 874         ;
 875         ; RDR 23 write sequence
 876         ;
 877         sync
 878         ssm             0,0
 879         STDIAG          (23)
 880         ssm             0,0
 881         b,n         perf_rdr_shift_out_W_leave
 882         nop
 883         ssm             0,0
 884         nop
 885
 886         ;
 887         ; RDR 24 write sequence
 888         ;
 889         sync
 890         ssm             0,0
 891         STDIAG          (24)
 892         ssm             0,0
 893         b,n         perf_rdr_shift_out_W_leave
 894         nop
 895         ssm             0,0
 896         nop
 897
 898         ;
 899         ; RDR 25 write sequence
 900         ;
 901         sync
 902         ssm             0,0
 903         STDIAG          (25)
 904         ssm             0,0
 905         b,n         perf_rdr_shift_out_W_leave
 906         nop
 907         ssm             0,0
 908         nop
 909
 910         ;
 911         ; RDR 26 write sequence
 912         ;
 913         sync
 914         ssm             0,0
 915         STDIAG          (10)
 916         STDIAG          (26)
 917         ssm             0,0
 918         b,n         perf_rdr_shift_out_W_leave
 919         ssm             0,0
 920         nop
 921
 922         ;
 923         ; RDR 27 write sequence
 924         ;
 925         sync
 926         ssm             0,0
 927         STDIAG          (11)
 928         STDIAG          (27)
 929         ssm             0,0
 930         b,n         perf_rdr_shift_out_W_leave
 931         ssm             0,0
 932         nop
 933
 934         ;
 935         ; RDR 28 write sequence
 936         ;
 937         sync
 938         ssm             0,0
 939         STDIAG          (28)
 940         ssm             0,0
 941         b,n         perf_rdr_shift_out_W_leave
 942         nop
 943         ssm             0,0
 944         nop
 945
 946         ;
 947         ; RDR 29 write sequence
 948         ;
 949         sync
 950         ssm             0,0
 951         STDIAG          (29)
 952         ssm             0,0
 953         b,n         perf_rdr_shift_out_W_leave
 954         nop
 955         ssm             0,0
 956         nop
 957
 958         ;
 959         ; RDR 30 write sequence
 960         ;
 961         sync
 962         ssm             0,0
 963         STDIAG          (30)
 964         ssm             0,0
 965         b,n         perf_rdr_shift_out_W_leave
 966         nop
 967         ssm             0,0
 968         nop
 969
 970         ;
 971         ; RDR 31 write sequence
 972         ;
 973         sync
 974         ssm             0,0
 975         STDIAG          (31)
 976         ssm             0,0
 977         b,n         perf_rdr_shift_out_W_leave
 978         nop
 979         ssm             0,0
 980         nop
 981
 982 perf_rdr_shift_out_W_leave:
 983         bve             (%r2)
 984         .exit
 985         MTDIAG_2        (23)                    ; restore DR2
 986         .procend
 987 ENDPROC(perf_rdr_shift_out_W)
 988
 989
 990 ;***********************************************************************
 991 ;*
 992 ;* Name: rdr_shift_in_U
 993 ;*
 994 ;* Description:
 995 ;*      This routine shifts data in from the RDR in arg0 and returns
 996 ;*      the result in ret0.  If the RDR is <= 64 bits in length, it
 997 ;*      is shifted shifted backup immediately.  This is to compensate
 998 ;*      for RDR10 which has bits that preclude PDC stack operations
 999 ;*      when they are in the wrong state.
1000 ;*
1001 ;* Arguments:
1002 ;*      arg0 : rdr to be read
1003 ;*      arg1 : bit length of rdr
1004 ;*
1005 ;* Returns:
1006 ;*      ret0 = next 64 bits of rdr data from staging register
1007 ;*
1008 ;* Register usage:
1009 ;*      arg0 : rdr to be read
1010 ;*      arg1 : bit length of rdr
1011 ;*      %r24 - original DR2 value
1012 ;*      %r23 - DR2 | DR2_SLOW_RET
1013 ;*      %r1  - scratch
1014 ;*
1015 ;***********************************************************************
1016
1017 ENTRY(perf_rdr_shift_in_U)
1018         .proc
1019         .callinfo frame=0,NO_CALLS
1020         .entry
1021
1022 ; read(shift in) the RDR.
1023 ;
1024 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1025 ; shifting is done, from or to, remote diagnose registers.
1026
1027         depdi,z         1,DR2_SLOW_RET,1,%r29
1028         MFDIAG_2        (24)
1029         or                      %r24,%r29,%r29
1030         MTDIAG_2        (29)                    ; set DR2_SLOW_RET
1031
1032         nop
1033         nop
1034         nop
1035         nop
1036
1037 ;
1038 ; Start of next 32-byte cacheline
1039 ;
1040         nop
1041         nop
1042         nop
1043         extrd,u         arg1,63,6,%r1
1044
1045         mtsar           %r1
1046         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
1047         blr             %r1,%r0         ; branch to 8-instruction sequence
1048         nop
1049
1050 ;
1051 ; Start of next 32-byte cacheline
1052 ;
1053         SFDIAG          (0)             ; RDR 0 read sequence
1054         ssm             0,0
1055         MFDIAG_1        (28)
1056         shrpd           ret0,%r0,%sar,%r1
1057         MTDIAG_1        (1)
1058         STDIAG          (0)
1059         ssm             0,0
1060         b,n         perf_rdr_shift_in_U_leave
1061
1062         SFDIAG          (1)             ; RDR 1 read sequence
1063         ssm             0,0
1064         MFDIAG_1        (28)
1065         shrpd           ret0,%r0,%sar,%r1
1066         MTDIAG_1        (1)
1067         STDIAG          (1)
1068         ssm             0,0
1069         b,n         perf_rdr_shift_in_U_leave
1070
1071         sync                            ; RDR 2 read sequence
1072         ssm             0,0
1073         SFDIAG          (4)
1074         ssm             0,0
1075         MFDIAG_1        (28)
1076         b,n         perf_rdr_shift_in_U_leave
1077         ssm             0,0
1078         nop
1079
1080         sync                            ; RDR 3 read sequence
1081         ssm             0,0
1082         SFDIAG          (3)
1083         ssm             0,0
1084         MFDIAG_1        (28)
1085         b,n         perf_rdr_shift_in_U_leave
1086         ssm             0,0
1087         nop
1088
1089         sync                            ; RDR 4 read sequence
1090         ssm             0,0
1091         SFDIAG          (4)
1092         ssm             0,0
1093         MFDIAG_1        (28)
1094         b,n         perf_rdr_shift_in_U_leave
1095         ssm             0,0
1096         nop
1097
1098         sync                            ; RDR 5 read sequence
1099         ssm             0,0
1100         SFDIAG          (5)
1101         ssm             0,0
1102         MFDIAG_1        (28)
1103         b,n         perf_rdr_shift_in_U_leave
1104         ssm             0,0
1105         nop
1106
1107         sync                            ; RDR 6 read sequence
1108         ssm             0,0
1109         SFDIAG          (6)
1110         ssm             0,0
1111         MFDIAG_1        (28)
1112         b,n         perf_rdr_shift_in_U_leave
1113         ssm             0,0
1114         nop
1115
1116         sync                            ; RDR 7 read sequence
1117         ssm             0,0
1118         SFDIAG          (7)
1119         ssm             0,0
1120         MFDIAG_1        (28)
1121         b,n         perf_rdr_shift_in_U_leave
1122         ssm             0,0
1123         nop
1124
1125         b,n         perf_rdr_shift_in_U_leave
1126         nop
1127         nop
1128         nop
1129         nop
1130         nop
1131         nop
1132         nop
1133
1134         SFDIAG          (9)             ; RDR 9 read sequence
1135         ssm             0,0
1136         MFDIAG_1        (28)
1137         shrpd           ret0,%r0,%sar,%r1
1138         MTDIAG_1        (1)
1139         STDIAG          (9)
1140         ssm             0,0
1141         b,n         perf_rdr_shift_in_U_leave
1142
1143         SFDIAG          (10)            ; RDR 10 read sequence
1144         ssm             0,0
1145         MFDIAG_1        (28)
1146         shrpd           ret0,%r0,%sar,%r1
1147         MTDIAG_1        (1)
1148         STDIAG          (10)
1149         ssm             0,0
1150         b,n         perf_rdr_shift_in_U_leave
1151
1152         SFDIAG          (11)            ; RDR 11 read sequence
1153         ssm             0,0
1154         MFDIAG_1        (28)
1155         shrpd           ret0,%r0,%sar,%r1
1156         MTDIAG_1        (1)
1157         STDIAG          (11)
1158         ssm             0,0
1159         b,n         perf_rdr_shift_in_U_leave
1160
1161         SFDIAG          (12)            ; RDR 12 read sequence
1162         ssm             0,0
1163         MFDIAG_1        (28)
1164         shrpd           ret0,%r0,%sar,%r1
1165         MTDIAG_1        (1)
1166         STDIAG          (12)
1167         ssm             0,0
1168         b,n         perf_rdr_shift_in_U_leave
1169
1170         SFDIAG          (13)            ; RDR 13 read sequence
1171         ssm             0,0
1172         MFDIAG_1        (28)
1173         shrpd           ret0,%r0,%sar,%r1
1174         MTDIAG_1        (1)
1175         STDIAG          (13)
1176         ssm             0,0
1177         b,n         perf_rdr_shift_in_U_leave
1178
1179         SFDIAG          (14)            ; RDR 14 read sequence
1180         ssm             0,0
1181         MFDIAG_1        (28)
1182         shrpd           ret0,%r0,%sar,%r1
1183         MTDIAG_1        (1)
1184         STDIAG          (14)
1185         ssm             0,0
1186         b,n         perf_rdr_shift_in_U_leave
1187
1188         SFDIAG          (15)            ; RDR 15 read sequence
1189         ssm             0,0
1190         MFDIAG_1        (28)
1191         shrpd           ret0,%r0,%sar,%r1
1192         MTDIAG_1        (1)
1193         STDIAG          (15)
1194         ssm             0,0
1195         b,n         perf_rdr_shift_in_U_leave
1196
1197         sync                            ; RDR 16 read sequence
1198         ssm             0,0
1199         SFDIAG          (16)
1200         ssm             0,0
1201         MFDIAG_1        (28)
1202         b,n         perf_rdr_shift_in_U_leave
1203         ssm             0,0
1204         nop
1205
1206         SFDIAG          (17)            ; RDR 17 read sequence
1207         ssm             0,0
1208         MFDIAG_1        (28)
1209         shrpd           ret0,%r0,%sar,%r1
1210         MTDIAG_1        (1)
1211         STDIAG          (17)
1212         ssm             0,0
1213         b,n         perf_rdr_shift_in_U_leave
1214
1215         SFDIAG          (18)            ; RDR 18 read sequence
1216         ssm             0,0
1217         MFDIAG_1        (28)
1218         shrpd           ret0,%r0,%sar,%r1
1219         MTDIAG_1        (1)
1220         STDIAG          (18)
1221         ssm             0,0
1222         b,n         perf_rdr_shift_in_U_leave
1223
1224         b,n         perf_rdr_shift_in_U_leave
1225         nop
1226         nop
1227         nop
1228         nop
1229         nop
1230         nop
1231         nop
1232
1233         sync                            ; RDR 20 read sequence
1234         ssm             0,0
1235         SFDIAG          (20)
1236         ssm             0,0
1237         MFDIAG_1        (28)
1238         b,n         perf_rdr_shift_in_U_leave
1239         ssm             0,0
1240         nop
1241
1242         sync                            ; RDR 21 read sequence
1243         ssm             0,0
1244         SFDIAG          (21)
1245         ssm             0,0
1246         MFDIAG_1        (28)
1247         b,n         perf_rdr_shift_in_U_leave
1248         ssm             0,0
1249         nop
1250
1251         sync                            ; RDR 22 read sequence
1252         ssm             0,0
1253         SFDIAG          (22)
1254         ssm             0,0
1255         MFDIAG_1        (28)
1256         b,n         perf_rdr_shift_in_U_leave
1257         ssm             0,0
1258         nop
1259
1260         sync                            ; RDR 23 read sequence
1261         ssm             0,0
1262         SFDIAG          (23)
1263         ssm             0,0
1264         MFDIAG_1        (28)
1265         b,n         perf_rdr_shift_in_U_leave
1266         ssm             0,0
1267         nop
1268
1269         sync                            ; RDR 24 read sequence
1270         ssm             0,0
1271         SFDIAG          (24)
1272         ssm             0,0
1273         MFDIAG_1        (28)
1274         b,n         perf_rdr_shift_in_U_leave
1275         ssm             0,0
1276         nop
1277
1278         sync                            ; RDR 25 read sequence
1279         ssm             0,0
1280         SFDIAG          (25)
1281         ssm             0,0
1282         MFDIAG_1        (28)
1283         b,n         perf_rdr_shift_in_U_leave
1284         ssm             0,0
1285         nop
1286
1287         SFDIAG          (26)            ; RDR 26 read sequence
1288         ssm             0,0
1289         MFDIAG_1        (28)
1290         shrpd           ret0,%r0,%sar,%r1
1291         MTDIAG_1        (1)
1292         STDIAG          (26)
1293         ssm             0,0
1294         b,n         perf_rdr_shift_in_U_leave
1295
1296         SFDIAG          (27)            ; RDR 27 read sequence
1297         ssm             0,0
1298         MFDIAG_1        (28)
1299         shrpd           ret0,%r0,%sar,%r1
1300         MTDIAG_1        (1)
1301         STDIAG          (27)
1302         ssm             0,0
1303         b,n         perf_rdr_shift_in_U_leave
1304
1305         sync                            ; RDR 28 read sequence
1306         ssm             0,0
1307         SFDIAG          (28)
1308         ssm             0,0
1309         MFDIAG_1        (28)
1310         b,n         perf_rdr_shift_in_U_leave
1311         ssm             0,0
1312         nop
1313
1314         b,n         perf_rdr_shift_in_U_leave
1315         nop
1316         nop
1317         nop
1318         nop
1319         nop
1320         nop
1321         nop
1322
1323         SFDIAG          (30)            ; RDR 30 read sequence
1324         ssm             0,0
1325         MFDIAG_1        (28)
1326         shrpd           ret0,%r0,%sar,%r1
1327         MTDIAG_1        (1)
1328         STDIAG          (30)
1329         ssm             0,0
1330         b,n         perf_rdr_shift_in_U_leave
1331
1332         SFDIAG          (31)            ; RDR 31 read sequence
1333         ssm             0,0
1334         MFDIAG_1        (28)
1335         shrpd           ret0,%r0,%sar,%r1
1336         MTDIAG_1        (1)
1337         STDIAG          (31)
1338         ssm             0,0
1339         b,n         perf_rdr_shift_in_U_leave
1340         nop
1341
1342 perf_rdr_shift_in_U_leave:
1343         bve                 (%r2)
1344         .exit
1345         MTDIAG_2        (24)                    ; restore DR2
1346         .procend
1347 ENDPROC(perf_rdr_shift_in_U)
1348
1349 ;***********************************************************************
1350 ;*
1351 ;* Name: rdr_shift_out_U
1352 ;*
1353 ;* Description:
1354 ;*      This routine moves data to the RDR's.  The double-word that
1355 ;*      arg1 points to is loaded and moved into the staging register.
1356 ;*      Then the STDIAG instruction for the RDR # in arg0 is called
1357 ;*      to move the data to the RDR.
1358 ;*
1359 ;* Arguments:
1360 ;*      arg0 = rdr target
1361 ;*      arg1 = buffer pointer
1362 ;*
1363 ;* Returns:
1364 ;*      None
1365 ;*
1366 ;* Register usage:
1367 ;*      arg0 = rdr target
1368 ;*      arg1 = buffer pointer
1369 ;*      %r24 - DR2 | DR2_SLOW_RET
1370 ;*      %r23 - original DR2 value
1371 ;*
1372 ;***********************************************************************
1373
1374 ENTRY(perf_rdr_shift_out_U)
1375         .proc
1376         .callinfo frame=0,NO_CALLS
1377         .entry
1378
1379 ;
1380 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1381 ; shifting is done, from or to, the remote diagnose registers.
1382 ;
1383
1384         depdi,z         1,DR2_SLOW_RET,1,%r24
1385         MFDIAG_2        (23)
1386         or              %r24,%r23,%r24
1387         MTDIAG_2        (24)            ; set DR2_SLOW_RET
1388
1389         MTDIAG_1        (25)            ; data to the staging register
1390         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
1391         blr             %r1,%r0         ; branch to 8-instruction sequence
1392         nop
1393
1394 ;
1395 ; 32-byte cachline aligned
1396 ;
1397
1398         sync                            ; RDR 0 write sequence
1399         ssm             0,0
1400         STDIAG          (0)
1401         ssm             0,0
1402         b,n         perf_rdr_shift_out_U_leave
1403         nop
1404         ssm             0,0
1405         nop
1406
1407         sync                            ; RDR 1 write sequence
1408         ssm             0,0
1409         STDIAG          (1)
1410         ssm             0,0
1411         b,n         perf_rdr_shift_out_U_leave
1412         nop
1413         ssm             0,0
1414         nop
1415
1416         sync                            ; RDR 2 write sequence
1417         ssm             0,0
1418         STDIAG          (2)
1419         ssm             0,0
1420         b,n         perf_rdr_shift_out_U_leave
1421         nop
1422         ssm             0,0
1423         nop
1424
1425         sync                            ; RDR 3 write sequence
1426         ssm             0,0
1427         STDIAG          (3)
1428         ssm             0,0
1429         b,n         perf_rdr_shift_out_U_leave
1430         nop
1431         ssm             0,0
1432         nop
1433
1434         sync                            ; RDR 4 write sequence
1435         ssm             0,0
1436         STDIAG          (4)
1437         ssm             0,0
1438         b,n         perf_rdr_shift_out_U_leave
1439         nop
1440         ssm             0,0
1441         nop
1442
1443         sync                            ; RDR 5 write sequence
1444         ssm             0,0
1445         STDIAG          (5)
1446         ssm             0,0
1447         b,n         perf_rdr_shift_out_U_leave
1448         nop
1449         ssm             0,0
1450         nop
1451
1452         sync                            ; RDR 6 write sequence
1453         ssm             0,0
1454         STDIAG          (6)
1455         ssm             0,0
1456         b,n         perf_rdr_shift_out_U_leave
1457         nop
1458         ssm             0,0
1459         nop
1460
1461         sync                            ; RDR 7 write sequence
1462         ssm             0,0
1463         STDIAG          (7)
1464         ssm             0,0
1465         b,n         perf_rdr_shift_out_U_leave
1466         nop
1467         ssm             0,0
1468         nop
1469
1470         sync                            ; RDR 8 write sequence
1471         ssm             0,0
1472         STDIAG          (8)
1473         ssm             0,0
1474         b,n         perf_rdr_shift_out_U_leave
1475         nop
1476         ssm             0,0
1477         nop
1478
1479         sync                            ; RDR 9 write sequence
1480         ssm             0,0
1481         STDIAG          (9)
1482         ssm             0,0
1483         b,n         perf_rdr_shift_out_U_leave
1484         nop
1485         ssm             0,0
1486         nop
1487
1488         sync                            ; RDR 10 write sequence
1489         ssm             0,0
1490         STDIAG          (10)
1491         ssm             0,0
1492         b,n         perf_rdr_shift_out_U_leave
1493         nop
1494         ssm             0,0
1495         nop
1496
1497         sync                            ; RDR 11 write sequence
1498         ssm             0,0
1499         STDIAG          (11)
1500         ssm             0,0
1501         b,n         perf_rdr_shift_out_U_leave
1502         nop
1503         ssm             0,0
1504         nop
1505
1506         sync                            ; RDR 12 write sequence
1507         ssm             0,0
1508         STDIAG          (12)
1509         ssm             0,0
1510         b,n         perf_rdr_shift_out_U_leave
1511         nop
1512         ssm             0,0
1513         nop
1514
1515         sync                            ; RDR 13 write sequence
1516         ssm             0,0
1517         STDIAG          (13)
1518         ssm             0,0
1519         b,n         perf_rdr_shift_out_U_leave
1520         nop
1521         ssm             0,0
1522         nop
1523
1524         sync                            ; RDR 14 write sequence
1525         ssm             0,0
1526         STDIAG          (14)
1527         ssm             0,0
1528         b,n         perf_rdr_shift_out_U_leave
1529         nop
1530         ssm             0,0
1531         nop
1532
1533         sync                            ; RDR 15 write sequence
1534         ssm             0,0
1535         STDIAG          (15)
1536         ssm             0,0
1537         b,n         perf_rdr_shift_out_U_leave
1538         nop
1539         ssm             0,0
1540         nop
1541
1542         sync                            ; RDR 16 write sequence
1543         ssm             0,0
1544         STDIAG          (16)
1545         ssm             0,0
1546         b,n         perf_rdr_shift_out_U_leave
1547         nop
1548         ssm             0,0
1549         nop
1550
1551         sync                            ; RDR 17 write sequence
1552         ssm             0,0
1553         STDIAG          (17)
1554         ssm             0,0
1555         b,n         perf_rdr_shift_out_U_leave
1556         nop
1557         ssm             0,0
1558         nop
1559
1560         sync                            ; RDR 18 write sequence
1561         ssm             0,0
1562         STDIAG          (18)
1563         ssm             0,0
1564         b,n         perf_rdr_shift_out_U_leave
1565         nop
1566         ssm             0,0
1567         nop
1568
1569         sync                            ; RDR 19 write sequence
1570         ssm             0,0
1571         STDIAG          (19)
1572         ssm             0,0
1573         b,n         perf_rdr_shift_out_U_leave
1574         nop
1575         ssm             0,0
1576         nop
1577
1578         sync                            ; RDR 20 write sequence
1579         ssm             0,0
1580         STDIAG          (20)
1581         ssm             0,0
1582         b,n         perf_rdr_shift_out_U_leave
1583         nop
1584         ssm             0,0
1585         nop
1586
1587         sync                            ; RDR 21 write sequence
1588         ssm             0,0
1589         STDIAG          (21)
1590         ssm             0,0
1591         b,n         perf_rdr_shift_out_U_leave
1592         nop
1593         ssm             0,0
1594         nop
1595
1596         sync                            ; RDR 22 write sequence
1597         ssm             0,0
1598         STDIAG          (22)
1599         ssm             0,0
1600         b,n         perf_rdr_shift_out_U_leave
1601         nop
1602         ssm             0,0
1603         nop
1604
1605         sync                            ; RDR 23 write sequence
1606         ssm             0,0
1607         STDIAG          (23)
1608         ssm             0,0
1609         b,n         perf_rdr_shift_out_U_leave
1610         nop
1611         ssm             0,0
1612         nop
1613
1614         sync                            ; RDR 24 write sequence
1615         ssm             0,0
1616         STDIAG          (24)
1617         ssm             0,0
1618         b,n         perf_rdr_shift_out_U_leave
1619         nop
1620         ssm             0,0
1621         nop
1622
1623         sync                            ; RDR 25 write sequence
1624         ssm             0,0
1625         STDIAG          (25)
1626         ssm             0,0
1627         b,n         perf_rdr_shift_out_U_leave
1628         nop
1629         ssm             0,0
1630         nop
1631
1632         sync                            ; RDR 26 write sequence
1633         ssm             0,0
1634         STDIAG          (26)
1635         ssm             0,0
1636         b,n         perf_rdr_shift_out_U_leave
1637         nop
1638         ssm             0,0
1639         nop
1640
1641         sync                            ; RDR 27 write sequence
1642         ssm             0,0
1643         STDIAG          (27)
1644         ssm             0,0
1645         b,n         perf_rdr_shift_out_U_leave
1646         nop
1647         ssm             0,0
1648         nop
1649
1650         sync                            ; RDR 28 write sequence
1651         ssm             0,0
1652         STDIAG          (28)
1653         ssm             0,0
1654         b,n         perf_rdr_shift_out_U_leave
1655         nop
1656         ssm             0,0
1657         nop
1658
1659         sync                            ; RDR 29 write sequence
1660         ssm             0,0
1661         STDIAG          (29)
1662         ssm             0,0
1663         b,n         perf_rdr_shift_out_U_leave
1664         nop
1665         ssm             0,0
1666         nop
1667
1668         sync                            ; RDR 30 write sequence
1669         ssm             0,0
1670         STDIAG          (30)
1671         ssm             0,0
1672         b,n         perf_rdr_shift_out_U_leave
1673         nop
1674         ssm             0,0
1675         nop
1676
1677         sync                            ; RDR 31 write sequence
1678         ssm             0,0
1679         STDIAG          (31)
1680         ssm             0,0
1681         b,n         perf_rdr_shift_out_U_leave
1682         nop
1683         ssm             0,0
1684         nop
1685
1686 perf_rdr_shift_out_U_leave:
1687         bve             (%r2)
1688         .exit
1689         MTDIAG_2        (23)                    ; restore DR2
1690         .procend
1691 ENDPROC(perf_rdr_shift_out_U)
1692