V4L/DVB (5842): ivtv: Add locking to ensure stream setup is atomic.
[linux-2.6] / sound / oss / nec_vrc5477.c
1 /***********************************************************************
2  * Copyright 2001 MontaVista Software Inc.
3  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4  *
5  * drivers/sound/nec_vrc5477.c
6  *     AC97 sound dirver for NEC Vrc5477 chip (an integrated, 
7  *     multi-function controller chip for MIPS CPUs)
8  *
9  * VRA support Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
10  *
11  * This program is free software; you can redistribute  it and/or modify it
12  * under  the terms of  the GNU General  Public License as published by the
13  * Free Software Foundation;  either version 2 of the  License, or (at your
14  * option) any later version.
15  ***********************************************************************
16  */
17
18 /*
19  * This code is derived from ite8172.c, which is written by Steve Longerbeam.
20  *
21  * Features:
22  *   Currently we only support the following capabilities:
23  *      . mono output to PCM L/R (line out).
24  *      . stereo output to PCM L/R (line out).
25  *      . mono input from PCM L (line in).
26  *      . stereo output from PCM (line in).
27  *      . sampling rate at 48k or variable sampling rate 
28  *      . support /dev/dsp, /dev/mixer devices, standard OSS devices.
29  *      . only support 16-bit PCM format (hardware limit, no software
30  *        translation) 
31  *      . support duplex, but no trigger or realtime.
32  *      
33  *   Specifically the following are not supported:
34  *      . app-set frag size.
35  *      . mmap'ed buffer access
36  */
37
38 /* 
39  * Original comments from ite8172.c file.
40  */
41
42 /*
43  *
44  * Notes:
45  *
46  *  1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
47  *     taken, slightly modified or not at all, from the ES1371 driver,
48  *     so refer to the credits in es1371.c for those. The rest of the
49  *     code (probe, open, read, write, the ISR, etc.) is new.
50  *  2. The following support is untested:
51  *      * Memory mapping the audio buffers, and the ioctl controls that go
52  *        with it.
53  *      * S/PDIF output.
54  *  3. The following is not supported:
55  *      * I2S input.
56  *      * legacy audio mode.
57  *  4. Support for volume button interrupts is implemented but doesn't
58  *     work yet.
59  *
60  *  Revision history
61  *    02.08.2001  0.1   Initial release
62  */
63
64 #include <linux/module.h>
65 #include <linux/string.h>
66 #include <linux/kernel.h>
67 #include <linux/ioport.h>
68 #include <linux/sched.h>
69 #include <linux/delay.h>
70 #include <linux/sound.h>
71 #include <linux/slab.h>
72 #include <linux/soundcard.h>
73 #include <linux/pci.h>
74 #include <linux/init.h>
75 #include <linux/poll.h>
76 #include <linux/bitops.h>
77 #include <linux/proc_fs.h>
78 #include <linux/spinlock.h>
79 #include <linux/smp_lock.h>
80 #include <linux/ac97_codec.h>
81 #include <linux/mutex.h>
82
83 #include <asm/io.h>
84 #include <asm/dma.h>
85 #include <asm/uaccess.h>
86
87 /* -------------------debug macros -------------------------------------- */
88 /* #undef VRC5477_AC97_DEBUG */
89 #define VRC5477_AC97_DEBUG
90
91 #undef VRC5477_AC97_VERBOSE_DEBUG
92 /* #define VRC5477_AC97_VERBOSE_DEBUG */
93
94 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
95 #define VRC5477_AC97_DEBUG
96 #endif
97
98 #if defined(VRC5477_AC97_DEBUG)
99 #define ASSERT(x)  if (!(x)) { \
100         panic("assertion failed at %s:%d: %s\n", __FILE__, __LINE__, #x); }
101 #else
102 #define ASSERT(x)
103 #endif /* VRC5477_AC97_DEBUG */
104
105 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
106 static u16 inTicket;            /* check sync between intr & write */
107 static u16 outTicket;
108 #endif
109
110 /* --------------------------------------------------------------------- */
111
112 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
113
114 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
115
116 #define         VRC5477_INT_CLR         0x0
117 #define         VRC5477_INT_STATUS      0x0
118 #define         VRC5477_CODEC_WR        0x4
119 #define         VRC5477_CODEC_RD        0x8
120 #define         VRC5477_CTRL            0x18
121 #define         VRC5477_ACLINK_CTRL     0x1c
122 #define         VRC5477_INT_MASK        0x24
123
124 #define         VRC5477_DAC1_CTRL       0x30
125 #define         VRC5477_DAC1L           0x34
126 #define         VRC5477_DAC1_BADDR      0x38
127 #define         VRC5477_DAC2_CTRL       0x3c
128 #define         VRC5477_DAC2L           0x40
129 #define         VRC5477_DAC2_BADDR      0x44
130 #define         VRC5477_DAC3_CTRL       0x48
131 #define         VRC5477_DAC3L           0x4c
132 #define         VRC5477_DAC3_BADDR      0x50
133
134 #define         VRC5477_ADC1_CTRL       0x54
135 #define         VRC5477_ADC1L           0x58
136 #define         VRC5477_ADC1_BADDR      0x5c
137 #define         VRC5477_ADC2_CTRL       0x60
138 #define         VRC5477_ADC2L           0x64
139 #define         VRC5477_ADC2_BADDR      0x68
140 #define         VRC5477_ADC3_CTRL       0x6c
141 #define         VRC5477_ADC3L           0x70
142 #define         VRC5477_ADC3_BADDR      0x74
143
144 #define         VRC5477_CODEC_WR_RWC    (1 << 23)
145
146 #define         VRC5477_CODEC_RD_RRDYA  (1 << 31)
147 #define         VRC5477_CODEC_RD_RRDYD  (1 << 30)
148
149 #define         VRC5477_ACLINK_CTRL_RST_ON      (1 << 15)
150 #define         VRC5477_ACLINK_CTRL_RST_TIME    0x7f
151 #define         VRC5477_ACLINK_CTRL_SYNC_ON     (1 << 30)
152 #define         VRC5477_ACLINK_CTRL_CK_STOP_ON  (1 << 31)
153
154 #define         VRC5477_CTRL_DAC2ENB            (1 << 15) 
155 #define         VRC5477_CTRL_ADC2ENB            (1 << 14) 
156 #define         VRC5477_CTRL_DAC1ENB            (1 << 13) 
157 #define         VRC5477_CTRL_ADC1ENB            (1 << 12) 
158
159 #define         VRC5477_INT_MASK_NMASK          (1 << 31) 
160 #define         VRC5477_INT_MASK_DAC1END        (1 << 5) 
161 #define         VRC5477_INT_MASK_DAC2END        (1 << 4) 
162 #define         VRC5477_INT_MASK_DAC3END        (1 << 3) 
163 #define         VRC5477_INT_MASK_ADC1END        (1 << 2) 
164 #define         VRC5477_INT_MASK_ADC2END        (1 << 1) 
165 #define         VRC5477_INT_MASK_ADC3END        (1 << 0) 
166
167 #define         VRC5477_DMA_ACTIVATION          (1 << 31)
168 #define         VRC5477_DMA_WIP                 (1 << 30)
169
170
171 #define VRC5477_AC97_MODULE_NAME "NEC_Vrc5477_audio"
172 #define PFX VRC5477_AC97_MODULE_NAME ": "
173
174 /* --------------------------------------------------------------------- */
175
176 struct vrc5477_ac97_state {
177         /* list of vrc5477_ac97 devices */
178         struct list_head devs;
179
180         /* the corresponding pci_dev structure */
181         struct pci_dev *dev;
182
183         /* soundcore stuff */
184         int dev_audio;
185
186         /* hardware resources */
187         unsigned long io;
188         unsigned int irq;
189
190 #ifdef VRC5477_AC97_DEBUG
191         /* debug /proc entry */
192         struct proc_dir_entry *ps;
193         struct proc_dir_entry *ac97_ps;
194 #endif /* VRC5477_AC97_DEBUG */
195
196         struct ac97_codec *codec;
197
198         unsigned dacChannels, adcChannels;
199         unsigned short dacRate, adcRate;
200         unsigned short extended_status;
201
202         spinlock_t lock;
203         struct mutex open_mutex;
204         mode_t open_mode;
205         wait_queue_head_t open_wait;
206
207         struct dmabuf {
208                 void *lbuf, *rbuf;
209                 dma_addr_t lbufDma, rbufDma;
210                 unsigned bufOrder;
211                 unsigned numFrag;
212                 unsigned fragShift;
213                 unsigned fragSize;      /* redundant */
214                 unsigned fragTotalSize; /* = numFrag * fragSize(real)  */
215                 unsigned nextIn;
216                 unsigned nextOut;
217                 int count;
218                 unsigned error; /* over/underrun */
219                 wait_queue_head_t wait;
220                 /* OSS stuff */
221                 unsigned stopped:1;
222                 unsigned ready:1;
223         } dma_dac, dma_adc;
224
225         #define WORK_BUF_SIZE   2048
226         struct {
227                 u16 lchannel;
228                 u16 rchannel;
229         } workBuf[WORK_BUF_SIZE/4];
230 };
231
232 /* --------------------------------------------------------------------- */
233
234 static LIST_HEAD(devs);
235
236 /* --------------------------------------------------------------------- */
237
238 static inline unsigned ld2(unsigned int x)
239 {
240     unsigned r = 0;
241         
242     if (x >= 0x10000) {
243         x >>= 16;
244         r += 16;
245     }
246     if (x >= 0x100) {
247         x >>= 8;
248         r += 8;
249     }
250     if (x >= 0x10) {
251         x >>= 4;
252         r += 4;
253     }
254     if (x >= 4) {
255         x >>= 2;
256         r += 2;
257     }
258     if (x >= 2)
259         r++;
260     return r;
261 }
262
263 /* --------------------------------------------------------------------- */
264
265 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
266 {
267         struct vrc5477_ac97_state *s = 
268                 (struct vrc5477_ac97_state *)codec->private_data;
269         unsigned long flags;
270         u32 result;
271
272         spin_lock_irqsave(&s->lock, flags);
273
274         /* wait until we can access codec registers */
275         while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
276
277         /* write the address and "read" command to codec */
278         addr = addr & 0x7f;
279         outl((addr << 16) | VRC5477_CODEC_WR_RWC, s->io + VRC5477_CODEC_WR);
280
281         /* get the return result */
282         udelay(100); /* workaround hardware bug */
283         while ( (result = inl(s->io + VRC5477_CODEC_RD)) & 
284                 (VRC5477_CODEC_RD_RRDYA | VRC5477_CODEC_RD_RRDYD) ) {
285                 /* we get either addr or data, or both */
286                 if (result & VRC5477_CODEC_RD_RRDYA) {
287                         ASSERT(addr == ((result >> 16) & 0x7f) );
288                 }
289                 if (result & VRC5477_CODEC_RD_RRDYD) {
290                         break;
291                 }
292         }
293
294         spin_unlock_irqrestore(&s->lock, flags);
295
296         return result & 0xffff;
297 }
298
299
300 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
301 {
302         struct vrc5477_ac97_state *s = 
303                 (struct vrc5477_ac97_state *)codec->private_data;
304         unsigned long flags;
305
306         spin_lock_irqsave(&s->lock, flags);
307
308         /* wait until we can access codec registers */
309         while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
310
311         /* write the address and value to codec */
312         outl((addr << 16) | data, s->io + VRC5477_CODEC_WR);
313
314         spin_unlock_irqrestore(&s->lock, flags);
315 }
316
317
318 static void waitcodec(struct ac97_codec *codec)
319 {
320         struct vrc5477_ac97_state *s = 
321                 (struct vrc5477_ac97_state *)codec->private_data;
322
323         /* wait until we can access codec registers */
324         while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
325 }
326
327 static int ac97_codec_not_present(struct ac97_codec *codec)
328 {
329         struct vrc5477_ac97_state *s = 
330                 (struct vrc5477_ac97_state *)codec->private_data;
331         unsigned long flags;
332         unsigned short count  = 0xffff; 
333
334         spin_lock_irqsave(&s->lock, flags);
335
336         /* wait until we can access codec registers */
337         do {
338                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
339                        break;
340         } while (--count);
341
342         if (count == 0) {
343                 spin_unlock_irqrestore(&s->lock, flags);
344                 return -1;
345         }
346
347         /* write 0 to reset */
348         outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
349
350         /* test whether we get a response from ac97 chip */
351         count  = 0xffff; 
352         do { 
353                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
354                        break;
355         } while (--count);
356
357         if (count == 0) {
358                 spin_unlock_irqrestore(&s->lock, flags);
359                 return -1;
360         }
361         spin_unlock_irqrestore(&s->lock, flags);
362         return 0;
363 }
364
365 /* --------------------------------------------------------------------- */
366
367 static void vrc5477_ac97_delay(int msec)
368 {
369         unsigned long tmo;
370         signed long tmo2;
371
372         if (in_interrupt())
373                 return;
374     
375         tmo = jiffies + (msec*HZ)/1000;
376         for (;;) {
377                 tmo2 = tmo - jiffies;
378                 if (tmo2 <= 0)
379                         break;
380                 schedule_timeout(tmo2);
381         }
382 }
383
384
385 static void set_adc_rate(struct vrc5477_ac97_state *s, unsigned rate)
386 {
387         wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, rate);
388         s->adcRate = rate;
389 }
390
391
392 static void set_dac_rate(struct vrc5477_ac97_state *s, unsigned rate)
393 {
394         if(s->extended_status & AC97_EXTSTAT_VRA) {
395         wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, rate);
396                 s->dacRate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
397         }
398 }
399
400 static int ac97_codec_not_present(struct ac97_codec *codec)
401 {
402         struct vrc5477_ac97_state *s =
403                 (struct vrc5477_ac97_state *)codec->private_data;
404         unsigned long flags;
405         unsigned short count  = 0xffff;
406
407         spin_lock_irqsave(&s->lock, flags);
408
409         /* wait until we can access codec registers */
410         do {
411                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
412                        break;
413         } while (--count);
414
415         if (count == 0) {
416                 spin_unlock_irqrestore(&s->lock, flags);
417                 return -1;
418         }
419
420         /* write 0 to reset */
421         outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
422
423         /* test whether we get a response from ac97 chip */
424         count  = 0xffff;
425         do {
426                if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
427                        break;
428         } while (--count);
429
430         if (count == 0) {
431                 spin_unlock_irqrestore(&s->lock, flags);
432                 return -1;
433         }
434         spin_unlock_irqrestore(&s->lock, flags);
435         return 0;
436 }
437
438 /* --------------------------------------------------------------------- */
439
440 static inline void
441 stop_dac(struct vrc5477_ac97_state *s)
442 {
443         struct dmabuf* db = &s->dma_dac;
444         unsigned long flags;
445         u32 temp;
446     
447         spin_lock_irqsave(&s->lock, flags);
448
449         if (db->stopped) {
450                 spin_unlock_irqrestore(&s->lock, flags);
451                 return;
452         }
453
454         /* deactivate the dma */
455         outl(0, s->io + VRC5477_DAC1_CTRL);
456         outl(0, s->io + VRC5477_DAC2_CTRL);
457
458         /* wait for DAM completely stop */
459         while (inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
460         while (inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
461
462         /* disable dac slots in aclink */
463         temp = inl(s->io + VRC5477_CTRL);
464         temp &= ~ (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
465         outl (temp, s->io + VRC5477_CTRL);
466
467         /* disable interrupts */
468         temp = inl(s->io + VRC5477_INT_MASK);
469         temp &= ~ (VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END); 
470         outl (temp, s->io + VRC5477_INT_MASK);
471
472         /* clear pending ones */
473         outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END, 
474              s->io +  VRC5477_INT_CLR);
475     
476         db->stopped = 1;
477     
478         spin_unlock_irqrestore(&s->lock, flags);
479 }       
480
481 static void start_dac(struct vrc5477_ac97_state *s)
482 {
483         struct dmabuf* db = &s->dma_dac;
484         unsigned long flags;
485         u32 dmaLength;
486         u32 temp;
487
488         spin_lock_irqsave(&s->lock, flags);
489
490         if (!db->stopped) {
491                 spin_unlock_irqrestore(&s->lock, flags);
492                 return;
493         }
494
495         /* we should have some data to do the DMA trasnfer */
496         ASSERT(db->count >= db->fragSize);
497
498         /* clear pending fales interrupts */
499         outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END, 
500              s->io +  VRC5477_INT_CLR);
501
502         /* enable interrupts */
503         temp = inl(s->io + VRC5477_INT_MASK);
504         temp |= VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
505         outl(temp, s->io +  VRC5477_INT_MASK);
506
507         /* setup dma base addr */
508         outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC1_BADDR);
509         if (s->dacChannels == 1) {
510                 outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
511         } else {
512                 outl(db->rbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
513         }
514
515         /* set dma length, in the unit of 0x10 bytes */
516         dmaLength = db->fragSize >> 4;
517         outl(dmaLength, s->io + VRC5477_DAC1L);
518         outl(dmaLength, s->io + VRC5477_DAC2L);
519
520         /* activate dma */
521         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC1_CTRL);
522         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC2_CTRL);
523
524         /* enable dac slots - we should hear the music now! */
525         temp = inl(s->io + VRC5477_CTRL);
526         temp |= (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
527         outl (temp, s->io + VRC5477_CTRL);
528
529         /* it is time to setup next dma transfer */
530         ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
531         ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
532
533         temp = db->nextOut + db->fragSize;
534         if (temp >= db->fragTotalSize) {
535                 ASSERT(temp == db->fragTotalSize);
536                 temp = 0;
537         }
538
539         outl(db->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
540         if (s->dacChannels == 1) {
541                 outl(db->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
542         } else {
543                 outl(db->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
544         }
545
546         db->stopped = 0;
547
548 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
549         outTicket = *(u16*)(db->lbuf+db->nextOut);
550         if (db->count > db->fragSize) {
551                 ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp));
552         }
553 #endif
554
555         spin_unlock_irqrestore(&s->lock, flags);
556 }       
557
558 static inline void stop_adc(struct vrc5477_ac97_state *s)
559 {
560         struct dmabuf* db = &s->dma_adc;
561         unsigned long flags;
562         u32 temp;
563     
564         spin_lock_irqsave(&s->lock, flags);
565
566         if (db->stopped) {
567                 spin_unlock_irqrestore(&s->lock, flags);
568                 return;
569         }
570
571         /* deactivate the dma */
572         outl(0, s->io + VRC5477_ADC1_CTRL);
573         outl(0, s->io + VRC5477_ADC2_CTRL);
574
575         /* disable adc slots in aclink */
576         temp = inl(s->io + VRC5477_CTRL);
577         temp &= ~ (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
578         outl (temp, s->io + VRC5477_CTRL);
579
580         /* disable interrupts */
581         temp = inl(s->io + VRC5477_INT_MASK);
582         temp &= ~ (VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END); 
583         outl (temp, s->io + VRC5477_INT_MASK);
584
585         /* clear pending ones */
586         outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END, 
587              s->io +  VRC5477_INT_CLR);
588     
589         db->stopped = 1;
590
591         spin_unlock_irqrestore(&s->lock, flags);
592 }       
593
594 static void start_adc(struct vrc5477_ac97_state *s)
595 {
596         struct dmabuf* db = &s->dma_adc;
597         unsigned long flags;
598         u32 dmaLength;
599         u32 temp;
600
601         spin_lock_irqsave(&s->lock, flags);
602
603         if (!db->stopped) {
604                 spin_unlock_irqrestore(&s->lock, flags);
605                 return;
606         }
607
608         /* we should at least have some free space in the buffer */
609         ASSERT(db->count < db->fragTotalSize - db->fragSize * 2);
610
611         /* clear pending ones */
612         outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END, 
613              s->io +  VRC5477_INT_CLR);
614
615         /* enable interrupts */
616         temp = inl(s->io + VRC5477_INT_MASK);
617         temp |= VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
618         outl(temp, s->io +  VRC5477_INT_MASK);
619
620         /* setup dma base addr */
621         outl(db->lbufDma + db->nextIn, s->io + VRC5477_ADC1_BADDR);
622         outl(db->rbufDma + db->nextIn, s->io + VRC5477_ADC2_BADDR);
623
624         /* setup dma length */
625         dmaLength = db->fragSize >> 4;
626         outl(dmaLength, s->io + VRC5477_ADC1L);
627         outl(dmaLength, s->io + VRC5477_ADC2L);
628
629         /* activate dma */
630         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC1_CTRL);
631         outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC2_CTRL);
632
633         /* enable adc slots */
634         temp = inl(s->io + VRC5477_CTRL);
635         temp |= (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
636         outl (temp, s->io + VRC5477_CTRL);
637
638         /* it is time to setup next dma transfer */
639         temp = db->nextIn + db->fragSize;
640         if (temp >= db->fragTotalSize) {
641                 ASSERT(temp == db->fragTotalSize);
642                 temp = 0;
643         }
644         outl(db->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
645         outl(db->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
646
647         db->stopped = 0;
648
649         spin_unlock_irqrestore(&s->lock, flags);
650 }       
651
652 /* --------------------------------------------------------------------- */
653
654 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
655 #define DMABUF_MINORDER 1
656
657 static inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
658                                   struct dmabuf *db)
659 {
660         if (db->lbuf) {
661                 ASSERT(db->rbuf);
662                 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
663                                     db->lbuf, db->lbufDma);
664                 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
665                                     db->rbuf, db->rbufDma);
666                 db->lbuf = db->rbuf = NULL;
667         }
668         db->nextIn = db->nextOut = 0;
669         db->ready = 0;
670 }
671
672 static int prog_dmabuf(struct vrc5477_ac97_state *s, 
673                        struct dmabuf *db,
674                        unsigned rate)
675 {
676         int order;
677         unsigned bufsize;
678
679         if (!db->lbuf) {
680                 ASSERT(!db->rbuf);
681
682                 db->ready = 0;
683                 for (order = DMABUF_DEFAULTORDER; 
684                      order >= DMABUF_MINORDER; 
685                      order--) {
686                         db->lbuf = pci_alloc_consistent(s->dev,
687                                                         PAGE_SIZE << order,
688                                                         &db->lbufDma);
689                         db->rbuf = pci_alloc_consistent(s->dev,
690                                                         PAGE_SIZE << order,
691                                                         &db->rbufDma);
692                         if (db->lbuf && db->rbuf) break;
693                         if (db->lbuf) {
694                             ASSERT(!db->rbuf);
695                             pci_free_consistent(s->dev, 
696                                                 PAGE_SIZE << order,
697                                                 db->lbuf,
698                                                 db->lbufDma);
699                         }
700                 }
701                 if (!db->lbuf) {
702                         ASSERT(!db->rbuf);
703                         return -ENOMEM;
704                 }
705
706                 db->bufOrder = order;
707         }
708
709         db->count = 0;
710         db->nextIn = db->nextOut = 0;
711     
712         bufsize = PAGE_SIZE << db->bufOrder;
713         db->fragShift = ld2(rate * 2 / 100);
714         if (db->fragShift < 4) db->fragShift = 4;
715
716         db->numFrag = bufsize >> db->fragShift;
717         while (db->numFrag < 4 && db->fragShift > 4) {
718                 db->fragShift--;
719                 db->numFrag = bufsize >> db->fragShift;
720         }
721         db->fragSize = 1 << db->fragShift;
722         db->fragTotalSize = db->numFrag << db->fragShift;
723         memset(db->lbuf, 0, db->fragTotalSize);
724         memset(db->rbuf, 0, db->fragTotalSize);
725     
726         db->ready = 1;
727
728         return 0;
729 }
730
731 static inline int prog_dmabuf_adc(struct vrc5477_ac97_state *s)
732 {
733     stop_adc(s);
734     return prog_dmabuf(s, &s->dma_adc, s->adcRate);
735 }
736
737 static inline int prog_dmabuf_dac(struct vrc5477_ac97_state *s)
738 {
739     stop_dac(s);
740     return prog_dmabuf(s, &s->dma_dac, s->dacRate);
741 }
742
743
744 /* --------------------------------------------------------------------- */
745 /* hold spinlock for the following! */
746
747 static inline void vrc5477_ac97_adc_interrupt(struct vrc5477_ac97_state *s)
748 {
749         struct dmabuf* adc = &s->dma_adc;
750         unsigned temp;
751
752         /* we need two frags avaiable because one is already being used
753          * and the other will be used when next interrupt happens.
754          */
755         if (adc->count >= adc->fragTotalSize - adc->fragSize) {
756                 stop_adc(s);
757                 adc->error++;
758                 printk(KERN_INFO PFX "adc overrun\n");
759                 return;
760         }
761
762         /* set the base addr for next DMA transfer */
763         temp = adc->nextIn + 2*adc->fragSize;
764         if (temp >= adc->fragTotalSize) {
765                 ASSERT( (temp == adc->fragTotalSize) ||
766                              (temp == adc->fragTotalSize + adc->fragSize) );
767                 temp -= adc->fragTotalSize;
768         }
769         outl(adc->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
770         outl(adc->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
771
772         /* adjust nextIn */
773         adc->nextIn += adc->fragSize;
774         if (adc->nextIn >= adc->fragTotalSize) {
775                 ASSERT(adc->nextIn == adc->fragTotalSize);
776                 adc->nextIn = 0;
777         }
778
779         /* adjust count */
780         adc->count += adc->fragSize;
781
782         /* wake up anybody listening */
783         if (waitqueue_active(&adc->wait)) {
784                 wake_up_interruptible(&adc->wait);
785         }       
786 }
787
788 static inline void vrc5477_ac97_dac_interrupt(struct vrc5477_ac97_state *s)
789 {
790         struct dmabuf* dac = &s->dma_dac;
791         unsigned temp;
792
793         /* next DMA transfer should already started */
794         // ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
795         // ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
796
797         /* let us set for next next DMA transfer */
798         temp = dac->nextOut + dac->fragSize*2;
799         if (temp >= dac->fragTotalSize) {
800                 ASSERT( (temp == dac->fragTotalSize) || 
801                              (temp == dac->fragTotalSize + dac->fragSize) );
802                 temp -= dac->fragTotalSize;
803         }
804         outl(dac->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
805         if (s->dacChannels == 1) {
806                 outl(dac->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
807         } else {
808                 outl(dac->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
809         }
810
811 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
812         if (*(u16*)(dac->lbuf +  dac->nextOut) != outTicket) {
813                 printk("assert fail: - %d vs %d\n", 
814                         *(u16*)(dac->lbuf +  dac->nextOut),
815                         outTicket);
816                 ASSERT(1 == 0);
817         }
818 #endif
819
820         /* adjust nextOut pointer */
821         dac->nextOut += dac->fragSize;
822         if (dac->nextOut >= dac->fragTotalSize) {
823                 ASSERT(dac->nextOut == dac->fragTotalSize);
824                 dac->nextOut = 0;
825         }
826
827         /* adjust count */
828         dac->count -= dac->fragSize;
829         if (dac->count <=0 ) {
830                 /* buffer under run */
831                 dac->count = 0;
832                 dac->nextIn = dac->nextOut;
833                 stop_dac(s);
834         }
835
836 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
837         if (dac->count) {
838                 outTicket ++;
839                 ASSERT(*(u16*)(dac->lbuf +  dac->nextOut) == outTicket);
840         }
841 #endif
842         
843         /* we cannot have both under run and someone is waiting on us */
844         ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) );
845
846         /* wake up anybody listening */
847         if (waitqueue_active(&dac->wait))
848                 wake_up_interruptible(&dac->wait);
849 }
850
851 static irqreturn_t vrc5477_ac97_interrupt(int irq, void *dev_id)
852 {
853         struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)dev_id;
854         u32 irqStatus;
855         u32 adcInterrupts, dacInterrupts;
856
857         spin_lock(&s->lock);
858
859         /* get irqStatus and clear the detected ones */
860         irqStatus = inl(s->io + VRC5477_INT_STATUS);
861         outl(irqStatus, s->io + VRC5477_INT_CLR);
862
863         /* let us see what we get */
864         dacInterrupts = VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
865         adcInterrupts = VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
866         if (irqStatus & dacInterrupts) {
867                 /* we should get both interrupts, but just in case ...  */
868                 if (irqStatus & VRC5477_INT_MASK_DAC1END) {
869                         vrc5477_ac97_dac_interrupt(s);
870                 }
871                 if ( (irqStatus & dacInterrupts) != dacInterrupts ) {
872                         printk(KERN_WARNING "vrc5477_ac97 : dac interrupts not in sync!!!\n");
873                         stop_dac(s);
874                         start_dac(s);
875                 }
876         } else if (irqStatus & adcInterrupts) {
877                 /* we should get both interrupts, but just in case ...  */
878                 if(irqStatus & VRC5477_INT_MASK_ADC1END) {
879                         vrc5477_ac97_adc_interrupt(s);
880                 } 
881                 if ( (irqStatus & adcInterrupts) != adcInterrupts ) {
882                         printk(KERN_WARNING "vrc5477_ac97 : adc interrupts not in sync!!!\n");
883                         stop_adc(s);
884                         start_adc(s);
885                 }
886         }
887
888         spin_unlock(&s->lock);
889         return IRQ_HANDLED;
890 }
891
892 /* --------------------------------------------------------------------- */
893
894 static int vrc5477_ac97_open_mixdev(struct inode *inode, struct file *file)
895 {
896         int minor = iminor(inode);
897         struct list_head *list;
898         struct vrc5477_ac97_state *s;
899
900         for (list = devs.next; ; list = list->next) {
901                 if (list == &devs)
902                         return -ENODEV;
903                 s = list_entry(list, struct vrc5477_ac97_state, devs);
904                 if (s->codec->dev_mixer == minor)
905                         break;
906         }
907         file->private_data = s;
908         return nonseekable_open(inode, file);
909 }
910
911 static int vrc5477_ac97_release_mixdev(struct inode *inode, struct file *file)
912 {
913         return 0;
914 }
915
916
917 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
918                         unsigned long arg)
919 {
920         return codec->mixer_ioctl(codec, cmd, arg);
921 }
922
923 static int vrc5477_ac97_ioctl_mixdev(struct inode *inode, struct file *file,
924                                      unsigned int cmd, unsigned long arg)
925 {
926     struct vrc5477_ac97_state *s = 
927             (struct vrc5477_ac97_state *)file->private_data;
928     struct ac97_codec *codec = s->codec;
929
930     return mixdev_ioctl(codec, cmd, arg);
931 }
932
933 static /*const*/ struct file_operations vrc5477_ac97_mixer_fops = {
934         .owner          = THIS_MODULE,
935         .llseek         = no_llseek,
936         .ioctl          = vrc5477_ac97_ioctl_mixdev,
937         .open           = vrc5477_ac97_open_mixdev,
938         .release        = vrc5477_ac97_release_mixdev,
939 };
940
941 /* --------------------------------------------------------------------- */
942
943 static int drain_dac(struct vrc5477_ac97_state *s, int nonblock)
944 {
945         unsigned long flags;
946         int count, tmo;
947         
948         if (!s->dma_dac.ready)
949                 return 0;
950
951         for (;;) {
952                 spin_lock_irqsave(&s->lock, flags);
953                 count = s->dma_dac.count;
954                 spin_unlock_irqrestore(&s->lock, flags);
955                 if (count <= 0)
956                         break;
957                 if (signal_pending(current))
958                         break;
959                 if (nonblock)
960                         return -EBUSY;
961                 tmo = 1000 * count / s->dacRate / 2;
962                 vrc5477_ac97_delay(tmo);
963         }
964         if (signal_pending(current))
965                 return -ERESTARTSYS;
966         return 0;
967 }
968
969 /* --------------------------------------------------------------------- */
970
971 static inline int
972 copy_two_channel_adc_to_user(struct vrc5477_ac97_state *s, 
973                              char *buffer, 
974                              int copyCount)
975 {
976         struct dmabuf *db = &s->dma_adc;
977         int bufStart = db->nextOut;
978         for (; copyCount > 0; ) {
979                 int i;
980                 int count = copyCount;
981                 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
982                 for (i=0; i< count/2; i++) {
983                         s->workBuf[i].lchannel = 
984                                 *(u16*)(db->lbuf + bufStart + i*2);
985                         s->workBuf[i].rchannel = 
986                                 *(u16*)(db->rbuf + bufStart + i*2);
987                 }
988                 if (copy_to_user(buffer, s->workBuf, count*2)) {
989                         return -1;
990                 }
991
992                 copyCount -= count;
993                 bufStart += count;
994                 ASSERT(bufStart <= db->fragTotalSize);
995                 buffer += count *2;
996         }
997         return 0;
998 }
999
1000 /* return the total bytes that is copied */
1001 static inline int
1002 copy_adc_to_user(struct vrc5477_ac97_state *s,
1003                  char * buffer,
1004                  size_t count,
1005                  int avail)
1006 {
1007         struct dmabuf *db = &s->dma_adc;
1008         int copyCount=0;
1009         int copyFragCount=0;
1010         int totalCopyCount = 0;
1011         int totalCopyFragCount = 0;
1012         unsigned long flags;
1013
1014         /* adjust count to signel channel byte count */
1015         count >>= s->adcChannels - 1;
1016
1017         /* we may have to "copy" twice as ring buffer wraps around */
1018         for (; (avail > 0) && (count > 0); ) {
1019                 /* determine max possible copy count for single channel */
1020                 copyCount = count;
1021                 if (copyCount > avail) {
1022                         copyCount = avail;
1023                 }
1024                 if (copyCount + db->nextOut > db->fragTotalSize) {
1025                         copyCount = db->fragTotalSize - db->nextOut;
1026                         ASSERT((copyCount % db->fragSize) == 0);
1027                 }
1028
1029                 copyFragCount = (copyCount-1) >> db->fragShift;
1030                 copyFragCount = (copyFragCount+1) << db->fragShift;
1031                 ASSERT(copyFragCount >= copyCount);
1032
1033                 /* we copy differently based on adc channels */
1034                 if (s->adcChannels == 1) {
1035                         if (copy_to_user(buffer, 
1036                                          db->lbuf + db->nextOut, 
1037                                          copyCount)) 
1038                                 return -1;
1039                 } else {
1040                         /* *sigh* we have to mix two streams into one  */
1041                         if (copy_two_channel_adc_to_user(s, buffer, copyCount))
1042                                 return -1;
1043                 }       
1044
1045                 count -= copyCount;
1046                 totalCopyCount += copyCount;
1047                 avail -= copyFragCount;
1048                 totalCopyFragCount += copyFragCount;
1049
1050                 buffer += copyCount << (s->adcChannels-1);
1051
1052                 db->nextOut += copyFragCount;
1053                 if (db->nextOut >= db->fragTotalSize) {
1054                         ASSERT(db->nextOut == db->fragTotalSize);
1055                         db->nextOut = 0;
1056                 }
1057
1058                 ASSERT((copyFragCount % db->fragSize) == 0);
1059                 ASSERT( (count == 0) || (copyCount == copyFragCount));
1060         }
1061
1062         spin_lock_irqsave(&s->lock, flags);
1063         db->count -= totalCopyFragCount;
1064         spin_unlock_irqrestore(&s->lock, flags);
1065
1066         return totalCopyCount << (s->adcChannels-1);
1067 }
1068
1069 static ssize_t 
1070 vrc5477_ac97_read(struct file *file, 
1071                   char *buffer,
1072                   size_t count, 
1073                   loff_t *ppos)
1074 {
1075         struct vrc5477_ac97_state *s = 
1076                 (struct vrc5477_ac97_state *)file->private_data;
1077         struct dmabuf *db = &s->dma_adc;
1078         ssize_t ret = 0;
1079         unsigned long flags;
1080         int copyCount;
1081         size_t avail;
1082
1083         if (!access_ok(VERIFY_WRITE, buffer, count))
1084                 return -EFAULT;
1085
1086         ASSERT(db->ready);
1087
1088         while (count > 0) {
1089                 // wait for samples in capture buffer
1090                 do {
1091                         spin_lock_irqsave(&s->lock, flags);
1092                         if (db->stopped)
1093                                 start_adc(s);
1094                         avail = db->count;
1095                         spin_unlock_irqrestore(&s->lock, flags);
1096                         if (avail <= 0) {
1097                                 if (file->f_flags & O_NONBLOCK) {
1098                                         if (!ret)
1099                                                 ret = -EAGAIN;
1100                                         return ret;
1101                                 }
1102                                 interruptible_sleep_on(&db->wait);
1103                                 if (signal_pending(current)) {
1104                                         if (!ret)
1105                                                 ret = -ERESTARTSYS;
1106                                         return ret;
1107                                 }
1108                         }
1109                 } while (avail <= 0);
1110
1111                 ASSERT( (avail % db->fragSize) == 0);
1112                 copyCount = copy_adc_to_user(s, buffer, count, avail);
1113                 if (copyCount <=0 ) {
1114                         if (!ret) ret = -EFAULT;
1115                         return ret;
1116                 }
1117
1118                 count -= copyCount;
1119                 buffer += copyCount;
1120                 ret += copyCount;
1121         } // while (count > 0)
1122
1123         return ret;
1124 }
1125
1126 static inline int
1127 copy_two_channel_dac_from_user(struct vrc5477_ac97_state *s, 
1128                                const char *buffer, 
1129                                int copyCount)
1130 {
1131         struct dmabuf *db = &s->dma_dac;
1132         int bufStart = db->nextIn;
1133
1134         ASSERT(db->ready);
1135
1136         for (; copyCount > 0; ) {
1137                 int i;
1138                 int count = copyCount;
1139                 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
1140                 if (copy_from_user(s->workBuf, buffer, count*2)) {
1141                         return -1;
1142                 }
1143                 for (i=0; i< count/2; i++) {
1144                         *(u16*)(db->lbuf + bufStart + i*2) = 
1145                                 s->workBuf[i].lchannel;
1146                         *(u16*)(db->rbuf + bufStart + i*2) = 
1147                                 s->workBuf[i].rchannel;
1148                 }
1149
1150                 copyCount -= count;
1151                 bufStart += count;
1152                 ASSERT(bufStart <= db->fragTotalSize);
1153                 buffer += count *2;
1154         }
1155         return 0;
1156
1157 }
1158
1159 /* return the total bytes that is copied */
1160 static inline int
1161 copy_dac_from_user(struct vrc5477_ac97_state *s, 
1162                    const char *buffer, 
1163                    size_t count, 
1164                    int avail)
1165 {       
1166         struct dmabuf *db = &s->dma_dac;
1167         int copyCount=0;
1168         int copyFragCount=0;
1169         int totalCopyCount = 0;
1170         int totalCopyFragCount = 0;
1171         unsigned long flags;
1172 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1173         int i;
1174 #endif
1175
1176         /* adjust count to signel channel byte count */
1177         count >>= s->dacChannels - 1;
1178
1179         /* we may have to "copy" twice as ring buffer wraps around */
1180         for (; (avail > 0) && (count > 0); ) {
1181                 /* determine max possible copy count for single channel */
1182                 copyCount = count;
1183                 if (copyCount > avail) {
1184                         copyCount = avail;
1185                 }
1186                 if (copyCount + db->nextIn > db->fragTotalSize) {
1187                         copyCount = db->fragTotalSize - db->nextIn;
1188                         ASSERT(copyCount > 0);
1189                 }
1190
1191                 copyFragCount = copyCount;
1192                 ASSERT(copyFragCount >= copyCount);
1193
1194                 /* we copy differently based on the number channels */
1195                 if (s->dacChannels == 1) {
1196                         if (copy_from_user(db->lbuf + db->nextIn,
1197                                            buffer,
1198                                            copyCount)) 
1199                                 return -1;
1200                         /* fill gaps with 0 */
1201                         memset(db->lbuf + db->nextIn + copyCount,
1202                                0,
1203                                copyFragCount - copyCount);
1204                 } else {
1205                         /* we have demux the stream into two separate ones */
1206                         if (copy_two_channel_dac_from_user(s, buffer, copyCount))
1207                                 return -1;
1208                         /* fill gaps with 0 */
1209                         memset(db->lbuf + db->nextIn + copyCount,
1210                                0,
1211                                copyFragCount - copyCount);
1212                         memset(db->rbuf + db->nextIn + copyCount,
1213                                0,
1214                                copyFragCount - copyCount);
1215                 }
1216
1217 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1218                 for (i=0; i< copyFragCount; i+= db->fragSize) {
1219                         *(u16*)(db->lbuf + db->nextIn + i) = inTicket ++;
1220                 }
1221 #endif
1222
1223                 count -= copyCount;
1224                 totalCopyCount += copyCount;
1225                 avail -= copyFragCount;
1226                 totalCopyFragCount += copyFragCount;
1227
1228                 buffer += copyCount << (s->dacChannels - 1);
1229
1230                 db->nextIn += copyFragCount;
1231                 if (db->nextIn >= db->fragTotalSize) {
1232                         ASSERT(db->nextIn == db->fragTotalSize);
1233                         db->nextIn = 0;
1234                 }
1235
1236                 ASSERT( (count == 0) || (copyCount == copyFragCount));
1237         }
1238
1239         spin_lock_irqsave(&s->lock, flags);
1240         db->count += totalCopyFragCount;
1241         if (db->stopped) {
1242                 start_dac(s);
1243         }
1244
1245         /* nextIn should not be equal to nextOut unless we are full */
1246         ASSERT( ( (db->count == db->fragTotalSize) && 
1247                        (db->nextIn == db->nextOut) ) ||
1248                      ( (db->count < db->fragTotalSize) &&
1249                        (db->nextIn != db->nextOut) ) );
1250
1251         spin_unlock_irqrestore(&s->lock, flags);
1252
1253         return totalCopyCount << (s->dacChannels-1);
1254
1255 }
1256
1257 static ssize_t vrc5477_ac97_write(struct file *file, const char *buffer,
1258                                   size_t count, loff_t *ppos)
1259 {
1260         struct vrc5477_ac97_state *s = 
1261                 (struct vrc5477_ac97_state *)file->private_data;
1262         struct dmabuf *db = &s->dma_dac;
1263         ssize_t ret;
1264         unsigned long flags;
1265         int copyCount, avail;
1266
1267         if (!access_ok(VERIFY_READ, buffer, count))
1268                 return -EFAULT;
1269         ret = 0;
1270     
1271         while (count > 0) {
1272                 // wait for space in playback buffer
1273                 do {
1274                         spin_lock_irqsave(&s->lock, flags);
1275                         avail = db->fragTotalSize - db->count;
1276                         spin_unlock_irqrestore(&s->lock, flags);
1277                         if (avail <= 0) {
1278                                 if (file->f_flags & O_NONBLOCK) {
1279                                         if (!ret)
1280                                                 ret = -EAGAIN;
1281                                         return ret;
1282                                 }
1283                                 interruptible_sleep_on(&db->wait);
1284                                 if (signal_pending(current)) {
1285                                         if (!ret)
1286                                                 ret = -ERESTARTSYS;
1287                                         return ret;
1288                                 }
1289                         }
1290                 } while (avail <= 0);
1291         
1292                 copyCount = copy_dac_from_user(s, buffer, count, avail);
1293                 if (copyCount < 0) {
1294                         if (!ret) ret = -EFAULT;
1295                         return ret;
1296                 }
1297
1298                 count -= copyCount;
1299                 buffer += copyCount;
1300                 ret += copyCount;
1301         } // while (count > 0)
1302         
1303         return ret;
1304 }
1305
1306 /* No kernel lock - we have our own spinlock */
1307 static unsigned int vrc5477_ac97_poll(struct file *file,
1308                                       struct poll_table_struct *wait)
1309 {
1310         struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1311         unsigned long flags;
1312         unsigned int mask = 0;
1313
1314         if (file->f_mode & FMODE_WRITE)
1315                 poll_wait(file, &s->dma_dac.wait, wait);
1316         if (file->f_mode & FMODE_READ)
1317                 poll_wait(file, &s->dma_adc.wait, wait);
1318         spin_lock_irqsave(&s->lock, flags);
1319         if (file->f_mode & FMODE_READ) {
1320                 if (s->dma_adc.count >= (signed)s->dma_adc.fragSize)
1321                         mask |= POLLIN | POLLRDNORM;
1322         }
1323         if (file->f_mode & FMODE_WRITE) {
1324                 if ((signed)s->dma_dac.fragTotalSize >=
1325                     s->dma_dac.count + (signed)s->dma_dac.fragSize)
1326                         mask |= POLLOUT | POLLWRNORM;
1327         }
1328         spin_unlock_irqrestore(&s->lock, flags);
1329         return mask;
1330 }
1331
1332 #ifdef VRC5477_AC97_DEBUG
1333 static struct ioctl_str_t {
1334     unsigned int cmd;
1335     const char* str;
1336 } ioctl_str[] = {
1337     {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1338     {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1339     {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1340     {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1341     {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1342     {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1343     {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1344     {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1345     {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1346     {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1347     {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1348     {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1349     {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1350     {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1351     {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1352     {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1353     {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1354     {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1355     {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1356     {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1357     {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1358     {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1359     {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1360     {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1361     {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1362     {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1363     {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1364     {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1365     {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1366     {OSS_GETVERSION, "OSS_GETVERSION"},
1367     {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1368     {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1369     {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1370     {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1371 };
1372 #endif    
1373
1374 static int vrc5477_ac97_ioctl(struct inode *inode, struct file *file,
1375                         unsigned int cmd, unsigned long arg)
1376 {
1377         struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1378         unsigned long flags;
1379         audio_buf_info abinfo;
1380         int count;
1381         int val, ret;
1382
1383 #ifdef VRC5477_AC97_DEBUG
1384         for (count = 0; count < ARRAY_SIZE(ioctl_str); count++) {
1385                 if (ioctl_str[count].cmd == cmd)
1386                         break;
1387         }
1388         if (count < ARRAY_SIZE(ioctl_str))
1389                 printk(KERN_INFO PFX "ioctl %s\n", ioctl_str[count].str);
1390         else
1391                 printk(KERN_INFO PFX "ioctl unknown, 0x%x\n", cmd);
1392 #endif
1393     
1394         switch (cmd) {
1395         case OSS_GETVERSION:
1396                 return put_user(SOUND_VERSION, (int *)arg);
1397
1398         case SNDCTL_DSP_SYNC:
1399                 if (file->f_mode & FMODE_WRITE)
1400                         return drain_dac(s, file->f_flags & O_NONBLOCK);
1401                 return 0;
1402                 
1403         case SNDCTL_DSP_SETDUPLEX:
1404                 return 0;
1405
1406         case SNDCTL_DSP_GETCAPS:
1407                 return put_user(DSP_CAP_DUPLEX, (int *)arg);
1408                 
1409         case SNDCTL_DSP_RESET:
1410                 if (file->f_mode & FMODE_WRITE) {
1411                         stop_dac(s);
1412                         synchronize_irq(s->irq);
1413                         s->dma_dac.count = 0;
1414                         s->dma_dac.nextIn = s->dma_dac.nextOut = 0;
1415                 }
1416                 if (file->f_mode & FMODE_READ) {
1417                         stop_adc(s);
1418                         synchronize_irq(s->irq);
1419                         s->dma_adc.count = 0;
1420                         s->dma_adc.nextIn = s->dma_adc.nextOut = 0;
1421                 }
1422                 return 0;
1423
1424         case SNDCTL_DSP_SPEED:
1425                 if (get_user(val, (int *)arg))
1426                         return -EFAULT;
1427                 if (val >= 0) {
1428                         if (file->f_mode & FMODE_READ) {
1429                                 stop_adc(s);
1430                                 set_adc_rate(s, val);
1431                                 if ((ret = prog_dmabuf_adc(s)))
1432                                         return ret;
1433                         }
1434                         if (file->f_mode & FMODE_WRITE) {
1435                                 stop_dac(s);
1436                                 set_dac_rate(s, val);
1437                                 if ((ret = prog_dmabuf_dac(s)))
1438                                         return ret;
1439                         }
1440                 }
1441                 return put_user((file->f_mode & FMODE_READ) ?
1442                                 s->adcRate : s->dacRate, (int *)arg);
1443
1444         case SNDCTL_DSP_STEREO:
1445                 if (get_user(val, (int *)arg))
1446                         return -EFAULT;
1447                 if (file->f_mode & FMODE_READ) {
1448                         stop_adc(s);
1449                         if (val)
1450                                 s->adcChannels = 2;
1451                         else
1452                                 s->adcChannels = 1;
1453                         if ((ret = prog_dmabuf_adc(s)))
1454                                 return ret;
1455                 }
1456                 if (file->f_mode & FMODE_WRITE) {
1457                         stop_dac(s);
1458                         if (val)
1459                                 s->dacChannels = 2;
1460                         else
1461                                 s->dacChannels = 1;
1462                         if ((ret = prog_dmabuf_dac(s)))
1463                                 return ret;
1464                 }
1465                 return 0;
1466
1467         case SNDCTL_DSP_CHANNELS:
1468                 if (get_user(val, (int *)arg))
1469                         return -EFAULT;
1470                 if (val != 0) {
1471                         if ( (val != 1) && (val != 2)) val = 2;
1472
1473                         if (file->f_mode & FMODE_READ) {
1474                                 stop_adc(s);
1475                                 s->dacChannels = val;
1476                                 if ((ret = prog_dmabuf_adc(s)))
1477                                         return ret;
1478                         }
1479                         if (file->f_mode & FMODE_WRITE) {
1480                                 stop_dac(s);
1481                                 s->dacChannels = val;
1482                                 if ((ret = prog_dmabuf_dac(s)))
1483                                         return ret;
1484                         }
1485                 }
1486                 return put_user(val, (int *)arg);
1487                 
1488         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1489                 return put_user(AFMT_S16_LE, (int *)arg);
1490                 
1491         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1492                 if (get_user(val, (int *)arg))
1493                         return -EFAULT;
1494                 if (val != AFMT_QUERY) {
1495                         if (val != AFMT_S16_LE) return -EINVAL;
1496                         if (file->f_mode & FMODE_READ) {
1497                                 stop_adc(s);
1498                                 if ((ret = prog_dmabuf_adc(s)))
1499                                         return ret;
1500                         }
1501                         if (file->f_mode & FMODE_WRITE) {
1502                                 stop_dac(s);
1503                                 if ((ret = prog_dmabuf_dac(s)))
1504                                         return ret;
1505                         }
1506                 } else {
1507                         val = AFMT_S16_LE;
1508                 }
1509                 return put_user(val, (int *)arg);
1510                 
1511         case SNDCTL_DSP_POST:
1512                 return 0;
1513
1514         case SNDCTL_DSP_GETTRIGGER:
1515         case SNDCTL_DSP_SETTRIGGER:
1516                 /* NO trigger */
1517                 return -EINVAL;
1518
1519         case SNDCTL_DSP_GETOSPACE:
1520                 if (!(file->f_mode & FMODE_WRITE))
1521                         return -EINVAL;
1522                 abinfo.fragsize = s->dma_dac.fragSize << (s->dacChannels-1);
1523                 spin_lock_irqsave(&s->lock, flags);
1524                 count = s->dma_dac.count;
1525                 spin_unlock_irqrestore(&s->lock, flags);
1526                 abinfo.bytes = (s->dma_dac.fragTotalSize - count) << 
1527                         (s->dacChannels-1);
1528                 abinfo.fragstotal = s->dma_dac.numFrag;
1529                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragShift >> 
1530                         (s->dacChannels-1);      
1531                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1532
1533         case SNDCTL_DSP_GETISPACE:
1534                 if (!(file->f_mode & FMODE_READ))
1535                         return -EINVAL;
1536                 abinfo.fragsize = s->dma_adc.fragSize << (s->adcChannels-1);
1537                 spin_lock_irqsave(&s->lock, flags);
1538                 count = s->dma_adc.count;
1539                 spin_unlock_irqrestore(&s->lock, flags);
1540                 if (count < 0)
1541                         count = 0;
1542                 abinfo.bytes = count << (s->adcChannels-1);
1543                 abinfo.fragstotal = s->dma_adc.numFrag;
1544                 abinfo.fragments = (abinfo.bytes >> s->dma_adc.fragShift) >>
1545                         (s->adcChannels-1);      
1546                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1547                 
1548         case SNDCTL_DSP_NONBLOCK:
1549                 file->f_flags |= O_NONBLOCK;
1550                 return 0;
1551
1552         case SNDCTL_DSP_GETODELAY:
1553                 if (!(file->f_mode & FMODE_WRITE))
1554                         return -EINVAL;
1555                 spin_lock_irqsave(&s->lock, flags);
1556                 count = s->dma_dac.count;
1557                 spin_unlock_irqrestore(&s->lock, flags);
1558                 return put_user(count, (int *)arg);
1559
1560         case SNDCTL_DSP_GETIPTR:
1561         case SNDCTL_DSP_GETOPTR:
1562                 /* we cannot get DMA ptr */
1563                 return -EINVAL;
1564
1565         case SNDCTL_DSP_GETBLKSIZE:
1566                 if (file->f_mode & FMODE_WRITE)
1567                         return put_user(s->dma_dac.fragSize << (s->dacChannels-1), (int *)arg);
1568                 else
1569                         return put_user(s->dma_adc.fragSize << (s->adcChannels-1), (int *)arg);
1570
1571         case SNDCTL_DSP_SETFRAGMENT:
1572                 /* we ignore fragment size request */
1573                 return 0;
1574
1575         case SNDCTL_DSP_SUBDIVIDE:
1576                 /* what is this for? [jsun] */
1577                 return 0;
1578
1579         case SOUND_PCM_READ_RATE:
1580                 return put_user((file->f_mode & FMODE_READ) ?
1581                                 s->adcRate : s->dacRate, (int *)arg);
1582
1583         case SOUND_PCM_READ_CHANNELS:
1584                 if (file->f_mode & FMODE_READ)
1585                         return put_user(s->adcChannels, (int *)arg);
1586                 else
1587                         return put_user(s->dacChannels ? 2 : 1, (int *)arg);
1588             
1589         case SOUND_PCM_READ_BITS:
1590                 return put_user(16, (int *)arg);
1591
1592         case SOUND_PCM_WRITE_FILTER:
1593         case SNDCTL_DSP_SETSYNCRO:
1594         case SOUND_PCM_READ_FILTER:
1595                 return -EINVAL;
1596         }
1597
1598         return mixdev_ioctl(s->codec, cmd, arg);
1599 }
1600
1601
1602 static int vrc5477_ac97_open(struct inode *inode, struct file *file)
1603 {
1604         int minor = iminor(inode);
1605         DECLARE_WAITQUEUE(wait, current);
1606         unsigned long flags;
1607         struct list_head *list;
1608         struct vrc5477_ac97_state *s;
1609         int ret=0;
1610
1611         nonseekable_open(inode, file);    
1612         for (list = devs.next; ; list = list->next) {
1613                 if (list == &devs)
1614                         return -ENODEV;
1615                 s = list_entry(list, struct vrc5477_ac97_state, devs);
1616                 if (!((s->dev_audio ^ minor) & ~0xf))
1617                         break;
1618         }
1619         file->private_data = s;
1620
1621         /* wait for device to become free */
1622         mutex_lock(&s->open_mutex);
1623         while (s->open_mode & file->f_mode) {
1624
1625                 if (file->f_flags & O_NONBLOCK) {
1626                         mutex_unlock(&s->open_mutex);
1627                         return -EBUSY;
1628                 }
1629                 add_wait_queue(&s->open_wait, &wait);
1630                 __set_current_state(TASK_INTERRUPTIBLE);
1631                 mutex_unlock(&s->open_mutex);
1632                 schedule();
1633                 remove_wait_queue(&s->open_wait, &wait);
1634                 set_current_state(TASK_RUNNING);
1635                 if (signal_pending(current))
1636                         return -ERESTARTSYS;
1637                 mutex_lock(&s->open_mutex);
1638         }
1639
1640         spin_lock_irqsave(&s->lock, flags);
1641
1642         if (file->f_mode & FMODE_READ) {
1643                 /* set default settings */
1644                 set_adc_rate(s, 48000);
1645                 s->adcChannels = 2;
1646
1647                 ret = prog_dmabuf_adc(s);
1648                 if (ret) goto bailout;
1649         }
1650         if (file->f_mode & FMODE_WRITE) {
1651                 /* set default settings */
1652                 set_dac_rate(s, 48000);
1653                 s->dacChannels = 2;
1654
1655                 ret = prog_dmabuf_dac(s);
1656                 if (ret) goto bailout;
1657         }
1658
1659         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1660
1661  bailout:
1662         spin_unlock_irqrestore(&s->lock, flags);
1663
1664         mutex_unlock(&s->open_mutex);
1665         return ret;
1666 }
1667
1668 static int vrc5477_ac97_release(struct inode *inode, struct file *file)
1669 {
1670         struct vrc5477_ac97_state *s = 
1671                 (struct vrc5477_ac97_state *)file->private_data;
1672
1673         lock_kernel();
1674         if (file->f_mode & FMODE_WRITE)
1675                 drain_dac(s, file->f_flags & O_NONBLOCK);
1676         mutex_lock(&s->open_mutex);
1677         if (file->f_mode & FMODE_WRITE) {
1678                 stop_dac(s);
1679                 dealloc_dmabuf(s, &s->dma_dac);
1680         }
1681         if (file->f_mode & FMODE_READ) {
1682                 stop_adc(s);
1683                 dealloc_dmabuf(s, &s->dma_adc);
1684         }
1685         s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1686         mutex_unlock(&s->open_mutex);
1687         wake_up(&s->open_wait);
1688         unlock_kernel();
1689         return 0;
1690 }
1691
1692 static /*const*/ struct file_operations vrc5477_ac97_audio_fops = {
1693         .owner          = THIS_MODULE,
1694         .llseek         = no_llseek,
1695         .read           = vrc5477_ac97_read,
1696         .write          = vrc5477_ac97_write,
1697         .poll           = vrc5477_ac97_poll,
1698         .ioctl          = vrc5477_ac97_ioctl,
1699         // .mmap        = vrc5477_ac97_mmap,
1700         .open           = vrc5477_ac97_open,
1701         .release        = vrc5477_ac97_release,
1702 };
1703
1704
1705 /* --------------------------------------------------------------------- */
1706
1707
1708 /* --------------------------------------------------------------------- */
1709
1710 /*
1711  * for debugging purposes, we'll create a proc device that dumps the
1712  * CODEC chipstate
1713  */
1714
1715 #ifdef VRC5477_AC97_DEBUG
1716
1717 struct {
1718        const char *regname;
1719        unsigned regaddr;
1720 } vrc5477_ac97_regs[] = {
1721         {"VRC5477_INT_STATUS", VRC5477_INT_STATUS},
1722         {"VRC5477_CODEC_WR", VRC5477_CODEC_WR},
1723         {"VRC5477_CODEC_RD", VRC5477_CODEC_RD},
1724         {"VRC5477_CTRL", VRC5477_CTRL},
1725         {"VRC5477_ACLINK_CTRL", VRC5477_ACLINK_CTRL},
1726         {"VRC5477_INT_MASK", VRC5477_INT_MASK},
1727         {"VRC5477_DAC1_CTRL", VRC5477_DAC1_CTRL},
1728         {"VRC5477_DAC1L", VRC5477_DAC1L},
1729         {"VRC5477_DAC1_BADDR", VRC5477_DAC1_BADDR},
1730         {"VRC5477_DAC2_CTRL", VRC5477_DAC2_CTRL},
1731         {"VRC5477_DAC2L", VRC5477_DAC2L},
1732         {"VRC5477_DAC2_BADDR", VRC5477_DAC2_BADDR},
1733         {"VRC5477_DAC3_CTRL", VRC5477_DAC3_CTRL},
1734         {"VRC5477_DAC3L", VRC5477_DAC3L},
1735         {"VRC5477_DAC3_BADDR", VRC5477_DAC3_BADDR},
1736         {"VRC5477_ADC1_CTRL", VRC5477_ADC1_CTRL},
1737         {"VRC5477_ADC1L", VRC5477_ADC1L},
1738         {"VRC5477_ADC1_BADDR", VRC5477_ADC1_BADDR},
1739         {"VRC5477_ADC2_CTRL", VRC5477_ADC2_CTRL},
1740         {"VRC5477_ADC2L", VRC5477_ADC2L},
1741         {"VRC5477_ADC2_BADDR", VRC5477_ADC2_BADDR},
1742         {"VRC5477_ADC3_CTRL", VRC5477_ADC3_CTRL},
1743         {"VRC5477_ADC3L", VRC5477_ADC3L},
1744         {"VRC5477_ADC3_BADDR", VRC5477_ADC3_BADDR},
1745         {NULL, 0x0}
1746 };
1747
1748 static int proc_vrc5477_ac97_dump (char *buf, char **start, off_t fpos,
1749                                    int length, int *eof, void *data)
1750 {
1751         struct vrc5477_ac97_state *s;
1752         int cnt, len = 0;
1753
1754         if (list_empty(&devs))
1755                 return 0;
1756         s = list_entry(devs.next, struct vrc5477_ac97_state, devs);
1757
1758         /* print out header */
1759         len += sprintf(buf + len, "\n\t\tVrc5477 Audio Debug\n\n");
1760
1761         // print out digital controller state
1762         len += sprintf (buf + len, "NEC Vrc5477 Audio Controller registers\n");
1763         len += sprintf (buf + len, "---------------------------------\n");
1764         for (cnt=0; vrc5477_ac97_regs[cnt].regname != NULL; cnt++) {
1765                 len+= sprintf (buf + len, "%-20s = %08x\n",
1766                                vrc5477_ac97_regs[cnt].regname,
1767                                inl(s->io + vrc5477_ac97_regs[cnt].regaddr));
1768         }
1769    
1770         /* print out driver state */
1771         len += sprintf (buf + len, "NEC Vrc5477 Audio driver states\n");
1772         len += sprintf (buf + len, "---------------------------------\n");
1773         len += sprintf (buf + len, "dacChannels  = %d\n", s->dacChannels);
1774         len += sprintf (buf + len, "adcChannels  = %d\n", s->adcChannels);
1775         len += sprintf (buf + len, "dacRate  = %d\n", s->dacRate);
1776         len += sprintf (buf + len, "adcRate  = %d\n", s->adcRate);
1777
1778         len += sprintf (buf + len, "dma_dac is %s ready\n",  
1779                         s->dma_dac.ready? "" : "not");
1780         if (s->dma_dac.ready) {
1781                 len += sprintf (buf + len, "dma_dac is %s stopped.\n",  
1782                                 s->dma_dac.stopped? "" : "not");
1783                 len += sprintf (buf + len, "dma_dac.fragSize = %x\n", 
1784                                 s->dma_dac.fragSize);
1785                 len += sprintf (buf + len, "dma_dac.fragShift = %x\n", 
1786                                 s->dma_dac.fragShift);
1787                 len += sprintf (buf + len, "dma_dac.numFrag = %x\n", 
1788                                 s->dma_dac.numFrag);
1789                 len += sprintf (buf + len, "dma_dac.fragTotalSize = %x\n", 
1790                                 s->dma_dac.fragTotalSize);
1791                 len += sprintf (buf + len, "dma_dac.nextIn = %x\n", 
1792                                 s->dma_dac.nextIn);
1793                 len += sprintf (buf + len, "dma_dac.nextOut = %x\n", 
1794                                 s->dma_dac.nextOut);
1795                 len += sprintf (buf + len, "dma_dac.count = %x\n", 
1796                                 s->dma_dac.count);
1797         }
1798
1799         len += sprintf (buf + len, "dma_adc is %s ready\n",  
1800                         s->dma_adc.ready? "" : "not");
1801         if (s->dma_adc.ready) {
1802                 len += sprintf (buf + len, "dma_adc is %s stopped.\n",  
1803                                 s->dma_adc.stopped? "" : "not");
1804                 len += sprintf (buf + len, "dma_adc.fragSize = %x\n", 
1805                                 s->dma_adc.fragSize);
1806                 len += sprintf (buf + len, "dma_adc.fragShift = %x\n", 
1807                                 s->dma_adc.fragShift);
1808                 len += sprintf (buf + len, "dma_adc.numFrag = %x\n", 
1809                                 s->dma_adc.numFrag);
1810                 len += sprintf (buf + len, "dma_adc.fragTotalSize = %x\n", 
1811                                 s->dma_adc.fragTotalSize);
1812                 len += sprintf (buf + len, "dma_adc.nextIn = %x\n", 
1813                                 s->dma_adc.nextIn);
1814                 len += sprintf (buf + len, "dma_adc.nextOut = %x\n", 
1815                                 s->dma_adc.nextOut);
1816                 len += sprintf (buf + len, "dma_adc.count = %x\n", 
1817                                 s->dma_adc.count);
1818         }
1819          
1820         /* print out CODEC state */
1821         len += sprintf (buf + len, "\nAC97 CODEC registers\n");
1822         len += sprintf (buf + len, "----------------------\n");
1823         for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
1824                 len+= sprintf (buf + len, "reg %02x = %04x\n",
1825                                cnt, rdcodec(s->codec, cnt));
1826
1827         if (fpos >=len){
1828                 *start = buf;
1829                 *eof =1;
1830                 return 0;
1831         }
1832         *start = buf + fpos;
1833         if ((len -= fpos) > length)
1834                 return length;
1835         *eof =1;
1836         return len;
1837
1838 }
1839 #endif /* VRC5477_AC97_DEBUG */
1840
1841 /* --------------------------------------------------------------------- */
1842
1843 /* maximum number of devices; only used for command line params */
1844 #define NR_DEVICE 5
1845
1846 static unsigned int devindex;
1847
1848 MODULE_AUTHOR("Monta Vista Software, jsun@mvista.com or jsun@junsun.net");
1849 MODULE_DESCRIPTION("NEC Vrc5477 audio (AC97) Driver");
1850 MODULE_LICENSE("GPL");
1851
1852 static int __devinit vrc5477_ac97_probe(struct pci_dev *pcidev,
1853                                         const struct pci_device_id *pciid)
1854 {
1855         struct vrc5477_ac97_state *s;
1856 #ifdef VRC5477_AC97_DEBUG
1857         char proc_str[80];
1858 #endif
1859
1860         if (pcidev->irq == 0) 
1861                 return -1;
1862
1863         if (!(s = kzalloc(sizeof(struct vrc5477_ac97_state), GFP_KERNEL))) {
1864                 printk(KERN_ERR PFX "alloc of device struct failed\n");
1865                 return -1;
1866         }
1867
1868         init_waitqueue_head(&s->dma_adc.wait);
1869         init_waitqueue_head(&s->dma_dac.wait);
1870         init_waitqueue_head(&s->open_wait);
1871         mutex_init(&s->open_mutex);
1872         spin_lock_init(&s->lock);
1873
1874         s->dev = pcidev;
1875         s->io = pci_resource_start(pcidev, 0);
1876         s->irq = pcidev->irq;
1877         
1878         s->codec = ac97_alloc_codec();
1879
1880         s->codec->private_data = s;
1881         s->codec->id = 0;
1882         s->codec->codec_read = rdcodec;
1883         s->codec->codec_write = wrcodec;
1884         s->codec->codec_wait = waitcodec;
1885
1886         /* setting some other default values such as
1887          * adcChannels, adcRate is done in open() so that
1888          * no persistent state across file opens.
1889          */
1890
1891         /* test if get response from ac97, if not return */
1892         if (ac97_codec_not_present(s->codec)) {
1893                 printk(KERN_ERR PFX "no ac97 codec\n");
1894                 goto err_region;
1895
1896         }
1897
1898         /* test if get response from ac97, if not return */
1899         if (ac97_codec_not_present(&(s->codec))) {
1900                 printk(KERN_ERR PFX "no ac97 codec\n");
1901                 goto err_region;
1902
1903         }
1904
1905         if (!request_region(s->io, pci_resource_len(pcidev,0),
1906                             VRC5477_AC97_MODULE_NAME)) {
1907                 printk(KERN_ERR PFX "io ports %#lx->%#lx in use\n",
1908                        s->io, s->io + pci_resource_len(pcidev,0)-1);
1909                 goto err_region;
1910         }
1911         if (request_irq(s->irq, vrc5477_ac97_interrupt, IRQF_DISABLED,
1912                         VRC5477_AC97_MODULE_NAME, s)) {
1913                 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
1914                 goto err_irq;
1915         }
1916
1917         printk(KERN_INFO PFX "IO at %#lx, IRQ %d\n", s->io, s->irq);
1918
1919         /* register devices */
1920         if ((s->dev_audio = register_sound_dsp(&vrc5477_ac97_audio_fops, -1)) < 0)
1921                 goto err_dev1;
1922         if ((s->codec->dev_mixer =
1923              register_sound_mixer(&vrc5477_ac97_mixer_fops, -1)) < 0)
1924                 goto err_dev2;
1925
1926 #ifdef VRC5477_AC97_DEBUG
1927         /* initialize the debug proc device */
1928         s->ps = create_proc_read_entry(VRC5477_AC97_MODULE_NAME, 0, NULL,
1929                                        proc_vrc5477_ac97_dump, NULL);
1930 #endif /* VRC5477_AC97_DEBUG */
1931         
1932         /* enable pci io and bus mastering */
1933         if (pci_enable_device(pcidev))
1934                 goto err_dev3;
1935         pci_set_master(pcidev);
1936
1937         /* cold reset the AC97 */
1938         outl(VRC5477_ACLINK_CTRL_RST_ON | VRC5477_ACLINK_CTRL_RST_TIME,
1939              s->io + VRC5477_ACLINK_CTRL);
1940         while (inl(s->io + VRC5477_ACLINK_CTRL) & VRC5477_ACLINK_CTRL_RST_ON);
1941
1942         /* codec init */
1943         if (!ac97_probe_codec(s->codec))
1944                 goto err_dev3;
1945
1946 #ifdef VRC5477_AC97_DEBUG
1947         sprintf(proc_str, "driver/%s/%d/ac97", 
1948                 VRC5477_AC97_MODULE_NAME, s->codec->id);
1949         s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
1950                                              ac97_read_proc, s->codec);
1951         /* TODO : why this proc file does not show up? */
1952 #endif
1953
1954         /* Try to enable variable rate audio mode. */
1955         wrcodec(s->codec, AC97_EXTENDED_STATUS,
1956                 rdcodec(s->codec, AC97_EXTENDED_STATUS) | AC97_EXTSTAT_VRA);
1957         /* Did we enable it? */
1958         if(rdcodec(s->codec, AC97_EXTENDED_STATUS) & AC97_EXTSTAT_VRA)
1959                 s->extended_status |= AC97_EXTSTAT_VRA;
1960         else {
1961                 s->dacRate = 48000;
1962                 printk(KERN_INFO PFX "VRA mode not enabled; rate fixed at %d.",
1963                         s->dacRate);
1964         }
1965
1966         /* let us get the default volumne louder */
1967         wrcodec(s->codec, 0x2, 0x1010); /* master volume, middle */
1968         wrcodec(s->codec, 0xc, 0x10);           /* phone volume, middle */
1969         // wrcodec(s->codec, 0xe, 0x10);                /* misc volume, middle */
1970         wrcodec(s->codec, 0x10, 0x8000);        /* line-in 2 line-out disable */
1971         wrcodec(s->codec, 0x18, 0x0707);        /* PCM out (line out) middle */
1972
1973
1974         /* by default we select line in the input */
1975         wrcodec(s->codec, 0x1a, 0x0404);
1976         wrcodec(s->codec, 0x1c, 0x0f0f);
1977         wrcodec(s->codec, 0x1e, 0x07);
1978
1979         /* enable the master interrupt but disable all others */
1980         outl(VRC5477_INT_MASK_NMASK, s->io + VRC5477_INT_MASK);
1981
1982         /* store it in the driver field */
1983         pci_set_drvdata(pcidev, s);
1984         pcidev->dma_mask = 0xffffffff;
1985         /* put it into driver list */
1986         list_add_tail(&s->devs, &devs);
1987         /* increment devindex */
1988         if (devindex < NR_DEVICE-1)
1989                 devindex++;
1990         return 0;
1991
1992  err_dev3:
1993         unregister_sound_mixer(s->codec->dev_mixer);
1994  err_dev2:
1995         unregister_sound_dsp(s->dev_audio);
1996  err_dev1:
1997         printk(KERN_ERR PFX "cannot register misc device\n");
1998         free_irq(s->irq, s);
1999  err_irq:
2000         release_region(s->io, pci_resource_len(pcidev,0));
2001  err_region:
2002         ac97_release_codec(codec);
2003         kfree(s);
2004         return -1;
2005 }
2006
2007 static void __devexit vrc5477_ac97_remove(struct pci_dev *dev)
2008 {
2009         struct vrc5477_ac97_state *s = pci_get_drvdata(dev);
2010
2011         if (!s)
2012                 return;
2013         list_del(&s->devs);
2014
2015 #ifdef VRC5477_AC97_DEBUG
2016         if (s->ps)
2017                 remove_proc_entry(VRC5477_AC97_MODULE_NAME, NULL);
2018 #endif /* VRC5477_AC97_DEBUG */
2019
2020         synchronize_irq();
2021         free_irq(s->irq, s);
2022         release_region(s->io, pci_resource_len(dev,0));
2023         unregister_sound_dsp(s->dev_audio);
2024         unregister_sound_mixer(s->codec->dev_mixer);
2025         ac97_release_codec(s->codec);
2026         kfree(s);
2027         pci_set_drvdata(dev, NULL);
2028 }
2029
2030
2031 static struct pci_device_id id_table[] = {
2032     { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC5477_AC97, 
2033       PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2034     { 0, }
2035 };
2036
2037 MODULE_DEVICE_TABLE(pci, id_table);
2038
2039 static struct pci_driver vrc5477_ac97_driver = {
2040         .name           = VRC5477_AC97_MODULE_NAME,
2041         .id_table       = id_table,
2042         .probe          = vrc5477_ac97_probe,
2043         .remove         = __devexit_p(vrc5477_ac97_remove)
2044 };
2045
2046 static int __init init_vrc5477_ac97(void)
2047 {
2048         printk("Vrc5477 AC97 driver: version v0.2 time " __TIME__ " " __DATE__ " by Jun Sun\n");
2049         return pci_register_driver(&vrc5477_ac97_driver);
2050 }
2051
2052 static void __exit cleanup_vrc5477_ac97(void)
2053 {
2054         printk(KERN_INFO PFX "unloading\n");
2055         pci_unregister_driver(&vrc5477_ac97_driver);
2056 }
2057
2058 module_init(init_vrc5477_ac97);
2059 module_exit(cleanup_vrc5477_ac97);
2060