4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
46 #include <asm/pgtable.h>
47 #include <asm/tlbflush.h>
48 #include <asm/fixmap.h>
49 #include <asm/mmu_context.h>
50 #include <asm/setup.h>
51 #include <asm/paravirt.h>
52 #include <asm/linkage.h>
54 #include <asm/xen/hypercall.h>
55 #include <asm/xen/hypervisor.h>
58 #include <xen/interface/xen.h>
59 #include <xen/interface/version.h>
60 #include <xen/hvc-console.h>
62 #include "multicalls.h"
66 #define MMU_UPDATE_HISTO 30
68 #ifdef CONFIG_XEN_DEBUG_FS
72 u32 pgd_update_pinned;
73 u32 pgd_update_batched;
76 u32 pud_update_pinned;
77 u32 pud_update_batched;
80 u32 pmd_update_pinned;
81 u32 pmd_update_batched;
84 u32 pte_update_pinned;
85 u32 pte_update_batched;
88 u32 mmu_update_extended;
89 u32 mmu_update_histo[MMU_UPDATE_HISTO];
92 u32 prot_commit_batched;
95 u32 set_pte_at_batched;
96 u32 set_pte_at_pinned;
97 u32 set_pte_at_current;
98 u32 set_pte_at_kernel;
101 static u8 zero_stats;
103 static inline void check_zero(void)
105 if (unlikely(zero_stats)) {
106 memset(&mmu_stats, 0, sizeof(mmu_stats));
111 #define ADD_STATS(elem, val) \
112 do { check_zero(); mmu_stats.elem += (val); } while(0)
114 #else /* !CONFIG_XEN_DEBUG_FS */
116 #define ADD_STATS(elem, val) do { (void)(val); } while(0)
118 #endif /* CONFIG_XEN_DEBUG_FS */
122 * Identity map, in addition to plain kernel map. This needs to be
123 * large enough to allocate page table pages to allocate the rest.
124 * Each page can map 2MB.
126 static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
129 /* l3 pud for userspace vsyscall mapping */
130 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
131 #endif /* CONFIG_X86_64 */
134 * Note about cr3 (pagetable base) values:
136 * xen_cr3 contains the current logical cr3 value; it contains the
137 * last set cr3. This may not be the current effective cr3, because
138 * its update may be being lazily deferred. However, a vcpu looking
139 * at its own cr3 can use this value knowing that it everything will
140 * be self-consistent.
142 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
143 * hypercall to set the vcpu cr3 is complete (so it may be a little
144 * out of date, but it will never be set early). If one vcpu is
145 * looking at another vcpu's cr3 value, it should use this variable.
147 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
148 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
152 * Just beyond the highest usermode address. STACK_TOP_MAX has a
153 * redzone above it, so round it up to a PGD boundary.
155 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
158 #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
159 #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
161 /* Placeholder for holes in the address space */
162 static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
163 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
165 /* Array of pointers to pages containing p2m entries */
166 static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
167 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
169 /* Arrays of p2m arrays expressed in mfns used for save/restore */
170 static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
172 static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
175 static inline unsigned p2m_top_index(unsigned long pfn)
177 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
178 return pfn / P2M_ENTRIES_PER_PAGE;
181 static inline unsigned p2m_index(unsigned long pfn)
183 return pfn % P2M_ENTRIES_PER_PAGE;
186 /* Build the parallel p2m_top_mfn structures */
187 static void __init xen_build_mfn_list_list(void)
191 for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
192 unsigned topidx = p2m_top_index(pfn);
194 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
197 for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
198 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
199 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
203 void xen_setup_mfn_list_list(void)
205 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
207 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
208 virt_to_mfn(p2m_top_mfn_list);
209 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
212 /* Set up p2m_top to point to the domain-builder provided p2m pages */
213 void __init xen_build_dynamic_phys_to_machine(void)
215 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
216 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
219 for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
220 unsigned topidx = p2m_top_index(pfn);
222 p2m_top[topidx] = &mfn_list[pfn];
225 xen_build_mfn_list_list();
228 unsigned long get_phys_to_machine(unsigned long pfn)
230 unsigned topidx, idx;
232 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
233 return INVALID_P2M_ENTRY;
235 topidx = p2m_top_index(pfn);
236 idx = p2m_index(pfn);
237 return p2m_top[topidx][idx];
239 EXPORT_SYMBOL_GPL(get_phys_to_machine);
241 /* install a new p2m_top page */
242 bool install_p2mtop_page(unsigned long pfn, unsigned long *p)
244 unsigned topidx = p2m_top_index(pfn);
245 unsigned long **pfnp, *mfnp;
248 pfnp = &p2m_top[topidx];
249 mfnp = &p2m_top_mfn[topidx];
251 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
252 p[i] = INVALID_P2M_ENTRY;
254 if (cmpxchg(pfnp, p2m_missing, p) == p2m_missing) {
255 *mfnp = virt_to_mfn(p);
262 static void alloc_p2m(unsigned long pfn)
266 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
269 if (!install_p2mtop_page(pfn, p))
270 free_page((unsigned long)p);
273 /* Try to install p2m mapping; fail if intermediate bits missing */
274 bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
276 unsigned topidx, idx;
278 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
279 BUG_ON(mfn != INVALID_P2M_ENTRY);
283 topidx = p2m_top_index(pfn);
284 if (p2m_top[topidx] == p2m_missing) {
285 if (mfn == INVALID_P2M_ENTRY)
290 idx = p2m_index(pfn);
291 p2m_top[topidx][idx] = mfn;
296 void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
298 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
299 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
303 if (unlikely(!__set_phys_to_machine(pfn, mfn))) {
306 if (!__set_phys_to_machine(pfn, mfn))
311 unsigned long arbitrary_virt_to_mfn(void *vaddr)
313 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
315 return PFN_DOWN(maddr.maddr);
318 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
320 unsigned long address = (unsigned long)vaddr;
326 * if the PFN is in the linear mapped vaddr range, we can just use
327 * the (quick) virt_to_machine() p2m lookup
329 if (virt_addr_valid(vaddr))
330 return virt_to_machine(vaddr);
332 /* otherwise we have to do a (slower) full page-table walk */
334 pte = lookup_address(address, &level);
336 offset = address & ~PAGE_MASK;
337 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
340 void make_lowmem_page_readonly(void *vaddr)
343 unsigned long address = (unsigned long)vaddr;
346 pte = lookup_address(address, &level);
349 ptev = pte_wrprotect(*pte);
351 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
355 void make_lowmem_page_readwrite(void *vaddr)
358 unsigned long address = (unsigned long)vaddr;
361 pte = lookup_address(address, &level);
364 ptev = pte_mkwrite(*pte);
366 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
371 static bool xen_page_pinned(void *ptr)
373 struct page *page = virt_to_page(ptr);
375 return PagePinned(page);
378 static void xen_extend_mmu_update(const struct mmu_update *update)
380 struct multicall_space mcs;
381 struct mmu_update *u;
383 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
385 if (mcs.mc != NULL) {
386 ADD_STATS(mmu_update_extended, 1);
387 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
391 if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
392 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
394 ADD_STATS(mmu_update_histo[0], 1);
396 ADD_STATS(mmu_update, 1);
397 mcs = __xen_mc_entry(sizeof(*u));
398 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
399 ADD_STATS(mmu_update_histo[1], 1);
406 void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
414 /* ptr may be ioremapped for 64-bit pagetable setup */
415 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
416 u.val = pmd_val_ma(val);
417 xen_extend_mmu_update(&u);
419 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
421 xen_mc_issue(PARAVIRT_LAZY_MMU);
426 void xen_set_pmd(pmd_t *ptr, pmd_t val)
428 ADD_STATS(pmd_update, 1);
430 /* If page is not pinned, we can just update the entry
432 if (!xen_page_pinned(ptr)) {
437 ADD_STATS(pmd_update_pinned, 1);
439 xen_set_pmd_hyper(ptr, val);
443 * Associate a virtual page frame with a given physical page frame
444 * and protection flags for that frame.
446 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
448 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
451 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
452 pte_t *ptep, pte_t pteval)
454 /* updates to init_mm may be done without lock */
458 ADD_STATS(set_pte_at, 1);
459 // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
460 ADD_STATS(set_pte_at_current, mm == current->mm);
461 ADD_STATS(set_pte_at_kernel, mm == &init_mm);
463 if (mm == current->mm || mm == &init_mm) {
464 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
465 struct multicall_space mcs;
466 mcs = xen_mc_entry(0);
468 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
469 ADD_STATS(set_pte_at_batched, 1);
470 xen_mc_issue(PARAVIRT_LAZY_MMU);
473 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
476 xen_set_pte(ptep, pteval);
483 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
484 unsigned long addr, pte_t *ptep)
486 /* Just return the pte as-is. We preserve the bits on commit */
490 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
491 pte_t *ptep, pte_t pte)
497 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
498 u.val = pte_val_ma(pte);
499 xen_extend_mmu_update(&u);
501 ADD_STATS(prot_commit, 1);
502 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
504 xen_mc_issue(PARAVIRT_LAZY_MMU);
507 /* Assume pteval_t is equivalent to all the other *val_t types. */
508 static pteval_t pte_mfn_to_pfn(pteval_t val)
510 if (val & _PAGE_PRESENT) {
511 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
512 pteval_t flags = val & PTE_FLAGS_MASK;
513 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
519 static pteval_t pte_pfn_to_mfn(pteval_t val)
521 if (val & _PAGE_PRESENT) {
522 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
523 pteval_t flags = val & PTE_FLAGS_MASK;
524 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
530 pteval_t xen_pte_val(pte_t pte)
532 return pte_mfn_to_pfn(pte.pte);
534 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
536 pgdval_t xen_pgd_val(pgd_t pgd)
538 return pte_mfn_to_pfn(pgd.pgd);
540 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
542 pte_t xen_make_pte(pteval_t pte)
544 pte = pte_pfn_to_mfn(pte);
545 return native_make_pte(pte);
547 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
549 pgd_t xen_make_pgd(pgdval_t pgd)
551 pgd = pte_pfn_to_mfn(pgd);
552 return native_make_pgd(pgd);
554 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
556 pmdval_t xen_pmd_val(pmd_t pmd)
558 return pte_mfn_to_pfn(pmd.pmd);
560 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
562 void xen_set_pud_hyper(pud_t *ptr, pud_t val)
570 /* ptr may be ioremapped for 64-bit pagetable setup */
571 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
572 u.val = pud_val_ma(val);
573 xen_extend_mmu_update(&u);
575 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
577 xen_mc_issue(PARAVIRT_LAZY_MMU);
582 void xen_set_pud(pud_t *ptr, pud_t val)
584 ADD_STATS(pud_update, 1);
586 /* If page is not pinned, we can just update the entry
588 if (!xen_page_pinned(ptr)) {
593 ADD_STATS(pud_update_pinned, 1);
595 xen_set_pud_hyper(ptr, val);
598 void xen_set_pte(pte_t *ptep, pte_t pte)
600 ADD_STATS(pte_update, 1);
601 // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
602 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
604 #ifdef CONFIG_X86_PAE
605 ptep->pte_high = pte.pte_high;
607 ptep->pte_low = pte.pte_low;
613 #ifdef CONFIG_X86_PAE
614 void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
616 set_64bit((u64 *)ptep, native_pte_val(pte));
619 void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
622 smp_wmb(); /* make sure low gets written first */
626 void xen_pmd_clear(pmd_t *pmdp)
628 set_pmd(pmdp, __pmd(0));
630 #endif /* CONFIG_X86_PAE */
632 pmd_t xen_make_pmd(pmdval_t pmd)
634 pmd = pte_pfn_to_mfn(pmd);
635 return native_make_pmd(pmd);
637 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
639 #if PAGETABLE_LEVELS == 4
640 pudval_t xen_pud_val(pud_t pud)
642 return pte_mfn_to_pfn(pud.pud);
644 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
646 pud_t xen_make_pud(pudval_t pud)
648 pud = pte_pfn_to_mfn(pud);
650 return native_make_pud(pud);
652 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
654 pgd_t *xen_get_user_pgd(pgd_t *pgd)
656 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
657 unsigned offset = pgd - pgd_page;
658 pgd_t *user_ptr = NULL;
660 if (offset < pgd_index(USER_LIMIT)) {
661 struct page *page = virt_to_page(pgd_page);
662 user_ptr = (pgd_t *)page->private;
670 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
674 u.ptr = virt_to_machine(ptr).maddr;
675 u.val = pgd_val_ma(val);
676 xen_extend_mmu_update(&u);
680 * Raw hypercall-based set_pgd, intended for in early boot before
681 * there's a page structure. This implies:
682 * 1. The only existing pagetable is the kernel's
683 * 2. It is always pinned
684 * 3. It has no user pagetable attached to it
686 void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
692 __xen_set_pgd_hyper(ptr, val);
694 xen_mc_issue(PARAVIRT_LAZY_MMU);
699 void xen_set_pgd(pgd_t *ptr, pgd_t val)
701 pgd_t *user_ptr = xen_get_user_pgd(ptr);
703 ADD_STATS(pgd_update, 1);
705 /* If page is not pinned, we can just update the entry
707 if (!xen_page_pinned(ptr)) {
710 WARN_ON(xen_page_pinned(user_ptr));
716 ADD_STATS(pgd_update_pinned, 1);
717 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
719 /* If it's pinned, then we can at least batch the kernel and
720 user updates together. */
723 __xen_set_pgd_hyper(ptr, val);
725 __xen_set_pgd_hyper(user_ptr, val);
727 xen_mc_issue(PARAVIRT_LAZY_MMU);
729 #endif /* PAGETABLE_LEVELS == 4 */
732 * (Yet another) pagetable walker. This one is intended for pinning a
733 * pagetable. This means that it walks a pagetable and calls the
734 * callback function on each page it finds making up the page table,
735 * at every level. It walks the entire pagetable, but it only bothers
736 * pinning pte pages which are below limit. In the normal case this
737 * will be STACK_TOP_MAX, but at boot we need to pin up to
740 * For 32-bit the important bit is that we don't pin beyond there,
741 * because then we start getting into Xen's ptes.
743 * For 64-bit, we must skip the Xen hole in the middle of the address
744 * space, just after the big x86-64 virtual hole.
746 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
747 int (*func)(struct mm_struct *mm, struct page *,
752 unsigned hole_low, hole_high;
753 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
754 unsigned pgdidx, pudidx, pmdidx;
756 /* The limit is the last byte to be touched */
758 BUG_ON(limit >= FIXADDR_TOP);
760 if (xen_feature(XENFEAT_auto_translated_physmap))
764 * 64-bit has a great big hole in the middle of the address
765 * space, which contains the Xen mappings. On 32-bit these
766 * will end up making a zero-sized hole and so is a no-op.
768 hole_low = pgd_index(USER_LIMIT);
769 hole_high = pgd_index(PAGE_OFFSET);
771 pgdidx_limit = pgd_index(limit);
773 pudidx_limit = pud_index(limit);
778 pmdidx_limit = pmd_index(limit);
783 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
786 if (pgdidx >= hole_low && pgdidx < hole_high)
789 if (!pgd_val(pgd[pgdidx]))
792 pud = pud_offset(&pgd[pgdidx], 0);
794 if (PTRS_PER_PUD > 1) /* not folded */
795 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
797 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
800 if (pgdidx == pgdidx_limit &&
801 pudidx > pudidx_limit)
804 if (pud_none(pud[pudidx]))
807 pmd = pmd_offset(&pud[pudidx], 0);
809 if (PTRS_PER_PMD > 1) /* not folded */
810 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
812 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
815 if (pgdidx == pgdidx_limit &&
816 pudidx == pudidx_limit &&
817 pmdidx > pmdidx_limit)
820 if (pmd_none(pmd[pmdidx]))
823 pte = pmd_page(pmd[pmdidx]);
824 flush |= (*func)(mm, pte, PT_PTE);
830 /* Do the top level last, so that the callbacks can use it as
831 a cue to do final things like tlb flushes. */
832 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
837 static int xen_pgd_walk(struct mm_struct *mm,
838 int (*func)(struct mm_struct *mm, struct page *,
842 return __xen_pgd_walk(mm, mm->pgd, func, limit);
845 /* If we're using split pte locks, then take the page's lock and
846 return a pointer to it. Otherwise return NULL. */
847 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
849 spinlock_t *ptl = NULL;
851 #if USE_SPLIT_PTLOCKS
852 ptl = __pte_lockptr(page);
853 spin_lock_nest_lock(ptl, &mm->page_table_lock);
859 static void xen_pte_unlock(void *v)
865 static void xen_do_pin(unsigned level, unsigned long pfn)
867 struct mmuext_op *op;
868 struct multicall_space mcs;
870 mcs = __xen_mc_entry(sizeof(*op));
873 op->arg1.mfn = pfn_to_mfn(pfn);
874 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
877 static int xen_pin_page(struct mm_struct *mm, struct page *page,
880 unsigned pgfl = TestSetPagePinned(page);
884 flush = 0; /* already pinned */
885 else if (PageHighMem(page))
886 /* kmaps need flushing if we found an unpinned
890 void *pt = lowmem_page_address(page);
891 unsigned long pfn = page_to_pfn(page);
892 struct multicall_space mcs = __xen_mc_entry(0);
898 * We need to hold the pagetable lock between the time
899 * we make the pagetable RO and when we actually pin
900 * it. If we don't, then other users may come in and
901 * attempt to update the pagetable by writing it,
902 * which will fail because the memory is RO but not
903 * pinned, so Xen won't do the trap'n'emulate.
905 * If we're using split pte locks, we can't hold the
906 * entire pagetable's worth of locks during the
907 * traverse, because we may wrap the preempt count (8
908 * bits). The solution is to mark RO and pin each PTE
909 * page while holding the lock. This means the number
910 * of locks we end up holding is never more than a
911 * batch size (~32 entries, at present).
913 * If we're not using split pte locks, we needn't pin
914 * the PTE pages independently, because we're
915 * protected by the overall pagetable lock.
919 ptl = xen_pte_lock(page, mm);
921 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
922 pfn_pte(pfn, PAGE_KERNEL_RO),
923 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
926 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
928 /* Queue a deferred unlock for when this batch
930 xen_mc_callback(xen_pte_unlock, ptl);
937 /* This is called just after a mm has been created, but it has not
938 been used yet. We need to make sure that its pagetable is all
939 read-only, and can be pinned. */
940 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
946 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
947 /* re-enable interrupts for flushing */
957 pgd_t *user_pgd = xen_get_user_pgd(pgd);
959 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
962 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
963 xen_do_pin(MMUEXT_PIN_L4_TABLE,
964 PFN_DOWN(__pa(user_pgd)));
967 #else /* CONFIG_X86_32 */
968 #ifdef CONFIG_X86_PAE
969 /* Need to make sure unshared kernel PMD is pinnable */
970 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
973 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
974 #endif /* CONFIG_X86_64 */
978 static void xen_pgd_pin(struct mm_struct *mm)
980 __xen_pgd_pin(mm, mm->pgd);
984 * On save, we need to pin all pagetables to make sure they get their
985 * mfns turned into pfns. Search the list for any unpinned pgds and pin
986 * them (unpinned pgds are not currently in use, probably because the
987 * process is under construction or destruction).
989 * Expected to be called in stop_machine() ("equivalent to taking
990 * every spinlock in the system"), so the locking doesn't really
991 * matter all that much.
993 void xen_mm_pin_all(void)
998 spin_lock_irqsave(&pgd_lock, flags);
1000 list_for_each_entry(page, &pgd_list, lru) {
1001 if (!PagePinned(page)) {
1002 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
1003 SetPageSavePinned(page);
1007 spin_unlock_irqrestore(&pgd_lock, flags);
1011 * The init_mm pagetable is really pinned as soon as its created, but
1012 * that's before we have page structures to store the bits. So do all
1013 * the book-keeping now.
1015 static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
1016 enum pt_level level)
1018 SetPagePinned(page);
1022 static void __init xen_mark_init_mm_pinned(void)
1024 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
1027 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
1028 enum pt_level level)
1030 unsigned pgfl = TestClearPagePinned(page);
1032 if (pgfl && !PageHighMem(page)) {
1033 void *pt = lowmem_page_address(page);
1034 unsigned long pfn = page_to_pfn(page);
1035 spinlock_t *ptl = NULL;
1036 struct multicall_space mcs;
1039 * Do the converse to pin_page. If we're using split
1040 * pte locks, we must be holding the lock for while
1041 * the pte page is unpinned but still RO to prevent
1042 * concurrent updates from seeing it in this
1043 * partially-pinned state.
1045 if (level == PT_PTE) {
1046 ptl = xen_pte_lock(page, mm);
1049 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
1052 mcs = __xen_mc_entry(0);
1054 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1055 pfn_pte(pfn, PAGE_KERNEL),
1056 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1059 /* unlock when batch completed */
1060 xen_mc_callback(xen_pte_unlock, ptl);
1064 return 0; /* never need to flush on unpin */
1067 /* Release a pagetables pages back as normal RW */
1068 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
1072 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1074 #ifdef CONFIG_X86_64
1076 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1079 xen_do_pin(MMUEXT_UNPIN_TABLE,
1080 PFN_DOWN(__pa(user_pgd)));
1081 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
1086 #ifdef CONFIG_X86_PAE
1087 /* Need to make sure unshared kernel PMD is unpinned */
1088 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
1092 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
1097 static void xen_pgd_unpin(struct mm_struct *mm)
1099 __xen_pgd_unpin(mm, mm->pgd);
1103 * On resume, undo any pinning done at save, so that the rest of the
1104 * kernel doesn't see any unexpected pinned pagetables.
1106 void xen_mm_unpin_all(void)
1108 unsigned long flags;
1111 spin_lock_irqsave(&pgd_lock, flags);
1113 list_for_each_entry(page, &pgd_list, lru) {
1114 if (PageSavePinned(page)) {
1115 BUG_ON(!PagePinned(page));
1116 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
1117 ClearPageSavePinned(page);
1121 spin_unlock_irqrestore(&pgd_lock, flags);
1124 void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1126 spin_lock(&next->page_table_lock);
1128 spin_unlock(&next->page_table_lock);
1131 void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1133 spin_lock(&mm->page_table_lock);
1135 spin_unlock(&mm->page_table_lock);
1140 /* Another cpu may still have their %cr3 pointing at the pagetable, so
1141 we need to repoint it somewhere else before we can unpin it. */
1142 static void drop_other_mm_ref(void *info)
1144 struct mm_struct *mm = info;
1145 struct mm_struct *active_mm;
1147 active_mm = percpu_read(cpu_tlbstate.active_mm);
1149 if (active_mm == mm)
1150 leave_mm(smp_processor_id());
1152 /* If this cpu still has a stale cr3 reference, then make sure
1153 it has been flushed. */
1154 if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) {
1155 load_cr3(swapper_pg_dir);
1156 arch_flush_lazy_cpu_mode();
1160 static void xen_drop_mm_ref(struct mm_struct *mm)
1165 if (current->active_mm == mm) {
1166 if (current->mm == mm)
1167 load_cr3(swapper_pg_dir);
1169 leave_mm(smp_processor_id());
1170 arch_flush_lazy_cpu_mode();
1173 /* Get the "official" set of cpus referring to our pagetable. */
1174 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1175 for_each_online_cpu(cpu) {
1176 if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
1177 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1179 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1183 cpumask_copy(mask, &mm->cpu_vm_mask);
1185 /* It's possible that a vcpu may have a stale reference to our
1186 cr3, because its in lazy mode, and it hasn't yet flushed
1187 its set of pending hypercalls yet. In this case, we can
1188 look at its actual current cr3 value, and force it to flush
1190 for_each_online_cpu(cpu) {
1191 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1192 cpumask_set_cpu(cpu, mask);
1195 if (!cpumask_empty(mask))
1196 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1197 free_cpumask_var(mask);
1200 static void xen_drop_mm_ref(struct mm_struct *mm)
1202 if (current->active_mm == mm)
1203 load_cr3(swapper_pg_dir);
1208 * While a process runs, Xen pins its pagetables, which means that the
1209 * hypervisor forces it to be read-only, and it controls all updates
1210 * to it. This means that all pagetable updates have to go via the
1211 * hypervisor, which is moderately expensive.
1213 * Since we're pulling the pagetable down, we switch to use init_mm,
1214 * unpin old process pagetable and mark it all read-write, which
1215 * allows further operations on it to be simple memory accesses.
1217 * The only subtle point is that another CPU may be still using the
1218 * pagetable because of lazy tlb flushing. This means we need need to
1219 * switch all CPUs off this pagetable before we can unpin it.
1221 void xen_exit_mmap(struct mm_struct *mm)
1223 get_cpu(); /* make sure we don't move around */
1224 xen_drop_mm_ref(mm);
1227 spin_lock(&mm->page_table_lock);
1229 /* pgd may not be pinned in the error exit path of execve */
1230 if (xen_page_pinned(mm->pgd))
1233 spin_unlock(&mm->page_table_lock);
1236 static __init void xen_pagetable_setup_start(pgd_t *base)
1240 static __init void xen_pagetable_setup_done(pgd_t *base)
1242 xen_setup_shared_info();
1245 static void xen_write_cr2(unsigned long cr2)
1247 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1250 static unsigned long xen_read_cr2(void)
1252 return percpu_read(xen_vcpu)->arch.cr2;
1255 unsigned long xen_read_cr2_direct(void)
1257 return percpu_read(xen_vcpu_info.arch.cr2);
1260 static void xen_flush_tlb(void)
1262 struct mmuext_op *op;
1263 struct multicall_space mcs;
1267 mcs = xen_mc_entry(sizeof(*op));
1270 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1271 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1273 xen_mc_issue(PARAVIRT_LAZY_MMU);
1278 static void xen_flush_tlb_single(unsigned long addr)
1280 struct mmuext_op *op;
1281 struct multicall_space mcs;
1285 mcs = xen_mc_entry(sizeof(*op));
1287 op->cmd = MMUEXT_INVLPG_LOCAL;
1288 op->arg1.linear_addr = addr & PAGE_MASK;
1289 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1291 xen_mc_issue(PARAVIRT_LAZY_MMU);
1296 static void xen_flush_tlb_others(const struct cpumask *cpus,
1297 struct mm_struct *mm, unsigned long va)
1300 struct mmuext_op op;
1301 DECLARE_BITMAP(mask, NR_CPUS);
1303 struct multicall_space mcs;
1305 if (cpumask_empty(cpus))
1306 return; /* nothing to do */
1308 mcs = xen_mc_entry(sizeof(*args));
1310 args->op.arg2.vcpumask = to_cpumask(args->mask);
1312 /* Remove us, and any offline CPUS. */
1313 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1314 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1316 if (va == TLB_FLUSH_ALL) {
1317 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1319 args->op.cmd = MMUEXT_INVLPG_MULTI;
1320 args->op.arg1.linear_addr = va;
1323 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1325 xen_mc_issue(PARAVIRT_LAZY_MMU);
1328 static unsigned long xen_read_cr3(void)
1330 return percpu_read(xen_cr3);
1333 static void set_current_cr3(void *v)
1335 percpu_write(xen_current_cr3, (unsigned long)v);
1338 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1340 struct mmuext_op *op;
1341 struct multicall_space mcs;
1345 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1349 WARN_ON(mfn == 0 && kernel);
1351 mcs = __xen_mc_entry(sizeof(*op));
1354 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1357 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1360 percpu_write(xen_cr3, cr3);
1362 /* Update xen_current_cr3 once the batch has actually
1364 xen_mc_callback(set_current_cr3, (void *)cr3);
1368 static void xen_write_cr3(unsigned long cr3)
1370 BUG_ON(preemptible());
1372 xen_mc_batch(); /* disables interrupts */
1374 /* Update while interrupts are disabled, so its atomic with
1376 percpu_write(xen_cr3, cr3);
1378 __xen_write_cr3(true, cr3);
1380 #ifdef CONFIG_X86_64
1382 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1384 __xen_write_cr3(false, __pa(user_pgd));
1386 __xen_write_cr3(false, 0);
1390 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1393 static int xen_pgd_alloc(struct mm_struct *mm)
1395 pgd_t *pgd = mm->pgd;
1398 BUG_ON(PagePinned(virt_to_page(pgd)));
1400 #ifdef CONFIG_X86_64
1402 struct page *page = virt_to_page(pgd);
1405 BUG_ON(page->private != 0);
1409 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1410 page->private = (unsigned long)user_pgd;
1412 if (user_pgd != NULL) {
1413 user_pgd[pgd_index(VSYSCALL_START)] =
1414 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1418 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1425 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1427 #ifdef CONFIG_X86_64
1428 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1431 free_page((unsigned long)user_pgd);
1435 #ifdef CONFIG_HIGHPTE
1436 static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
1438 pgprot_t prot = PAGE_KERNEL;
1440 if (PagePinned(page))
1441 prot = PAGE_KERNEL_RO;
1443 if (0 && PageHighMem(page))
1444 printk("mapping highpte %lx type %d prot %s\n",
1445 page_to_pfn(page), type,
1446 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1448 return kmap_atomic_prot(page, type, prot);
1452 #ifdef CONFIG_X86_32
1453 static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1455 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1456 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1457 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1463 /* Init-time set_pte while constructing initial pagetables, which
1464 doesn't allow RO pagetable pages to be remapped RW */
1465 static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1467 pte = mask_rw_pte(ptep, pte);
1469 xen_set_pte(ptep, pte);
1473 static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1475 struct mmuext_op op;
1477 op.arg1.mfn = pfn_to_mfn(pfn);
1478 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1482 /* Early in boot, while setting up the initial pagetable, assume
1483 everything is pinned. */
1484 static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1486 #ifdef CONFIG_FLATMEM
1487 BUG_ON(mem_map); /* should only be used early */
1489 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1490 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1493 /* Used for pmd and pud */
1494 static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1496 #ifdef CONFIG_FLATMEM
1497 BUG_ON(mem_map); /* should only be used early */
1499 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1502 /* Early release_pte assumes that all pts are pinned, since there's
1503 only init_mm and anything attached to that is pinned. */
1504 static __init void xen_release_pte_init(unsigned long pfn)
1506 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1507 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1510 static __init void xen_release_pmd_init(unsigned long pfn)
1512 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1515 /* This needs to make sure the new pte page is pinned iff its being
1516 attached to a pinned pagetable. */
1517 static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1519 struct page *page = pfn_to_page(pfn);
1521 if (PagePinned(virt_to_page(mm->pgd))) {
1522 SetPagePinned(page);
1525 if (!PageHighMem(page)) {
1526 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1527 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1528 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1530 /* make sure there are no stray mappings of
1532 kmap_flush_unused();
1537 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1539 xen_alloc_ptpage(mm, pfn, PT_PTE);
1542 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1544 xen_alloc_ptpage(mm, pfn, PT_PMD);
1547 /* This should never happen until we're OK to use struct page */
1548 static void xen_release_ptpage(unsigned long pfn, unsigned level)
1550 struct page *page = pfn_to_page(pfn);
1552 if (PagePinned(page)) {
1553 if (!PageHighMem(page)) {
1554 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1555 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1556 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1558 ClearPagePinned(page);
1562 static void xen_release_pte(unsigned long pfn)
1564 xen_release_ptpage(pfn, PT_PTE);
1567 static void xen_release_pmd(unsigned long pfn)
1569 xen_release_ptpage(pfn, PT_PMD);
1572 #if PAGETABLE_LEVELS == 4
1573 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1575 xen_alloc_ptpage(mm, pfn, PT_PUD);
1578 static void xen_release_pud(unsigned long pfn)
1580 xen_release_ptpage(pfn, PT_PUD);
1584 void __init xen_reserve_top(void)
1586 #ifdef CONFIG_X86_32
1587 unsigned long top = HYPERVISOR_VIRT_START;
1588 struct xen_platform_parameters pp;
1590 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1591 top = pp.virt_start;
1593 reserve_top_address(-top);
1594 #endif /* CONFIG_X86_32 */
1598 * Like __va(), but returns address in the kernel mapping (which is
1599 * all we have until the physical memory mapping has been set up.
1601 static void *__ka(phys_addr_t paddr)
1603 #ifdef CONFIG_X86_64
1604 return (void *)(paddr + __START_KERNEL_map);
1610 /* Convert a machine address to physical address */
1611 static unsigned long m2p(phys_addr_t maddr)
1615 maddr &= PTE_PFN_MASK;
1616 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1621 /* Convert a machine address to kernel virtual */
1622 static void *m2v(phys_addr_t maddr)
1624 return __ka(m2p(maddr));
1627 static void set_page_prot(void *addr, pgprot_t prot)
1629 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1630 pte_t pte = pfn_pte(pfn, prot);
1632 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1636 static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1638 unsigned pmdidx, pteidx;
1644 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1647 /* Reuse or allocate a page of ptes */
1648 if (pmd_present(pmd[pmdidx]))
1649 pte_page = m2v(pmd[pmdidx].pmd);
1651 /* Check for free pte pages */
1652 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1655 pte_page = &level1_ident_pgt[ident_pte];
1656 ident_pte += PTRS_PER_PTE;
1658 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1661 /* Install mappings */
1662 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1665 if (pfn > max_pfn_mapped)
1666 max_pfn_mapped = pfn;
1668 if (!pte_none(pte_page[pteidx]))
1671 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1672 pte_page[pteidx] = pte;
1676 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1677 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1679 set_page_prot(pmd, PAGE_KERNEL_RO);
1682 #ifdef CONFIG_X86_64
1683 static void convert_pfn_mfn(void *v)
1688 /* All levels are converted the same way, so just treat them
1690 for (i = 0; i < PTRS_PER_PTE; i++)
1691 pte[i] = xen_make_pte(pte[i].pte);
1695 * Set up the inital kernel pagetable.
1697 * We can construct this by grafting the Xen provided pagetable into
1698 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1699 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1700 * means that only the kernel has a physical mapping to start with -
1701 * but that's enough to get __va working. We need to fill in the rest
1702 * of the physical mapping once some sort of allocator has been set
1705 __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1706 unsigned long max_pfn)
1711 /* Zap identity mapping */
1712 init_level4_pgt[0] = __pgd(0);
1714 /* Pre-constructed entries are in pfn, so convert to mfn */
1715 convert_pfn_mfn(init_level4_pgt);
1716 convert_pfn_mfn(level3_ident_pgt);
1717 convert_pfn_mfn(level3_kernel_pgt);
1719 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1720 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1722 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1723 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1725 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1726 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1727 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1729 /* Set up identity map */
1730 xen_map_identity_early(level2_ident_pgt, max_pfn);
1732 /* Make pagetable pieces RO */
1733 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1734 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1735 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1736 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1737 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1738 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1740 /* Pin down new L4 */
1741 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1742 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1744 /* Unpin Xen-provided one */
1745 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1748 pgd = init_level4_pgt;
1751 * At this stage there can be no user pgd, and no page
1752 * structure to attach it to, so make sure we just set kernel
1756 __xen_write_cr3(true, __pa(pgd));
1757 xen_mc_issue(PARAVIRT_LAZY_CPU);
1759 reserve_early(__pa(xen_start_info->pt_base),
1760 __pa(xen_start_info->pt_base +
1761 xen_start_info->nr_pt_frames * PAGE_SIZE),
1766 #else /* !CONFIG_X86_64 */
1767 static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1769 __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1770 unsigned long max_pfn)
1774 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1775 xen_start_info->nr_pt_frames * PAGE_SIZE +
1778 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1779 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1781 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1783 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1784 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1785 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1787 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1788 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1789 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1791 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1793 xen_write_cr3(__pa(swapper_pg_dir));
1795 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1797 return swapper_pg_dir;
1799 #endif /* CONFIG_X86_64 */
1801 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1805 phys >>= PAGE_SHIFT;
1808 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1809 #ifdef CONFIG_X86_F00F_BUG
1812 #ifdef CONFIG_X86_32
1815 # ifdef CONFIG_HIGHMEM
1816 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1819 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1821 #ifdef CONFIG_X86_LOCAL_APIC
1822 case FIX_APIC_BASE: /* maps dummy local APIC */
1824 case FIX_TEXT_POKE0:
1825 case FIX_TEXT_POKE1:
1826 /* All local page mappings */
1827 pte = pfn_pte(phys, prot);
1831 pte = mfn_pte(phys, prot);
1835 __native_set_fixmap(idx, pte);
1837 #ifdef CONFIG_X86_64
1838 /* Replicate changes to map the vsyscall page into the user
1839 pagetable vsyscall mapping. */
1840 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1841 unsigned long vaddr = __fix_to_virt(idx);
1842 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1847 __init void xen_post_allocator_init(void)
1849 pv_mmu_ops.set_pte = xen_set_pte;
1850 pv_mmu_ops.set_pmd = xen_set_pmd;
1851 pv_mmu_ops.set_pud = xen_set_pud;
1852 #if PAGETABLE_LEVELS == 4
1853 pv_mmu_ops.set_pgd = xen_set_pgd;
1856 /* This will work as long as patching hasn't happened yet
1857 (which it hasn't) */
1858 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1859 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1860 pv_mmu_ops.release_pte = xen_release_pte;
1861 pv_mmu_ops.release_pmd = xen_release_pmd;
1862 #if PAGETABLE_LEVELS == 4
1863 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1864 pv_mmu_ops.release_pud = xen_release_pud;
1867 #ifdef CONFIG_X86_64
1868 SetPagePinned(virt_to_page(level3_user_vsyscall));
1870 xen_mark_init_mm_pinned();
1873 const struct pv_mmu_ops xen_mmu_ops __initdata = {
1874 .pagetable_setup_start = xen_pagetable_setup_start,
1875 .pagetable_setup_done = xen_pagetable_setup_done,
1877 .read_cr2 = xen_read_cr2,
1878 .write_cr2 = xen_write_cr2,
1880 .read_cr3 = xen_read_cr3,
1881 .write_cr3 = xen_write_cr3,
1883 .flush_tlb_user = xen_flush_tlb,
1884 .flush_tlb_kernel = xen_flush_tlb,
1885 .flush_tlb_single = xen_flush_tlb_single,
1886 .flush_tlb_others = xen_flush_tlb_others,
1888 .pte_update = paravirt_nop,
1889 .pte_update_defer = paravirt_nop,
1891 .pgd_alloc = xen_pgd_alloc,
1892 .pgd_free = xen_pgd_free,
1894 .alloc_pte = xen_alloc_pte_init,
1895 .release_pte = xen_release_pte_init,
1896 .alloc_pmd = xen_alloc_pmd_init,
1897 .alloc_pmd_clone = paravirt_nop,
1898 .release_pmd = xen_release_pmd_init,
1900 #ifdef CONFIG_HIGHPTE
1901 .kmap_atomic_pte = xen_kmap_atomic_pte,
1904 #ifdef CONFIG_X86_64
1905 .set_pte = xen_set_pte,
1907 .set_pte = xen_set_pte_init,
1909 .set_pte_at = xen_set_pte_at,
1910 .set_pmd = xen_set_pmd_hyper,
1912 .ptep_modify_prot_start = __ptep_modify_prot_start,
1913 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1915 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1916 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
1918 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1919 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
1921 #ifdef CONFIG_X86_PAE
1922 .set_pte_atomic = xen_set_pte_atomic,
1923 .pte_clear = xen_pte_clear,
1924 .pmd_clear = xen_pmd_clear,
1925 #endif /* CONFIG_X86_PAE */
1926 .set_pud = xen_set_pud_hyper,
1928 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1929 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
1931 #if PAGETABLE_LEVELS == 4
1932 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1933 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
1934 .set_pgd = xen_set_pgd_hyper,
1936 .alloc_pud = xen_alloc_pmd_init,
1937 .release_pud = xen_release_pmd_init,
1938 #endif /* PAGETABLE_LEVELS == 4 */
1940 .activate_mm = xen_activate_mm,
1941 .dup_mmap = xen_dup_mmap,
1942 .exit_mmap = xen_exit_mmap,
1945 .enter = paravirt_enter_lazy_mmu,
1946 .leave = xen_leave_lazy,
1949 .set_fixmap = xen_set_fixmap,
1953 #ifdef CONFIG_XEN_DEBUG_FS
1955 static struct dentry *d_mmu_debug;
1957 static int __init xen_mmu_debugfs(void)
1959 struct dentry *d_xen = xen_init_debugfs();
1964 d_mmu_debug = debugfs_create_dir("mmu", d_xen);
1966 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
1968 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
1969 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
1970 &mmu_stats.pgd_update_pinned);
1971 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
1972 &mmu_stats.pgd_update_pinned);
1974 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
1975 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
1976 &mmu_stats.pud_update_pinned);
1977 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
1978 &mmu_stats.pud_update_pinned);
1980 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
1981 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
1982 &mmu_stats.pmd_update_pinned);
1983 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
1984 &mmu_stats.pmd_update_pinned);
1986 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
1987 // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
1988 // &mmu_stats.pte_update_pinned);
1989 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
1990 &mmu_stats.pte_update_pinned);
1992 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
1993 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
1994 &mmu_stats.mmu_update_extended);
1995 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
1996 mmu_stats.mmu_update_histo, 20);
1998 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
1999 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
2000 &mmu_stats.set_pte_at_batched);
2001 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
2002 &mmu_stats.set_pte_at_current);
2003 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
2004 &mmu_stats.set_pte_at_kernel);
2006 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
2007 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
2008 &mmu_stats.prot_commit_batched);
2012 fs_initcall(xen_mmu_debugfs);
2014 #endif /* CONFIG_XEN_DEBUG_FS */