2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/cs.h>
23 #include <pcmcia/cistpl.h>
24 #include <pcmcia/ds.h>
27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
28 MODULE_LICENSE("GPL");
31 /* Temporary list of yet-to-be-attached buses */
32 static LIST_HEAD(attach_queue);
33 /* List if running buses */
34 static LIST_HEAD(buses);
35 /* Software ID counter */
36 static unsigned int next_busnumber;
37 /* buses_mutes locks the two buslists and the next_busnumber.
38 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
39 static DEFINE_MUTEX(buses_mutex);
41 /* There are differences in the codeflow, if the bus is
42 * initialized from early boot, as various needed services
43 * are not available early. This is a mechanism to delay
44 * these initializations to after early boot has finished.
45 * It's also used to avoid mutex locking, as that's not
46 * available and needed early. */
47 static bool ssb_is_early_boot = 1;
49 static void ssb_buses_lock(void);
50 static void ssb_buses_unlock(void);
53 #ifdef CONFIG_SSB_PCIHOST
54 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
59 list_for_each_entry(bus, &buses, list) {
60 if (bus->bustype == SSB_BUSTYPE_PCI &&
61 bus->host_pci == pdev)
70 #endif /* CONFIG_SSB_PCIHOST */
72 #ifdef CONFIG_SSB_PCMCIAHOST
73 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
78 list_for_each_entry(bus, &buses, list) {
79 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
80 bus->host_pcmcia == pdev)
89 #endif /* CONFIG_SSB_PCMCIAHOST */
91 int ssb_for_each_bus_call(unsigned long data,
92 int (*func)(struct ssb_bus *bus, unsigned long data))
98 list_for_each_entry(bus, &buses, list) {
99 res = func(bus, data);
110 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
113 get_device(dev->dev);
117 static void ssb_device_put(struct ssb_device *dev)
120 put_device(dev->dev);
123 static int ssb_device_resume(struct device *dev)
125 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
126 struct ssb_driver *ssb_drv;
130 ssb_drv = drv_to_ssb_drv(dev->driver);
131 if (ssb_drv && ssb_drv->resume)
132 err = ssb_drv->resume(ssb_dev);
140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
147 ssb_drv = drv_to_ssb_drv(dev->driver);
148 if (ssb_drv && ssb_drv->suspend)
149 err = ssb_drv->suspend(ssb_dev, state);
157 int ssb_bus_resume(struct ssb_bus *bus)
161 /* Reset HW state information in memory, so that HW is
162 * completely reinitialized. */
163 bus->mapped_device = NULL;
164 #ifdef CONFIG_SSB_DRIVER_PCICORE
165 bus->pcicore.setup_done = 0;
168 err = ssb_bus_powerup(bus, 0);
171 err = ssb_pcmcia_hardware_setup(bus);
173 ssb_bus_may_powerdown(bus);
176 ssb_chipco_resume(&bus->chipco);
177 ssb_bus_may_powerdown(bus);
181 EXPORT_SYMBOL(ssb_bus_resume);
183 int ssb_bus_suspend(struct ssb_bus *bus)
185 ssb_chipco_suspend(&bus->chipco);
186 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
190 EXPORT_SYMBOL(ssb_bus_suspend);
192 #ifdef CONFIG_SSB_SPROM
193 int ssb_devices_freeze(struct ssb_bus *bus)
195 struct ssb_device *dev;
196 struct ssb_driver *drv;
199 pm_message_t state = PMSG_FREEZE;
201 /* First check that we are capable to freeze all devices. */
202 for (i = 0; i < bus->nr_devices; i++) {
203 dev = &(bus->devices[i]);
206 !device_is_registered(dev->dev))
208 drv = drv_to_ssb_drv(dev->dev->driver);
212 /* Nope, can't suspend this one. */
216 /* Now suspend all devices */
217 for (i = 0; i < bus->nr_devices; i++) {
218 dev = &(bus->devices[i]);
221 !device_is_registered(dev->dev))
223 drv = drv_to_ssb_drv(dev->dev->driver);
226 err = drv->suspend(dev, state);
228 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
236 for (i--; i >= 0; i--) {
237 dev = &(bus->devices[i]);
240 !device_is_registered(dev->dev))
242 drv = drv_to_ssb_drv(dev->dev->driver);
251 int ssb_devices_thaw(struct ssb_bus *bus)
253 struct ssb_device *dev;
254 struct ssb_driver *drv;
258 for (i = 0; i < bus->nr_devices; i++) {
259 dev = &(bus->devices[i]);
262 !device_is_registered(dev->dev))
264 drv = drv_to_ssb_drv(dev->dev->driver);
267 if (SSB_WARN_ON(!drv->resume))
269 err = drv->resume(dev);
271 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
278 #endif /* CONFIG_SSB_SPROM */
280 static void ssb_device_shutdown(struct device *dev)
282 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
283 struct ssb_driver *ssb_drv;
287 ssb_drv = drv_to_ssb_drv(dev->driver);
288 if (ssb_drv && ssb_drv->shutdown)
289 ssb_drv->shutdown(ssb_dev);
292 static int ssb_device_remove(struct device *dev)
294 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
295 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
297 if (ssb_drv && ssb_drv->remove)
298 ssb_drv->remove(ssb_dev);
299 ssb_device_put(ssb_dev);
304 static int ssb_device_probe(struct device *dev)
306 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
307 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
310 ssb_device_get(ssb_dev);
311 if (ssb_drv && ssb_drv->probe)
312 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
314 ssb_device_put(ssb_dev);
319 static int ssb_match_devid(const struct ssb_device_id *tabid,
320 const struct ssb_device_id *devid)
322 if ((tabid->vendor != devid->vendor) &&
323 tabid->vendor != SSB_ANY_VENDOR)
325 if ((tabid->coreid != devid->coreid) &&
326 tabid->coreid != SSB_ANY_ID)
328 if ((tabid->revision != devid->revision) &&
329 tabid->revision != SSB_ANY_REV)
334 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
336 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
337 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
338 const struct ssb_device_id *id;
340 for (id = ssb_drv->id_table;
341 id->vendor || id->coreid || id->revision;
343 if (ssb_match_devid(id, &ssb_dev->id))
344 return 1; /* found */
350 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
352 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
357 return add_uevent_var(env,
358 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
359 ssb_dev->id.vendor, ssb_dev->id.coreid,
360 ssb_dev->id.revision);
363 static struct bus_type ssb_bustype = {
365 .match = ssb_bus_match,
366 .probe = ssb_device_probe,
367 .remove = ssb_device_remove,
368 .shutdown = ssb_device_shutdown,
369 .suspend = ssb_device_suspend,
370 .resume = ssb_device_resume,
371 .uevent = ssb_device_uevent,
374 static void ssb_buses_lock(void)
376 /* See the comment at the ssb_is_early_boot definition */
377 if (!ssb_is_early_boot)
378 mutex_lock(&buses_mutex);
381 static void ssb_buses_unlock(void)
383 /* See the comment at the ssb_is_early_boot definition */
384 if (!ssb_is_early_boot)
385 mutex_unlock(&buses_mutex);
388 static void ssb_devices_unregister(struct ssb_bus *bus)
390 struct ssb_device *sdev;
393 for (i = bus->nr_devices - 1; i >= 0; i--) {
394 sdev = &(bus->devices[i]);
396 device_unregister(sdev->dev);
400 void ssb_bus_unregister(struct ssb_bus *bus)
403 ssb_devices_unregister(bus);
404 list_del(&bus->list);
407 ssb_pcmcia_exit(bus);
411 EXPORT_SYMBOL(ssb_bus_unregister);
413 static void ssb_release_dev(struct device *dev)
415 struct __ssb_dev_wrapper *devwrap;
417 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
421 static int ssb_devices_register(struct ssb_bus *bus)
423 struct ssb_device *sdev;
425 struct __ssb_dev_wrapper *devwrap;
429 for (i = 0; i < bus->nr_devices; i++) {
430 sdev = &(bus->devices[i]);
432 /* We don't register SSB-system devices to the kernel,
433 * as the drivers for them are built into SSB. */
434 switch (sdev->id.coreid) {
435 case SSB_DEV_CHIPCOMMON:
440 case SSB_DEV_MIPS_3302:
445 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
447 ssb_printk(KERN_ERR PFX
448 "Could not allocate device\n");
453 devwrap->sdev = sdev;
455 dev->release = ssb_release_dev;
456 dev->bus = &ssb_bustype;
457 snprintf(dev->bus_id, sizeof(dev->bus_id),
458 "ssb%u:%d", bus->busnumber, dev_idx);
460 switch (bus->bustype) {
461 case SSB_BUSTYPE_PCI:
462 #ifdef CONFIG_SSB_PCIHOST
463 sdev->irq = bus->host_pci->irq;
464 dev->parent = &bus->host_pci->dev;
465 sdev->dma_dev = &bus->host_pci->dev;
468 case SSB_BUSTYPE_PCMCIA:
469 #ifdef CONFIG_SSB_PCMCIAHOST
470 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
471 dev->parent = &bus->host_pcmcia->dev;
472 sdev->dma_dev = &bus->host_pcmcia->dev;
475 case SSB_BUSTYPE_SSB:
481 err = device_register(dev);
483 ssb_printk(KERN_ERR PFX
484 "Could not register %s\n",
486 /* Set dev to NULL to not unregister
487 * dev on error unwinding. */
497 /* Unwind the already registered devices. */
498 ssb_devices_unregister(bus);
502 /* Needs ssb_buses_lock() */
503 static int ssb_attach_queued_buses(void)
505 struct ssb_bus *bus, *n;
507 int drop_them_all = 0;
509 list_for_each_entry_safe(bus, n, &attach_queue, list) {
511 list_del(&bus->list);
514 /* Can't init the PCIcore in ssb_bus_register(), as that
515 * is too early in boot for embedded systems
516 * (no udelay() available). So do it here in attach stage.
518 err = ssb_bus_powerup(bus, 0);
521 ssb_pcicore_init(&bus->pcicore);
522 ssb_bus_may_powerdown(bus);
524 err = ssb_devices_register(bus);
528 list_del(&bus->list);
531 list_move_tail(&bus->list, &buses);
537 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
539 struct ssb_bus *bus = dev->bus;
541 offset += dev->core_index * SSB_CORE_SIZE;
542 return readb(bus->mmio + offset);
545 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
547 struct ssb_bus *bus = dev->bus;
549 offset += dev->core_index * SSB_CORE_SIZE;
550 return readw(bus->mmio + offset);
553 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
555 struct ssb_bus *bus = dev->bus;
557 offset += dev->core_index * SSB_CORE_SIZE;
558 return readl(bus->mmio + offset);
561 #ifdef CONFIG_SSB_BLOCKIO
562 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
563 size_t count, u16 offset, u8 reg_width)
565 struct ssb_bus *bus = dev->bus;
568 offset += dev->core_index * SSB_CORE_SIZE;
569 addr = bus->mmio + offset;
576 *buf = __raw_readb(addr);
583 __le16 *buf = buffer;
585 SSB_WARN_ON(count & 1);
587 *buf = (__force __le16)__raw_readw(addr);
594 __le32 *buf = buffer;
596 SSB_WARN_ON(count & 3);
598 *buf = (__force __le32)__raw_readl(addr);
608 #endif /* CONFIG_SSB_BLOCKIO */
610 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
612 struct ssb_bus *bus = dev->bus;
614 offset += dev->core_index * SSB_CORE_SIZE;
615 writeb(value, bus->mmio + offset);
618 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
620 struct ssb_bus *bus = dev->bus;
622 offset += dev->core_index * SSB_CORE_SIZE;
623 writew(value, bus->mmio + offset);
626 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
628 struct ssb_bus *bus = dev->bus;
630 offset += dev->core_index * SSB_CORE_SIZE;
631 writel(value, bus->mmio + offset);
634 #ifdef CONFIG_SSB_BLOCKIO
635 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
636 size_t count, u16 offset, u8 reg_width)
638 struct ssb_bus *bus = dev->bus;
641 offset += dev->core_index * SSB_CORE_SIZE;
642 addr = bus->mmio + offset;
646 const u8 *buf = buffer;
649 __raw_writeb(*buf, addr);
656 const __le16 *buf = buffer;
658 SSB_WARN_ON(count & 1);
660 __raw_writew((__force u16)(*buf), addr);
667 const __le32 *buf = buffer;
669 SSB_WARN_ON(count & 3);
671 __raw_writel((__force u32)(*buf), addr);
681 #endif /* CONFIG_SSB_BLOCKIO */
683 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
684 static const struct ssb_bus_ops ssb_ssb_ops = {
685 .read8 = ssb_ssb_read8,
686 .read16 = ssb_ssb_read16,
687 .read32 = ssb_ssb_read32,
688 .write8 = ssb_ssb_write8,
689 .write16 = ssb_ssb_write16,
690 .write32 = ssb_ssb_write32,
691 #ifdef CONFIG_SSB_BLOCKIO
692 .block_read = ssb_ssb_block_read,
693 .block_write = ssb_ssb_block_write,
697 static int ssb_fetch_invariants(struct ssb_bus *bus,
698 ssb_invariants_func_t get_invariants)
700 struct ssb_init_invariants iv;
703 memset(&iv, 0, sizeof(iv));
704 err = get_invariants(bus, &iv);
707 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
708 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
709 bus->has_cardbus_slot = iv.has_cardbus_slot;
714 static int ssb_bus_register(struct ssb_bus *bus,
715 ssb_invariants_func_t get_invariants,
716 unsigned long baseaddr)
720 spin_lock_init(&bus->bar_lock);
721 INIT_LIST_HEAD(&bus->list);
722 #ifdef CONFIG_SSB_EMBEDDED
723 spin_lock_init(&bus->gpio_lock);
726 /* Powerup the bus */
727 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
731 bus->busnumber = next_busnumber;
732 /* Scan for devices (cores) */
733 err = ssb_bus_scan(bus, baseaddr);
735 goto err_disable_xtal;
737 /* Init PCI-host device (if any) */
738 err = ssb_pci_init(bus);
741 /* Init PCMCIA-host device (if any) */
742 err = ssb_pcmcia_init(bus);
746 /* Initialize basic system devices (if available) */
747 err = ssb_bus_powerup(bus, 0);
749 goto err_pcmcia_exit;
750 ssb_chipcommon_init(&bus->chipco);
751 ssb_mipscore_init(&bus->mipscore);
752 err = ssb_fetch_invariants(bus, get_invariants);
754 ssb_bus_may_powerdown(bus);
755 goto err_pcmcia_exit;
757 ssb_bus_may_powerdown(bus);
759 /* Queue it for attach.
760 * See the comment at the ssb_is_early_boot definition. */
761 list_add_tail(&bus->list, &attach_queue);
762 if (!ssb_is_early_boot) {
763 /* This is not early boot, so we must attach the bus now */
764 err = ssb_attach_queued_buses();
775 list_del(&bus->list);
777 ssb_pcmcia_exit(bus);
784 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
788 #ifdef CONFIG_SSB_PCIHOST
789 int ssb_bus_pcibus_register(struct ssb_bus *bus,
790 struct pci_dev *host_pci)
794 bus->bustype = SSB_BUSTYPE_PCI;
795 bus->host_pci = host_pci;
796 bus->ops = &ssb_pci_ops;
798 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
800 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
801 "PCI device %s\n", host_pci->dev.bus_id);
806 EXPORT_SYMBOL(ssb_bus_pcibus_register);
807 #endif /* CONFIG_SSB_PCIHOST */
809 #ifdef CONFIG_SSB_PCMCIAHOST
810 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
811 struct pcmcia_device *pcmcia_dev,
812 unsigned long baseaddr)
816 bus->bustype = SSB_BUSTYPE_PCMCIA;
817 bus->host_pcmcia = pcmcia_dev;
818 bus->ops = &ssb_pcmcia_ops;
820 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
822 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
823 "PCMCIA device %s\n", pcmcia_dev->devname);
828 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
829 #endif /* CONFIG_SSB_PCMCIAHOST */
831 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
832 unsigned long baseaddr,
833 ssb_invariants_func_t get_invariants)
837 bus->bustype = SSB_BUSTYPE_SSB;
838 bus->ops = &ssb_ssb_ops;
840 err = ssb_bus_register(bus, get_invariants, baseaddr);
842 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
843 "address 0x%08lX\n", baseaddr);
849 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
851 drv->drv.name = drv->name;
852 drv->drv.bus = &ssb_bustype;
853 drv->drv.owner = owner;
855 return driver_register(&drv->drv);
857 EXPORT_SYMBOL(__ssb_driver_register);
859 void ssb_driver_unregister(struct ssb_driver *drv)
861 driver_unregister(&drv->drv);
863 EXPORT_SYMBOL(ssb_driver_unregister);
865 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
867 struct ssb_bus *bus = dev->bus;
868 struct ssb_device *ent;
871 for (i = 0; i < bus->nr_devices; i++) {
872 ent = &(bus->devices[i]);
873 if (ent->id.vendor != dev->id.vendor)
875 if (ent->id.coreid != dev->id.coreid)
878 ent->devtypedata = data;
881 EXPORT_SYMBOL(ssb_set_devtypedata);
883 static u32 clkfactor_f6_resolve(u32 v)
885 /* map the magic values */
887 case SSB_CHIPCO_CLK_F6_2:
889 case SSB_CHIPCO_CLK_F6_3:
891 case SSB_CHIPCO_CLK_F6_4:
893 case SSB_CHIPCO_CLK_F6_5:
895 case SSB_CHIPCO_CLK_F6_6:
897 case SSB_CHIPCO_CLK_F6_7:
903 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
904 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
906 u32 n1, n2, clock, m1, m2, m3, mc;
908 n1 = (n & SSB_CHIPCO_CLK_N1);
909 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
912 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
913 if (m & SSB_CHIPCO_CLK_T6_MMASK)
914 return SSB_CHIPCO_CLK_T6_M0;
915 return SSB_CHIPCO_CLK_T6_M1;
916 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
917 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
918 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
919 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
920 n1 = clkfactor_f6_resolve(n1);
921 n2 += SSB_CHIPCO_CLK_F5_BIAS;
923 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
924 n1 += SSB_CHIPCO_CLK_T2_BIAS;
925 n2 += SSB_CHIPCO_CLK_T2_BIAS;
926 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
927 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
929 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
936 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
937 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
938 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
941 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
946 m1 = (m & SSB_CHIPCO_CLK_M1);
947 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
948 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
949 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
952 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
953 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
954 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
955 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
956 m1 = clkfactor_f6_resolve(m1);
957 if ((plltype == SSB_PLLTYPE_1) ||
958 (plltype == SSB_PLLTYPE_3))
959 m2 += SSB_CHIPCO_CLK_F5_BIAS;
961 m2 = clkfactor_f6_resolve(m2);
962 m3 = clkfactor_f6_resolve(m3);
965 case SSB_CHIPCO_CLK_MC_BYPASS:
967 case SSB_CHIPCO_CLK_MC_M1:
969 case SSB_CHIPCO_CLK_MC_M1M2:
970 return (clock / (m1 * m2));
971 case SSB_CHIPCO_CLK_MC_M1M2M3:
972 return (clock / (m1 * m2 * m3));
973 case SSB_CHIPCO_CLK_MC_M1M3:
974 return (clock / (m1 * m3));
978 m1 += SSB_CHIPCO_CLK_T2_BIAS;
979 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
980 m3 += SSB_CHIPCO_CLK_T2_BIAS;
981 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
982 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
983 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
985 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
987 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
989 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
998 /* Get the current speed the backplane is running at */
999 u32 ssb_clockspeed(struct ssb_bus *bus)
1003 u32 clkctl_n, clkctl_m;
1005 if (ssb_extif_available(&bus->extif))
1006 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1007 &clkctl_n, &clkctl_m);
1008 else if (bus->chipco.dev)
1009 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1010 &clkctl_n, &clkctl_m);
1014 if (bus->chip_id == 0x5365) {
1017 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1018 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1024 EXPORT_SYMBOL(ssb_clockspeed);
1026 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1028 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1030 /* The REJECT bit changed position in TMSLOW between
1031 * Backplane revisions. */
1033 case SSB_IDLOW_SSBREV_22:
1034 return SSB_TMSLOW_REJECT_22;
1035 case SSB_IDLOW_SSBREV_23:
1036 return SSB_TMSLOW_REJECT_23;
1037 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
1038 case SSB_IDLOW_SSBREV_25: /* same here */
1039 case SSB_IDLOW_SSBREV_26: /* same here */
1040 case SSB_IDLOW_SSBREV_27: /* same here */
1041 return SSB_TMSLOW_REJECT_23; /* this is a guess */
1043 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1046 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
1049 int ssb_device_is_enabled(struct ssb_device *dev)
1054 reject = ssb_tmslow_reject_bitmask(dev);
1055 val = ssb_read32(dev, SSB_TMSLOW);
1056 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1058 return (val == SSB_TMSLOW_CLOCK);
1060 EXPORT_SYMBOL(ssb_device_is_enabled);
1062 static void ssb_flush_tmslow(struct ssb_device *dev)
1064 /* Make _really_ sure the device has finished the TMSLOW
1065 * register write transaction, as we risk running into
1066 * a machine check exception otherwise.
1067 * Do this by reading the register back to commit the
1068 * PCI write and delay an additional usec for the device
1069 * to react to the change. */
1070 ssb_read32(dev, SSB_TMSLOW);
1074 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1078 ssb_device_disable(dev, core_specific_flags);
1079 ssb_write32(dev, SSB_TMSLOW,
1080 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1081 SSB_TMSLOW_FGC | core_specific_flags);
1082 ssb_flush_tmslow(dev);
1084 /* Clear SERR if set. This is a hw bug workaround. */
1085 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1086 ssb_write32(dev, SSB_TMSHIGH, 0);
1088 val = ssb_read32(dev, SSB_IMSTATE);
1089 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1090 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1091 ssb_write32(dev, SSB_IMSTATE, val);
1094 ssb_write32(dev, SSB_TMSLOW,
1095 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1096 core_specific_flags);
1097 ssb_flush_tmslow(dev);
1099 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1100 core_specific_flags);
1101 ssb_flush_tmslow(dev);
1103 EXPORT_SYMBOL(ssb_device_enable);
1105 /* Wait for a bit in a register to get set or unset.
1106 * timeout is in units of ten-microseconds */
1107 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1108 int timeout, int set)
1113 for (i = 0; i < timeout; i++) {
1114 val = ssb_read32(dev, reg);
1119 if (!(val & bitmask))
1124 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1125 "register %04X to %s.\n",
1126 bitmask, reg, (set ? "set" : "clear"));
1131 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1135 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1138 reject = ssb_tmslow_reject_bitmask(dev);
1139 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1140 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1141 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1142 ssb_write32(dev, SSB_TMSLOW,
1143 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1144 reject | SSB_TMSLOW_RESET |
1145 core_specific_flags);
1146 ssb_flush_tmslow(dev);
1148 ssb_write32(dev, SSB_TMSLOW,
1149 reject | SSB_TMSLOW_RESET |
1150 core_specific_flags);
1151 ssb_flush_tmslow(dev);
1153 EXPORT_SYMBOL(ssb_device_disable);
1155 u32 ssb_dma_translation(struct ssb_device *dev)
1157 switch (dev->bus->bustype) {
1158 case SSB_BUSTYPE_SSB:
1159 case SSB_BUSTYPE_PCMCIA:
1161 case SSB_BUSTYPE_PCI:
1166 EXPORT_SYMBOL(ssb_dma_translation);
1168 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1170 struct device *dma_dev = ssb_dev->dma_dev;
1173 #ifdef CONFIG_SSB_PCIHOST
1174 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI) {
1175 err = pci_set_dma_mask(ssb_dev->bus->host_pci, mask);
1178 err = pci_set_consistent_dma_mask(ssb_dev->bus->host_pci, mask);
1182 dma_dev->coherent_dma_mask = mask;
1183 dma_dev->dma_mask = &dma_dev->coherent_dma_mask;
1187 EXPORT_SYMBOL(ssb_dma_set_mask);
1189 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1191 struct ssb_chipcommon *cc;
1194 /* On buses where more than one core may be working
1195 * at a time, we must not powerdown stuff if there are
1196 * still cores that may want to run. */
1197 if (bus->bustype == SSB_BUSTYPE_SSB)
1204 if (cc->dev->id.revision < 5)
1207 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1208 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1212 #ifdef CONFIG_SSB_DEBUG
1213 bus->powered_up = 0;
1217 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1220 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1222 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1224 struct ssb_chipcommon *cc;
1226 enum ssb_clkmode mode;
1228 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1232 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1233 ssb_chipco_set_clockmode(cc, mode);
1235 #ifdef CONFIG_SSB_DEBUG
1236 bus->powered_up = 1;
1240 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1243 EXPORT_SYMBOL(ssb_bus_powerup);
1245 u32 ssb_admatch_base(u32 adm)
1249 switch (adm & SSB_ADM_TYPE) {
1251 base = (adm & SSB_ADM_BASE0);
1254 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1255 base = (adm & SSB_ADM_BASE1);
1258 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1259 base = (adm & SSB_ADM_BASE2);
1267 EXPORT_SYMBOL(ssb_admatch_base);
1269 u32 ssb_admatch_size(u32 adm)
1273 switch (adm & SSB_ADM_TYPE) {
1275 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1278 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1279 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1282 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1283 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1288 size = (1 << (size + 1));
1292 EXPORT_SYMBOL(ssb_admatch_size);
1294 static int __init ssb_modinit(void)
1298 /* See the comment at the ssb_is_early_boot definition */
1299 ssb_is_early_boot = 0;
1300 err = bus_register(&ssb_bustype);
1304 /* Maybe we already registered some buses at early boot.
1305 * Check for this and attach them
1308 err = ssb_attach_queued_buses();
1311 bus_unregister(&ssb_bustype);
1313 err = b43_pci_ssb_bridge_init();
1315 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1316 "initialization failed\n");
1317 /* don't fail SSB init because of this */
1320 err = ssb_gige_init();
1322 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1323 "driver initialization failed\n");
1324 /* don't fail SSB init because of this */
1330 /* ssb must be initialized after PCI but before the ssb drivers.
1331 * That means we must use some initcall between subsys_initcall
1332 * and device_initcall. */
1333 fs_initcall(ssb_modinit);
1335 static void __exit ssb_modexit(void)
1338 b43_pci_ssb_bridge_exit();
1339 bus_unregister(&ssb_bustype);
1341 module_exit(ssb_modexit)