[ARM] S3C64XX: Setup functions for i2c bus 1.
[linux-2.6] / arch / ia64 / kvm / asm-offsets.c
1 /*
2  * asm-offsets.c Generate definitions needed by assembly language modules.
3  * This code generates raw asm output which is post-processed
4  * to extract and format the required data.
5  *
6  * Anthony Xu    <anthony.xu@intel.com>
7  * Xiantao Zhang <xiantao.zhang@intel.com>
8  * Copyright (c) 2007 Intel Corporation  KVM support.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms and conditions of the GNU General Public License,
12  * version 2, as published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
21  * Place - Suite 330, Boston, MA 02111-1307 USA.
22  *
23  */
24
25 #include <linux/autoconf.h>
26 #include <linux/kvm_host.h>
27
28 #include "vcpu.h"
29
30 #define task_struct kvm_vcpu
31
32 #define DEFINE(sym, val) \
33         asm volatile("\n->" #sym " (%0) " #val : : "i" (val))
34
35 #define BLANK() asm volatile("\n->" : :)
36
37 #define OFFSET(_sym, _str, _mem) \
38     DEFINE(_sym, offsetof(_str, _mem));
39
40 void foo(void)
41 {
42         DEFINE(VMM_TASK_SIZE, sizeof(struct kvm_vcpu));
43         DEFINE(VMM_PT_REGS_SIZE, sizeof(struct kvm_pt_regs));
44
45         BLANK();
46
47         DEFINE(VMM_VCPU_META_RR0_OFFSET,
48                         offsetof(struct kvm_vcpu, arch.metaphysical_rr0));
49         DEFINE(VMM_VCPU_META_SAVED_RR0_OFFSET,
50                         offsetof(struct kvm_vcpu,
51                                 arch.metaphysical_saved_rr0));
52         DEFINE(VMM_VCPU_VRR0_OFFSET,
53                         offsetof(struct kvm_vcpu, arch.vrr[0]));
54         DEFINE(VMM_VPD_IRR0_OFFSET,
55                         offsetof(struct vpd, irr[0]));
56         DEFINE(VMM_VCPU_ITC_CHECK_OFFSET,
57                         offsetof(struct kvm_vcpu, arch.itc_check));
58         DEFINE(VMM_VCPU_IRQ_CHECK_OFFSET,
59                         offsetof(struct kvm_vcpu, arch.irq_check));
60         DEFINE(VMM_VPD_VHPI_OFFSET,
61                         offsetof(struct vpd, vhpi));
62         DEFINE(VMM_VCPU_VSA_BASE_OFFSET,
63                         offsetof(struct kvm_vcpu, arch.vsa_base));
64         DEFINE(VMM_VCPU_VPD_OFFSET,
65                         offsetof(struct kvm_vcpu, arch.vpd));
66         DEFINE(VMM_VCPU_IRQ_CHECK,
67                         offsetof(struct kvm_vcpu, arch.irq_check));
68         DEFINE(VMM_VCPU_TIMER_PENDING,
69                         offsetof(struct kvm_vcpu, arch.timer_pending));
70         DEFINE(VMM_VCPU_META_SAVED_RR0_OFFSET,
71                         offsetof(struct kvm_vcpu, arch.metaphysical_saved_rr0));
72         DEFINE(VMM_VCPU_MODE_FLAGS_OFFSET,
73                         offsetof(struct kvm_vcpu, arch.mode_flags));
74         DEFINE(VMM_VCPU_ITC_OFS_OFFSET,
75                         offsetof(struct kvm_vcpu, arch.itc_offset));
76         DEFINE(VMM_VCPU_LAST_ITC_OFFSET,
77                         offsetof(struct kvm_vcpu, arch.last_itc));
78         DEFINE(VMM_VCPU_SAVED_GP_OFFSET,
79                         offsetof(struct kvm_vcpu, arch.saved_gp));
80
81         BLANK();
82
83         DEFINE(VMM_PT_REGS_B6_OFFSET,
84                                 offsetof(struct kvm_pt_regs, b6));
85         DEFINE(VMM_PT_REGS_B7_OFFSET,
86                                 offsetof(struct kvm_pt_regs, b7));
87         DEFINE(VMM_PT_REGS_AR_CSD_OFFSET,
88                                 offsetof(struct kvm_pt_regs, ar_csd));
89         DEFINE(VMM_PT_REGS_AR_SSD_OFFSET,
90                                 offsetof(struct kvm_pt_regs, ar_ssd));
91         DEFINE(VMM_PT_REGS_R8_OFFSET,
92                                 offsetof(struct kvm_pt_regs, r8));
93         DEFINE(VMM_PT_REGS_R9_OFFSET,
94                                 offsetof(struct kvm_pt_regs, r9));
95         DEFINE(VMM_PT_REGS_R10_OFFSET,
96                                 offsetof(struct kvm_pt_regs, r10));
97         DEFINE(VMM_PT_REGS_R11_OFFSET,
98                                 offsetof(struct kvm_pt_regs, r11));
99         DEFINE(VMM_PT_REGS_CR_IPSR_OFFSET,
100                                 offsetof(struct kvm_pt_regs, cr_ipsr));
101         DEFINE(VMM_PT_REGS_CR_IIP_OFFSET,
102                                 offsetof(struct kvm_pt_regs, cr_iip));
103         DEFINE(VMM_PT_REGS_CR_IFS_OFFSET,
104                                 offsetof(struct kvm_pt_regs, cr_ifs));
105         DEFINE(VMM_PT_REGS_AR_UNAT_OFFSET,
106                                 offsetof(struct kvm_pt_regs, ar_unat));
107         DEFINE(VMM_PT_REGS_AR_PFS_OFFSET,
108                                 offsetof(struct kvm_pt_regs, ar_pfs));
109         DEFINE(VMM_PT_REGS_AR_RSC_OFFSET,
110                                 offsetof(struct kvm_pt_regs, ar_rsc));
111         DEFINE(VMM_PT_REGS_AR_RNAT_OFFSET,
112                                 offsetof(struct kvm_pt_regs, ar_rnat));
113
114         DEFINE(VMM_PT_REGS_AR_BSPSTORE_OFFSET,
115                                 offsetof(struct kvm_pt_regs, ar_bspstore));
116         DEFINE(VMM_PT_REGS_PR_OFFSET,
117                                 offsetof(struct kvm_pt_regs, pr));
118         DEFINE(VMM_PT_REGS_B0_OFFSET,
119                                 offsetof(struct kvm_pt_regs, b0));
120         DEFINE(VMM_PT_REGS_LOADRS_OFFSET,
121                                 offsetof(struct kvm_pt_regs, loadrs));
122         DEFINE(VMM_PT_REGS_R1_OFFSET,
123                                 offsetof(struct kvm_pt_regs, r1));
124         DEFINE(VMM_PT_REGS_R12_OFFSET,
125                                 offsetof(struct kvm_pt_regs, r12));
126         DEFINE(VMM_PT_REGS_R13_OFFSET,
127                                 offsetof(struct kvm_pt_regs, r13));
128         DEFINE(VMM_PT_REGS_AR_FPSR_OFFSET,
129                                 offsetof(struct kvm_pt_regs, ar_fpsr));
130         DEFINE(VMM_PT_REGS_R15_OFFSET,
131                                 offsetof(struct kvm_pt_regs, r15));
132         DEFINE(VMM_PT_REGS_R14_OFFSET,
133                                 offsetof(struct kvm_pt_regs, r14));
134         DEFINE(VMM_PT_REGS_R2_OFFSET,
135                                 offsetof(struct kvm_pt_regs, r2));
136         DEFINE(VMM_PT_REGS_R3_OFFSET,
137                                 offsetof(struct kvm_pt_regs, r3));
138         DEFINE(VMM_PT_REGS_R16_OFFSET,
139                                 offsetof(struct kvm_pt_regs, r16));
140         DEFINE(VMM_PT_REGS_R17_OFFSET,
141                                 offsetof(struct kvm_pt_regs, r17));
142         DEFINE(VMM_PT_REGS_R18_OFFSET,
143                                 offsetof(struct kvm_pt_regs, r18));
144         DEFINE(VMM_PT_REGS_R19_OFFSET,
145                                 offsetof(struct kvm_pt_regs, r19));
146         DEFINE(VMM_PT_REGS_R20_OFFSET,
147                                 offsetof(struct kvm_pt_regs, r20));
148         DEFINE(VMM_PT_REGS_R21_OFFSET,
149                                 offsetof(struct kvm_pt_regs, r21));
150         DEFINE(VMM_PT_REGS_R22_OFFSET,
151                                 offsetof(struct kvm_pt_regs, r22));
152         DEFINE(VMM_PT_REGS_R23_OFFSET,
153                                 offsetof(struct kvm_pt_regs, r23));
154         DEFINE(VMM_PT_REGS_R24_OFFSET,
155                                 offsetof(struct kvm_pt_regs, r24));
156         DEFINE(VMM_PT_REGS_R25_OFFSET,
157                                 offsetof(struct kvm_pt_regs, r25));
158         DEFINE(VMM_PT_REGS_R26_OFFSET,
159                                 offsetof(struct kvm_pt_regs, r26));
160         DEFINE(VMM_PT_REGS_R27_OFFSET,
161                                 offsetof(struct kvm_pt_regs, r27));
162         DEFINE(VMM_PT_REGS_R28_OFFSET,
163                                 offsetof(struct kvm_pt_regs, r28));
164         DEFINE(VMM_PT_REGS_R29_OFFSET,
165                                 offsetof(struct kvm_pt_regs, r29));
166         DEFINE(VMM_PT_REGS_R30_OFFSET,
167                                 offsetof(struct kvm_pt_regs, r30));
168         DEFINE(VMM_PT_REGS_R31_OFFSET,
169                                 offsetof(struct kvm_pt_regs, r31));
170         DEFINE(VMM_PT_REGS_AR_CCV_OFFSET,
171                                 offsetof(struct kvm_pt_regs, ar_ccv));
172         DEFINE(VMM_PT_REGS_F6_OFFSET,
173                                 offsetof(struct kvm_pt_regs, f6));
174         DEFINE(VMM_PT_REGS_F7_OFFSET,
175                                 offsetof(struct kvm_pt_regs, f7));
176         DEFINE(VMM_PT_REGS_F8_OFFSET,
177                                 offsetof(struct kvm_pt_regs, f8));
178         DEFINE(VMM_PT_REGS_F9_OFFSET,
179                                 offsetof(struct kvm_pt_regs, f9));
180         DEFINE(VMM_PT_REGS_F10_OFFSET,
181                                 offsetof(struct kvm_pt_regs, f10));
182         DEFINE(VMM_PT_REGS_F11_OFFSET,
183                                 offsetof(struct kvm_pt_regs, f11));
184         DEFINE(VMM_PT_REGS_R4_OFFSET,
185                                 offsetof(struct kvm_pt_regs, r4));
186         DEFINE(VMM_PT_REGS_R5_OFFSET,
187                                 offsetof(struct kvm_pt_regs, r5));
188         DEFINE(VMM_PT_REGS_R6_OFFSET,
189                                 offsetof(struct kvm_pt_regs, r6));
190         DEFINE(VMM_PT_REGS_R7_OFFSET,
191                                 offsetof(struct kvm_pt_regs, r7));
192         DEFINE(VMM_PT_REGS_EML_UNAT_OFFSET,
193                                 offsetof(struct kvm_pt_regs, eml_unat));
194         DEFINE(VMM_VCPU_IIPA_OFFSET,
195                                 offsetof(struct kvm_vcpu, arch.cr_iipa));
196         DEFINE(VMM_VCPU_OPCODE_OFFSET,
197                                 offsetof(struct kvm_vcpu, arch.opcode));
198         DEFINE(VMM_VCPU_CAUSE_OFFSET, offsetof(struct kvm_vcpu, arch.cause));
199         DEFINE(VMM_VCPU_ISR_OFFSET,
200                                 offsetof(struct kvm_vcpu, arch.cr_isr));
201         DEFINE(VMM_PT_REGS_R16_SLOT,
202                                 (((offsetof(struct kvm_pt_regs, r16)
203                                 - sizeof(struct kvm_pt_regs)) >> 3) & 0x3f));
204         DEFINE(VMM_VCPU_MODE_FLAGS_OFFSET,
205                                 offsetof(struct kvm_vcpu, arch.mode_flags));
206         DEFINE(VMM_VCPU_GP_OFFSET, offsetof(struct kvm_vcpu, arch.__gp));
207         BLANK();
208
209         DEFINE(VMM_VPD_BASE_OFFSET, offsetof(struct kvm_vcpu, arch.vpd));
210         DEFINE(VMM_VPD_VIFS_OFFSET, offsetof(struct vpd, ifs));
211         DEFINE(VMM_VLSAPIC_INSVC_BASE_OFFSET,
212                         offsetof(struct kvm_vcpu, arch.insvc[0]));
213         DEFINE(VMM_VPD_VPTA_OFFSET, offsetof(struct vpd, pta));
214         DEFINE(VMM_VPD_VPSR_OFFSET, offsetof(struct vpd, vpsr));
215
216         DEFINE(VMM_CTX_R4_OFFSET, offsetof(union context, gr[4]));
217         DEFINE(VMM_CTX_R5_OFFSET, offsetof(union context, gr[5]));
218         DEFINE(VMM_CTX_R12_OFFSET, offsetof(union context, gr[12]));
219         DEFINE(VMM_CTX_R13_OFFSET, offsetof(union context, gr[13]));
220         DEFINE(VMM_CTX_KR0_OFFSET, offsetof(union context, ar[0]));
221         DEFINE(VMM_CTX_KR1_OFFSET, offsetof(union context, ar[1]));
222         DEFINE(VMM_CTX_B0_OFFSET, offsetof(union context, br[0]));
223         DEFINE(VMM_CTX_B1_OFFSET, offsetof(union context, br[1]));
224         DEFINE(VMM_CTX_B2_OFFSET, offsetof(union context, br[2]));
225         DEFINE(VMM_CTX_RR0_OFFSET, offsetof(union context, rr[0]));
226         DEFINE(VMM_CTX_RSC_OFFSET, offsetof(union context, ar[16]));
227         DEFINE(VMM_CTX_BSPSTORE_OFFSET, offsetof(union context, ar[18]));
228         DEFINE(VMM_CTX_RNAT_OFFSET, offsetof(union context, ar[19]));
229         DEFINE(VMM_CTX_FCR_OFFSET, offsetof(union context, ar[21]));
230         DEFINE(VMM_CTX_EFLAG_OFFSET, offsetof(union context, ar[24]));
231         DEFINE(VMM_CTX_CFLG_OFFSET, offsetof(union context, ar[27]));
232         DEFINE(VMM_CTX_FSR_OFFSET, offsetof(union context, ar[28]));
233         DEFINE(VMM_CTX_FIR_OFFSET, offsetof(union context, ar[29]));
234         DEFINE(VMM_CTX_FDR_OFFSET, offsetof(union context, ar[30]));
235         DEFINE(VMM_CTX_UNAT_OFFSET, offsetof(union context, ar[36]));
236         DEFINE(VMM_CTX_FPSR_OFFSET, offsetof(union context, ar[40]));
237         DEFINE(VMM_CTX_PFS_OFFSET, offsetof(union context, ar[64]));
238         DEFINE(VMM_CTX_LC_OFFSET, offsetof(union context, ar[65]));
239         DEFINE(VMM_CTX_DCR_OFFSET, offsetof(union context, cr[0]));
240         DEFINE(VMM_CTX_IVA_OFFSET, offsetof(union context, cr[2]));
241         DEFINE(VMM_CTX_PTA_OFFSET, offsetof(union context, cr[8]));
242         DEFINE(VMM_CTX_IBR0_OFFSET, offsetof(union context, ibr[0]));
243         DEFINE(VMM_CTX_DBR0_OFFSET, offsetof(union context, dbr[0]));
244         DEFINE(VMM_CTX_F2_OFFSET, offsetof(union context, fr[2]));
245         DEFINE(VMM_CTX_F3_OFFSET, offsetof(union context, fr[3]));
246         DEFINE(VMM_CTX_F32_OFFSET, offsetof(union context, fr[32]));
247         DEFINE(VMM_CTX_F33_OFFSET, offsetof(union context, fr[33]));
248         DEFINE(VMM_CTX_PKR0_OFFSET, offsetof(union context, pkr[0]));
249         DEFINE(VMM_CTX_PSR_OFFSET, offsetof(union context, psr));
250         BLANK();
251 }