2 * linux/drivers/mmc/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/mmc/host.h>
30 #include <asm/scatterlist.h>
31 #include <asm/sizes.h>
33 #include <asm/arch/pxa-regs.h>
34 #include <asm/arch/mmc.h>
38 #define DRIVER_NAME "pxa2xx-mci"
52 unsigned int power_mode;
53 struct pxamci_platform_data *pdata;
55 struct mmc_request *mrq;
56 struct mmc_command *cmd;
57 struct mmc_data *data;
60 struct pxa_dma_desc *sg_cpu;
66 static void pxamci_stop_clock(struct pxamci_host *host)
68 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
69 unsigned long timeout = 10000;
72 writel(STOP_CLOCK, host->base + MMC_STRPCL);
75 v = readl(host->base + MMC_STAT);
76 if (!(v & STAT_CLK_EN))
82 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
86 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
90 spin_lock_irqsave(&host->lock, flags);
92 writel(host->imask, host->base + MMC_I_MASK);
93 spin_unlock_irqrestore(&host->lock, flags);
96 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
100 spin_lock_irqsave(&host->lock, flags);
102 writel(host->imask, host->base + MMC_I_MASK);
103 spin_unlock_irqrestore(&host->lock, flags);
106 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
108 unsigned int nob = data->blocks;
109 unsigned long long clks;
110 unsigned int timeout;
116 if (data->flags & MMC_DATA_STREAM)
119 writel(nob, host->base + MMC_NOB);
120 writel(data->blksz, host->base + MMC_BLKLEN);
122 clks = (unsigned long long)data->timeout_ns * CLOCKRATE;
123 do_div(clks, 1000000000UL);
124 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
125 writel((timeout + 255) / 256, host->base + MMC_RDTO);
127 if (data->flags & MMC_DATA_READ) {
128 host->dma_dir = DMA_FROM_DEVICE;
129 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
131 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
133 host->dma_dir = DMA_TO_DEVICE;
134 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
136 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
139 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
141 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
144 for (i = 0; i < host->dma_len; i++) {
145 if (data->flags & MMC_DATA_READ) {
146 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
147 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
149 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
150 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
152 host->sg_cpu[i].dcmd = dcmd | sg_dma_len(&data->sg[i]);
153 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
154 sizeof(struct pxa_dma_desc);
156 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
159 DDADR(host->dma) = host->sg_dma;
160 DCSR(host->dma) = DCSR_RUN;
163 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
165 WARN_ON(host->cmd != NULL);
168 if (cmd->flags & MMC_RSP_BUSY)
171 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
172 switch (RSP_TYPE(mmc_resp_type(cmd))) {
173 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
174 cmdat |= CMDAT_RESP_SHORT;
176 case RSP_TYPE(MMC_RSP_R3):
177 cmdat |= CMDAT_RESP_R3;
179 case RSP_TYPE(MMC_RSP_R2):
180 cmdat |= CMDAT_RESP_R2;
186 writel(cmd->opcode, host->base + MMC_CMD);
187 writel(cmd->arg >> 16, host->base + MMC_ARGH);
188 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
189 writel(cmdat, host->base + MMC_CMDAT);
190 writel(host->clkrt, host->base + MMC_CLKRT);
192 writel(START_CLOCK, host->base + MMC_STRPCL);
194 pxamci_enable_irq(host, END_CMD_RES);
197 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
202 mmc_request_done(host->mmc, mrq);
205 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
207 struct mmc_command *cmd = host->cmd;
217 * Did I mention this is Sick. We always need to
218 * discard the upper 8 bits of the first 16-bit word.
220 v = readl(host->base + MMC_RES) & 0xffff;
221 for (i = 0; i < 4; i++) {
222 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
223 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
224 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
228 if (stat & STAT_TIME_OUT_RESPONSE) {
229 cmd->error = MMC_ERR_TIMEOUT;
230 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
233 * workaround for erratum #42:
234 * Intel PXA27x Family Processor Specification Update Rev 001
236 if (cmd->opcode == MMC_ALL_SEND_CID ||
237 cmd->opcode == MMC_SEND_CSD ||
238 cmd->opcode == MMC_SEND_CID) {
239 /* a bogus CRC error can appear if the msb of
240 the 15 byte response is a one */
241 if ((cmd->resp[0] & 0x80000000) == 0)
242 cmd->error = MMC_ERR_BADCRC;
244 pr_debug("ignoring CRC from command %d - *risky*\n",cmd->opcode);
247 cmd->error = MMC_ERR_BADCRC;
251 pxamci_disable_irq(host, END_CMD_RES);
252 if (host->data && cmd->error == MMC_ERR_NONE) {
253 pxamci_enable_irq(host, DATA_TRAN_DONE);
255 pxamci_finish_request(host, host->mrq);
261 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
263 struct mmc_data *data = host->data;
269 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
272 if (stat & STAT_READ_TIME_OUT)
273 data->error = MMC_ERR_TIMEOUT;
274 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
275 data->error = MMC_ERR_BADCRC;
278 * There appears to be a hardware design bug here. There seems to
279 * be no way to find out how much data was transferred to the card.
280 * This means that if there was an error on any block, we mark all
281 * data blocks as being in error.
283 if (data->error == MMC_ERR_NONE)
284 data->bytes_xfered = data->blocks * data->blksz;
286 data->bytes_xfered = 0;
288 pxamci_disable_irq(host, DATA_TRAN_DONE);
291 if (host->mrq->stop) {
292 pxamci_stop_clock(host);
293 pxamci_start_cmd(host, host->mrq->stop, 0);
295 pxamci_finish_request(host, host->mrq);
301 static irqreturn_t pxamci_irq(int irq, void *devid)
303 struct pxamci_host *host = devid;
307 ireg = readl(host->base + MMC_I_REG);
310 unsigned stat = readl(host->base + MMC_STAT);
312 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
314 if (ireg & END_CMD_RES)
315 handled |= pxamci_cmd_done(host, stat);
316 if (ireg & DATA_TRAN_DONE)
317 handled |= pxamci_data_done(host, stat);
320 return IRQ_RETVAL(handled);
323 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
325 struct pxamci_host *host = mmc_priv(mmc);
328 WARN_ON(host->mrq != NULL);
332 pxamci_stop_clock(host);
335 host->cmdat &= ~CMDAT_INIT;
338 pxamci_setup_data(host, mrq->data);
340 cmdat &= ~CMDAT_BUSY;
341 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
342 if (mrq->data->flags & MMC_DATA_WRITE)
343 cmdat |= CMDAT_WRITE;
345 if (mrq->data->flags & MMC_DATA_STREAM)
346 cmdat |= CMDAT_STREAM;
349 pxamci_start_cmd(host, mrq->cmd, cmdat);
352 static int pxamci_get_ro(struct mmc_host *mmc)
354 struct pxamci_host *host = mmc_priv(mmc);
356 if (host->pdata && host->pdata->get_ro)
357 return host->pdata->get_ro(mmc_dev(mmc));
358 /* Host doesn't support read only detection so assume writeable */
362 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
364 struct pxamci_host *host = mmc_priv(mmc);
367 unsigned int clk = CLOCKRATE / ios->clock;
368 if (CLOCKRATE / clk > ios->clock)
370 host->clkrt = fls(clk) - 1;
371 pxa_set_cken(CKEN12_MMC, 1);
374 * we write clkrt on the next command
377 pxamci_stop_clock(host);
378 pxa_set_cken(CKEN12_MMC, 0);
381 if (host->power_mode != ios->power_mode) {
382 host->power_mode = ios->power_mode;
384 if (host->pdata && host->pdata->setpower)
385 host->pdata->setpower(mmc_dev(mmc), ios->vdd);
387 if (ios->power_mode == MMC_POWER_ON)
388 host->cmdat |= CMDAT_INIT;
391 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
392 host->clkrt, host->cmdat);
395 static const struct mmc_host_ops pxamci_ops = {
396 .request = pxamci_request,
397 .get_ro = pxamci_get_ro,
398 .set_ios = pxamci_set_ios,
401 static void pxamci_dma_irq(int dma, void *devid)
403 printk(KERN_ERR "DMA%d: IRQ???\n", dma);
404 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
407 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
409 struct pxamci_host *host = mmc_priv(devid);
411 mmc_detect_change(devid, host->pdata->detect_delay);
415 static int pxamci_probe(struct platform_device *pdev)
417 struct mmc_host *mmc;
418 struct pxamci_host *host = NULL;
422 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
423 irq = platform_get_irq(pdev, 0);
427 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
431 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
437 mmc->ops = &pxamci_ops;
438 mmc->f_min = CLOCKRATE_MIN;
439 mmc->f_max = CLOCKRATE_MAX;
442 * We can do SG-DMA, but we don't because we never know how much
443 * data we successfully wrote to the card.
445 mmc->max_phys_segs = NR_SG;
448 * Our hardware DMA can handle a maximum of one page per SG entry.
450 mmc->max_seg_size = PAGE_SIZE;
453 * Block length register is 10 bits.
455 mmc->max_blk_size = 1023;
458 * Block count register is 16 bits.
460 mmc->max_blk_count = 65535;
462 host = mmc_priv(mmc);
465 host->pdata = pdev->dev.platform_data;
466 mmc->ocr_avail = host->pdata ?
467 host->pdata->ocr_mask :
468 MMC_VDD_32_33|MMC_VDD_33_34;
470 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
476 spin_lock_init(&host->lock);
479 host->imask = MMC_I_MASK_ALL;
481 host->base = ioremap(r->start, SZ_4K);
488 * Ensure that the host controller is shut down, and setup
491 pxamci_stop_clock(host);
492 writel(0, host->base + MMC_SPI);
493 writel(64, host->base + MMC_RESTO);
494 writel(host->imask, host->base + MMC_I_MASK);
496 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
497 pxamci_dma_irq, host);
503 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
507 platform_set_drvdata(pdev, mmc);
509 if (host->pdata && host->pdata->init)
510 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
519 pxa_free_dma(host->dma);
523 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
531 static int pxamci_remove(struct platform_device *pdev)
533 struct mmc_host *mmc = platform_get_drvdata(pdev);
535 platform_set_drvdata(pdev, NULL);
538 struct pxamci_host *host = mmc_priv(mmc);
540 if (host->pdata && host->pdata->exit)
541 host->pdata->exit(&pdev->dev, mmc);
543 mmc_remove_host(mmc);
545 pxamci_stop_clock(host);
546 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
547 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
548 host->base + MMC_I_MASK);
553 free_irq(host->irq, host);
554 pxa_free_dma(host->dma);
556 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
558 release_resource(host->res);
566 static int pxamci_suspend(struct platform_device *dev, pm_message_t state)
568 struct mmc_host *mmc = platform_get_drvdata(dev);
572 ret = mmc_suspend_host(mmc, state);
577 static int pxamci_resume(struct platform_device *dev)
579 struct mmc_host *mmc = platform_get_drvdata(dev);
583 ret = mmc_resume_host(mmc);
588 #define pxamci_suspend NULL
589 #define pxamci_resume NULL
592 static struct platform_driver pxamci_driver = {
593 .probe = pxamci_probe,
594 .remove = pxamci_remove,
595 .suspend = pxamci_suspend,
596 .resume = pxamci_resume,
602 static int __init pxamci_init(void)
604 return platform_driver_register(&pxamci_driver);
607 static void __exit pxamci_exit(void)
609 platform_driver_unregister(&pxamci_driver);
612 module_init(pxamci_init);
613 module_exit(pxamci_exit);
615 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
616 MODULE_LICENSE("GPL");