1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 /* ethtool support for e1000 */
33 #include <asm/uaccess.h>
35 extern int e1000_up(struct e1000_adapter *adapter);
36 extern void e1000_down(struct e1000_adapter *adapter);
37 extern void e1000_reinit_locked(struct e1000_adapter *adapter);
38 extern void e1000_reset(struct e1000_adapter *adapter);
39 extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
40 extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
41 extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
42 extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
43 extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
44 extern void e1000_update_stats(struct e1000_adapter *adapter);
48 char stat_string[ETH_GSTRING_LEN];
53 #define E1000_STAT(m) FIELD_SIZEOF(struct e1000_adapter, m), \
54 offsetof(struct e1000_adapter, m)
55 static const struct e1000_stats e1000_gstrings_stats[] = {
56 { "rx_packets", E1000_STAT(stats.gprc) },
57 { "tx_packets", E1000_STAT(stats.gptc) },
58 { "rx_bytes", E1000_STAT(stats.gorcl) },
59 { "tx_bytes", E1000_STAT(stats.gotcl) },
60 { "rx_broadcast", E1000_STAT(stats.bprc) },
61 { "tx_broadcast", E1000_STAT(stats.bptc) },
62 { "rx_multicast", E1000_STAT(stats.mprc) },
63 { "tx_multicast", E1000_STAT(stats.mptc) },
64 { "rx_errors", E1000_STAT(stats.rxerrc) },
65 { "tx_errors", E1000_STAT(stats.txerrc) },
66 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
67 { "multicast", E1000_STAT(stats.mprc) },
68 { "collisions", E1000_STAT(stats.colc) },
69 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
70 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
71 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
72 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
73 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
74 { "rx_missed_errors", E1000_STAT(stats.mpc) },
75 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
76 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
77 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
78 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
79 { "tx_window_errors", E1000_STAT(stats.latecol) },
80 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
81 { "tx_deferred_ok", E1000_STAT(stats.dc) },
82 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
83 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
84 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
85 { "tx_restart_queue", E1000_STAT(restart_queue) },
86 { "rx_long_length_errors", E1000_STAT(stats.roc) },
87 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
88 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
89 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
90 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
91 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
92 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
93 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
94 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
95 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
96 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
97 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
98 { "rx_header_split", E1000_STAT(rx_hdr_split) },
99 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
100 { "tx_smbus", E1000_STAT(stats.mgptc) },
101 { "rx_smbus", E1000_STAT(stats.mgprc) },
102 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
105 #define E1000_QUEUE_STATS_LEN 0
106 #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
107 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
108 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
109 "Register test (offline)", "Eeprom test (offline)",
110 "Interrupt test (offline)", "Loopback test (offline)",
111 "Link test (on/offline)"
113 #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
116 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
118 struct e1000_adapter *adapter = netdev_priv(netdev);
119 struct e1000_hw *hw = &adapter->hw;
121 if (hw->media_type == e1000_media_type_copper) {
123 ecmd->supported = (SUPPORTED_10baseT_Half |
124 SUPPORTED_10baseT_Full |
125 SUPPORTED_100baseT_Half |
126 SUPPORTED_100baseT_Full |
127 SUPPORTED_1000baseT_Full|
130 if (hw->phy_type == e1000_phy_ife)
131 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
132 ecmd->advertising = ADVERTISED_TP;
134 if (hw->autoneg == 1) {
135 ecmd->advertising |= ADVERTISED_Autoneg;
136 /* the e1000 autoneg seems to match ethtool nicely */
137 ecmd->advertising |= hw->autoneg_advertised;
140 ecmd->port = PORT_TP;
141 ecmd->phy_address = hw->phy_addr;
143 if (hw->mac_type == e1000_82543)
144 ecmd->transceiver = XCVR_EXTERNAL;
146 ecmd->transceiver = XCVR_INTERNAL;
149 ecmd->supported = (SUPPORTED_1000baseT_Full |
153 ecmd->advertising = (ADVERTISED_1000baseT_Full |
157 ecmd->port = PORT_FIBRE;
159 if (hw->mac_type >= e1000_82545)
160 ecmd->transceiver = XCVR_INTERNAL;
162 ecmd->transceiver = XCVR_EXTERNAL;
165 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
167 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
168 &adapter->link_duplex);
169 ecmd->speed = adapter->link_speed;
171 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
172 * and HALF_DUPLEX != DUPLEX_HALF */
174 if (adapter->link_duplex == FULL_DUPLEX)
175 ecmd->duplex = DUPLEX_FULL;
177 ecmd->duplex = DUPLEX_HALF;
183 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
184 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
189 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
191 struct e1000_adapter *adapter = netdev_priv(netdev);
192 struct e1000_hw *hw = &adapter->hw;
194 /* When SoL/IDER sessions are active, autoneg/speed/duplex
195 * cannot be changed */
196 if (e1000_check_phy_reset_block(hw)) {
197 DPRINTK(DRV, ERR, "Cannot change link characteristics "
198 "when SoL/IDER is active.\n");
202 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
205 if (ecmd->autoneg == AUTONEG_ENABLE) {
207 if (hw->media_type == e1000_media_type_fiber)
208 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
212 hw->autoneg_advertised = ecmd->advertising |
215 ecmd->advertising = hw->autoneg_advertised;
217 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
218 clear_bit(__E1000_RESETTING, &adapter->flags);
224 if (netif_running(adapter->netdev)) {
228 e1000_reset(adapter);
230 clear_bit(__E1000_RESETTING, &adapter->flags);
235 e1000_get_pauseparam(struct net_device *netdev,
236 struct ethtool_pauseparam *pause)
238 struct e1000_adapter *adapter = netdev_priv(netdev);
239 struct e1000_hw *hw = &adapter->hw;
242 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
244 if (hw->fc == E1000_FC_RX_PAUSE)
246 else if (hw->fc == E1000_FC_TX_PAUSE)
248 else if (hw->fc == E1000_FC_FULL) {
255 e1000_set_pauseparam(struct net_device *netdev,
256 struct ethtool_pauseparam *pause)
258 struct e1000_adapter *adapter = netdev_priv(netdev);
259 struct e1000_hw *hw = &adapter->hw;
262 adapter->fc_autoneg = pause->autoneg;
264 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
267 if (pause->rx_pause && pause->tx_pause)
268 hw->fc = E1000_FC_FULL;
269 else if (pause->rx_pause && !pause->tx_pause)
270 hw->fc = E1000_FC_RX_PAUSE;
271 else if (!pause->rx_pause && pause->tx_pause)
272 hw->fc = E1000_FC_TX_PAUSE;
273 else if (!pause->rx_pause && !pause->tx_pause)
274 hw->fc = E1000_FC_NONE;
276 hw->original_fc = hw->fc;
278 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
279 if (netif_running(adapter->netdev)) {
283 e1000_reset(adapter);
285 retval = ((hw->media_type == e1000_media_type_fiber) ?
286 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
288 clear_bit(__E1000_RESETTING, &adapter->flags);
293 e1000_get_rx_csum(struct net_device *netdev)
295 struct e1000_adapter *adapter = netdev_priv(netdev);
296 return adapter->rx_csum;
300 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
302 struct e1000_adapter *adapter = netdev_priv(netdev);
303 adapter->rx_csum = data;
305 if (netif_running(netdev))
306 e1000_reinit_locked(adapter);
308 e1000_reset(adapter);
313 e1000_get_tx_csum(struct net_device *netdev)
315 return (netdev->features & NETIF_F_HW_CSUM) != 0;
319 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
321 struct e1000_adapter *adapter = netdev_priv(netdev);
323 if (adapter->hw.mac_type < e1000_82543) {
330 netdev->features |= NETIF_F_HW_CSUM;
332 netdev->features &= ~NETIF_F_HW_CSUM;
338 e1000_set_tso(struct net_device *netdev, uint32_t data)
340 struct e1000_adapter *adapter = netdev_priv(netdev);
341 if ((adapter->hw.mac_type < e1000_82544) ||
342 (adapter->hw.mac_type == e1000_82547))
343 return data ? -EINVAL : 0;
346 netdev->features |= NETIF_F_TSO;
348 netdev->features &= ~NETIF_F_TSO;
351 netdev->features |= NETIF_F_TSO6;
353 netdev->features &= ~NETIF_F_TSO6;
355 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
356 adapter->tso_force = true;
361 e1000_get_msglevel(struct net_device *netdev)
363 struct e1000_adapter *adapter = netdev_priv(netdev);
364 return adapter->msg_enable;
368 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
370 struct e1000_adapter *adapter = netdev_priv(netdev);
371 adapter->msg_enable = data;
375 e1000_get_regs_len(struct net_device *netdev)
377 #define E1000_REGS_LEN 32
378 return E1000_REGS_LEN * sizeof(uint32_t);
382 e1000_get_regs(struct net_device *netdev,
383 struct ethtool_regs *regs, void *p)
385 struct e1000_adapter *adapter = netdev_priv(netdev);
386 struct e1000_hw *hw = &adapter->hw;
387 uint32_t *regs_buff = p;
390 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
392 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
394 regs_buff[0] = E1000_READ_REG(hw, CTRL);
395 regs_buff[1] = E1000_READ_REG(hw, STATUS);
397 regs_buff[2] = E1000_READ_REG(hw, RCTL);
398 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
399 regs_buff[4] = E1000_READ_REG(hw, RDH);
400 regs_buff[5] = E1000_READ_REG(hw, RDT);
401 regs_buff[6] = E1000_READ_REG(hw, RDTR);
403 regs_buff[7] = E1000_READ_REG(hw, TCTL);
404 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
405 regs_buff[9] = E1000_READ_REG(hw, TDH);
406 regs_buff[10] = E1000_READ_REG(hw, TDT);
407 regs_buff[11] = E1000_READ_REG(hw, TIDV);
409 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
410 if (hw->phy_type == e1000_phy_igp) {
411 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
412 IGP01E1000_PHY_AGC_A);
413 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
414 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
415 regs_buff[13] = (uint32_t)phy_data; /* cable length */
416 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
417 IGP01E1000_PHY_AGC_B);
418 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
419 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
420 regs_buff[14] = (uint32_t)phy_data; /* cable length */
421 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
422 IGP01E1000_PHY_AGC_C);
423 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
424 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
425 regs_buff[15] = (uint32_t)phy_data; /* cable length */
426 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
427 IGP01E1000_PHY_AGC_D);
428 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
429 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
430 regs_buff[16] = (uint32_t)phy_data; /* cable length */
431 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
432 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
433 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
434 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
435 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
436 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
437 IGP01E1000_PHY_PCS_INIT_REG);
438 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
439 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
440 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
441 regs_buff[20] = 0; /* polarity correction enabled (always) */
442 regs_buff[22] = 0; /* phy receive errors (unavailable) */
443 regs_buff[23] = regs_buff[18]; /* mdix mode */
444 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
446 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
447 regs_buff[13] = (uint32_t)phy_data; /* cable length */
448 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
449 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
450 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
451 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
452 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
453 regs_buff[18] = regs_buff[13]; /* cable polarity */
454 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
455 regs_buff[20] = regs_buff[17]; /* polarity correction */
456 /* phy receive errors */
457 regs_buff[22] = adapter->phy_stats.receive_errors;
458 regs_buff[23] = regs_buff[13]; /* mdix mode */
460 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
461 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
462 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
463 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
464 if (hw->mac_type >= e1000_82540 &&
465 hw->mac_type < e1000_82571 &&
466 hw->media_type == e1000_media_type_copper) {
467 regs_buff[26] = E1000_READ_REG(hw, MANC);
472 e1000_get_eeprom_len(struct net_device *netdev)
474 struct e1000_adapter *adapter = netdev_priv(netdev);
475 return adapter->hw.eeprom.word_size * 2;
479 e1000_get_eeprom(struct net_device *netdev,
480 struct ethtool_eeprom *eeprom, uint8_t *bytes)
482 struct e1000_adapter *adapter = netdev_priv(netdev);
483 struct e1000_hw *hw = &adapter->hw;
484 uint16_t *eeprom_buff;
485 int first_word, last_word;
489 if (eeprom->len == 0)
492 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
494 first_word = eeprom->offset >> 1;
495 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
497 eeprom_buff = kmalloc(sizeof(uint16_t) *
498 (last_word - first_word + 1), GFP_KERNEL);
502 if (hw->eeprom.type == e1000_eeprom_spi)
503 ret_val = e1000_read_eeprom(hw, first_word,
504 last_word - first_word + 1,
507 for (i = 0; i < last_word - first_word + 1; i++)
508 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
513 /* Device's eeprom is always little-endian, word addressable */
514 for (i = 0; i < last_word - first_word + 1; i++)
515 le16_to_cpus(&eeprom_buff[i]);
517 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
525 e1000_set_eeprom(struct net_device *netdev,
526 struct ethtool_eeprom *eeprom, uint8_t *bytes)
528 struct e1000_adapter *adapter = netdev_priv(netdev);
529 struct e1000_hw *hw = &adapter->hw;
530 uint16_t *eeprom_buff;
532 int max_len, first_word, last_word, ret_val = 0;
535 if (eeprom->len == 0)
538 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
541 max_len = hw->eeprom.word_size * 2;
543 first_word = eeprom->offset >> 1;
544 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
545 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
549 ptr = (void *)eeprom_buff;
551 if (eeprom->offset & 1) {
552 /* need read/modify/write of first changed EEPROM word */
553 /* only the second byte of the word is being modified */
554 ret_val = e1000_read_eeprom(hw, first_word, 1,
558 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
559 /* need read/modify/write of last changed EEPROM word */
560 /* only the first byte of the word is being modified */
561 ret_val = e1000_read_eeprom(hw, last_word, 1,
562 &eeprom_buff[last_word - first_word]);
565 /* Device's eeprom is always little-endian, word addressable */
566 for (i = 0; i < last_word - first_word + 1; i++)
567 le16_to_cpus(&eeprom_buff[i]);
569 memcpy(ptr, bytes, eeprom->len);
571 for (i = 0; i < last_word - first_word + 1; i++)
572 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
574 ret_val = e1000_write_eeprom(hw, first_word,
575 last_word - first_word + 1, eeprom_buff);
577 /* Update the checksum over the first part of the EEPROM if needed
578 * and flush shadow RAM for 82573 conrollers */
579 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
580 (hw->mac_type == e1000_82573)))
581 e1000_update_eeprom_checksum(hw);
588 e1000_get_drvinfo(struct net_device *netdev,
589 struct ethtool_drvinfo *drvinfo)
591 struct e1000_adapter *adapter = netdev_priv(netdev);
592 char firmware_version[32];
593 uint16_t eeprom_data;
595 strncpy(drvinfo->driver, e1000_driver_name, 32);
596 strncpy(drvinfo->version, e1000_driver_version, 32);
598 /* EEPROM image version # is reported as firmware version # for
599 * 8257{1|2|3} controllers */
600 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
601 switch (adapter->hw.mac_type) {
605 case e1000_80003es2lan:
607 sprintf(firmware_version, "%d.%d-%d",
608 (eeprom_data & 0xF000) >> 12,
609 (eeprom_data & 0x0FF0) >> 4,
610 eeprom_data & 0x000F);
613 sprintf(firmware_version, "N/A");
616 strncpy(drvinfo->fw_version, firmware_version, 32);
617 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
618 drvinfo->regdump_len = e1000_get_regs_len(netdev);
619 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
623 e1000_get_ringparam(struct net_device *netdev,
624 struct ethtool_ringparam *ring)
626 struct e1000_adapter *adapter = netdev_priv(netdev);
627 e1000_mac_type mac_type = adapter->hw.mac_type;
628 struct e1000_tx_ring *txdr = adapter->tx_ring;
629 struct e1000_rx_ring *rxdr = adapter->rx_ring;
631 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
633 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
635 ring->rx_mini_max_pending = 0;
636 ring->rx_jumbo_max_pending = 0;
637 ring->rx_pending = rxdr->count;
638 ring->tx_pending = txdr->count;
639 ring->rx_mini_pending = 0;
640 ring->rx_jumbo_pending = 0;
644 e1000_set_ringparam(struct net_device *netdev,
645 struct ethtool_ringparam *ring)
647 struct e1000_adapter *adapter = netdev_priv(netdev);
648 e1000_mac_type mac_type = adapter->hw.mac_type;
649 struct e1000_tx_ring *txdr, *tx_old;
650 struct e1000_rx_ring *rxdr, *rx_old;
653 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
656 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
659 if (netif_running(adapter->netdev))
662 tx_old = adapter->tx_ring;
663 rx_old = adapter->rx_ring;
666 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
670 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
674 adapter->tx_ring = txdr;
675 adapter->rx_ring = rxdr;
677 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
678 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
679 E1000_MAX_RXD : E1000_MAX_82544_RXD));
680 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
682 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
683 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
684 E1000_MAX_TXD : E1000_MAX_82544_TXD));
685 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
687 for (i = 0; i < adapter->num_tx_queues; i++)
688 txdr[i].count = txdr->count;
689 for (i = 0; i < adapter->num_rx_queues; i++)
690 rxdr[i].count = rxdr->count;
692 if (netif_running(adapter->netdev)) {
693 /* Try to get new resources before deleting old */
694 if ((err = e1000_setup_all_rx_resources(adapter)))
696 if ((err = e1000_setup_all_tx_resources(adapter)))
699 /* save the new, restore the old in order to free it,
700 * then restore the new back again */
702 adapter->rx_ring = rx_old;
703 adapter->tx_ring = tx_old;
704 e1000_free_all_rx_resources(adapter);
705 e1000_free_all_tx_resources(adapter);
708 adapter->rx_ring = rxdr;
709 adapter->tx_ring = txdr;
710 if ((err = e1000_up(adapter)))
714 clear_bit(__E1000_RESETTING, &adapter->flags);
717 e1000_free_all_rx_resources(adapter);
719 adapter->rx_ring = rx_old;
720 adapter->tx_ring = tx_old;
727 clear_bit(__E1000_RESETTING, &adapter->flags);
731 static bool reg_pattern_test(struct e1000_adapter *adapter, uint64_t *data,
732 int reg, uint32_t mask, uint32_t write)
734 static const uint32_t test[] =
735 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
736 uint8_t __iomem *address = adapter->hw.hw_addr + reg;
740 for (i = 0; i < ARRAY_SIZE(test); i++) {
741 writel(write & test[i], address);
742 read = readl(address);
743 if (read != (write & test[i] & mask)) {
744 DPRINTK(DRV, ERR, "pattern test reg %04X failed: "
745 "got 0x%08X expected 0x%08X\n",
746 reg, read, (write & test[i] & mask));
754 static bool reg_set_and_check(struct e1000_adapter *adapter, uint64_t *data,
755 int reg, uint32_t mask, uint32_t write)
757 uint8_t __iomem *address = adapter->hw.hw_addr + reg;
760 writel(write & mask, address);
761 read = readl(address);
762 if ((read & mask) != (write & mask)) {
763 DPRINTK(DRV, ERR, "set/check reg %04X test failed: "
764 "got 0x%08X expected 0x%08X\n",
765 reg, (read & mask), (write & mask));
772 #define REG_PATTERN_TEST(reg, mask, write) \
774 if (reg_pattern_test(adapter, data, \
775 (adapter->hw.mac_type >= e1000_82543) \
776 ? E1000_##reg : E1000_82542_##reg, \
781 #define REG_SET_AND_CHECK(reg, mask, write) \
783 if (reg_set_and_check(adapter, data, \
784 (adapter->hw.mac_type >= e1000_82543) \
785 ? E1000_##reg : E1000_82542_##reg, \
791 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
793 uint32_t value, before, after;
796 /* The status register is Read Only, so a write should fail.
797 * Some bits that get toggled are ignored.
799 switch (adapter->hw.mac_type) {
800 /* there are several bits on newer hardware that are r/w */
803 case e1000_80003es2lan:
815 before = E1000_READ_REG(&adapter->hw, STATUS);
816 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
817 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
818 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
819 if (value != after) {
820 DPRINTK(DRV, ERR, "failed STATUS register test got: "
821 "0x%08X expected: 0x%08X\n", after, value);
825 /* restore previous status */
826 E1000_WRITE_REG(&adapter->hw, STATUS, before);
828 if (adapter->hw.mac_type != e1000_ich8lan) {
829 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
830 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
831 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
832 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
835 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
836 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
837 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
838 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
839 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
840 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
841 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
842 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
843 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
844 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
846 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
848 before = (adapter->hw.mac_type == e1000_ich8lan ?
849 0x06C3B33E : 0x06DFB3FE);
850 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
851 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
853 if (adapter->hw.mac_type >= e1000_82543) {
855 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
856 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
857 if (adapter->hw.mac_type != e1000_ich8lan)
858 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
859 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
860 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
861 value = (adapter->hw.mac_type == e1000_ich8lan ?
862 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
863 for (i = 0; i < value; i++) {
864 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
870 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
871 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
872 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
873 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
877 value = (adapter->hw.mac_type == e1000_ich8lan ?
878 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
879 for (i = 0; i < value; i++)
880 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
887 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
890 uint16_t checksum = 0;
894 /* Read and add up the contents of the EEPROM */
895 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
896 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
903 /* If Checksum is not Correct return error else test passed */
904 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
911 e1000_test_intr(int irq, void *data)
913 struct net_device *netdev = (struct net_device *) data;
914 struct e1000_adapter *adapter = netdev_priv(netdev);
916 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
922 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
924 struct net_device *netdev = adapter->netdev;
925 uint32_t mask, i = 0;
926 bool shared_int = true;
927 uint32_t irq = adapter->pdev->irq;
931 /* NOTE: we don't test MSI interrupts here, yet */
932 /* Hook up test interrupt handler just for this test */
933 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
936 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
937 netdev->name, netdev)) {
941 DPRINTK(HW, INFO, "testing %s interrupt\n",
942 (shared_int ? "shared" : "unshared"));
944 /* Disable all the interrupts */
945 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
948 /* Test each interrupt */
949 for (; i < 10; i++) {
951 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
954 /* Interrupt to test */
958 /* Disable the interrupt to be reported in
959 * the cause register and then force the same
960 * interrupt and see if one gets posted. If
961 * an interrupt was posted to the bus, the
964 adapter->test_icr = 0;
965 E1000_WRITE_REG(&adapter->hw, IMC, mask);
966 E1000_WRITE_REG(&adapter->hw, ICS, mask);
969 if (adapter->test_icr & mask) {
975 /* Enable the interrupt to be reported in
976 * the cause register and then force the same
977 * interrupt and see if one gets posted. If
978 * an interrupt was not posted to the bus, the
981 adapter->test_icr = 0;
982 E1000_WRITE_REG(&adapter->hw, IMS, mask);
983 E1000_WRITE_REG(&adapter->hw, ICS, mask);
986 if (!(adapter->test_icr & mask)) {
992 /* Disable the other interrupts to be reported in
993 * the cause register and then force the other
994 * interrupts and see if any get posted. If
995 * an interrupt was posted to the bus, the
998 adapter->test_icr = 0;
999 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
1000 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
1003 if (adapter->test_icr) {
1010 /* Disable all the interrupts */
1011 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
1014 /* Unhook test interrupt handler */
1015 free_irq(irq, netdev);
1021 e1000_free_desc_rings(struct e1000_adapter *adapter)
1023 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1024 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1025 struct pci_dev *pdev = adapter->pdev;
1028 if (txdr->desc && txdr->buffer_info) {
1029 for (i = 0; i < txdr->count; i++) {
1030 if (txdr->buffer_info[i].dma)
1031 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1032 txdr->buffer_info[i].length,
1034 if (txdr->buffer_info[i].skb)
1035 dev_kfree_skb(txdr->buffer_info[i].skb);
1039 if (rxdr->desc && rxdr->buffer_info) {
1040 for (i = 0; i < rxdr->count; i++) {
1041 if (rxdr->buffer_info[i].dma)
1042 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1043 rxdr->buffer_info[i].length,
1044 PCI_DMA_FROMDEVICE);
1045 if (rxdr->buffer_info[i].skb)
1046 dev_kfree_skb(rxdr->buffer_info[i].skb);
1051 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
1055 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
1059 kfree(txdr->buffer_info);
1060 txdr->buffer_info = NULL;
1061 kfree(rxdr->buffer_info);
1062 rxdr->buffer_info = NULL;
1068 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1070 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1071 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1072 struct pci_dev *pdev = adapter->pdev;
1076 /* Setup Tx descriptor ring and Tx buffers */
1079 txdr->count = E1000_DEFAULT_TXD;
1081 if (!(txdr->buffer_info = kcalloc(txdr->count,
1082 sizeof(struct e1000_buffer),
1088 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1089 txdr->size = ALIGN(txdr->size, 4096);
1090 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size,
1095 memset(txdr->desc, 0, txdr->size);
1096 txdr->next_to_use = txdr->next_to_clean = 0;
1098 E1000_WRITE_REG(&adapter->hw, TDBAL,
1099 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1100 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1101 E1000_WRITE_REG(&adapter->hw, TDLEN,
1102 txdr->count * sizeof(struct e1000_tx_desc));
1103 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1104 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1105 E1000_WRITE_REG(&adapter->hw, TCTL,
1106 E1000_TCTL_PSP | E1000_TCTL_EN |
1107 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1108 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1110 for (i = 0; i < txdr->count; i++) {
1111 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1112 struct sk_buff *skb;
1113 unsigned int size = 1024;
1115 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1120 txdr->buffer_info[i].skb = skb;
1121 txdr->buffer_info[i].length = skb->len;
1122 txdr->buffer_info[i].dma =
1123 pci_map_single(pdev, skb->data, skb->len,
1125 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1126 tx_desc->lower.data = cpu_to_le32(skb->len);
1127 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1128 E1000_TXD_CMD_IFCS |
1130 tx_desc->upper.data = 0;
1133 /* Setup Rx descriptor ring and Rx buffers */
1136 rxdr->count = E1000_DEFAULT_RXD;
1138 if (!(rxdr->buffer_info = kcalloc(rxdr->count,
1139 sizeof(struct e1000_buffer),
1145 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1146 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1150 memset(rxdr->desc, 0, rxdr->size);
1151 rxdr->next_to_use = rxdr->next_to_clean = 0;
1153 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1154 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1155 E1000_WRITE_REG(&adapter->hw, RDBAL,
1156 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1157 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1158 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1159 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1160 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1161 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1162 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1163 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1164 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1166 for (i = 0; i < rxdr->count; i++) {
1167 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1168 struct sk_buff *skb;
1170 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1175 skb_reserve(skb, NET_IP_ALIGN);
1176 rxdr->buffer_info[i].skb = skb;
1177 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1178 rxdr->buffer_info[i].dma =
1179 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1180 PCI_DMA_FROMDEVICE);
1181 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1182 memset(skb->data, 0x00, skb->len);
1188 e1000_free_desc_rings(adapter);
1193 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1195 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1196 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1197 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1198 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1199 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1203 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1207 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1208 * Extended PHY Specific Control Register to 25MHz clock. This
1209 * value defaults back to a 2.5MHz clock when the PHY is reset.
1211 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1212 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1213 e1000_write_phy_reg(&adapter->hw,
1214 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1216 /* In addition, because of the s/w reset above, we need to enable
1217 * CRS on TX. This must be set for both full and half duplex
1220 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1221 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1222 e1000_write_phy_reg(&adapter->hw,
1223 M88E1000_PHY_SPEC_CTRL, phy_reg);
1227 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1232 /* Setup the Device Control Register for PHY loopback test. */
1234 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1235 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1236 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1237 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1238 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1239 E1000_CTRL_FD); /* Force Duplex to FULL */
1241 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1243 /* Read the PHY Specific Control Register (0x10) */
1244 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1246 /* Clear Auto-Crossover bits in PHY Specific Control Register
1249 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1250 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1252 /* Perform software reset on the PHY */
1253 e1000_phy_reset(&adapter->hw);
1255 /* Have to setup TX_CLK and TX_CRS after software reset */
1256 e1000_phy_reset_clk_and_crs(adapter);
1258 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1260 /* Wait for reset to complete. */
1263 /* Have to setup TX_CLK and TX_CRS after software reset */
1264 e1000_phy_reset_clk_and_crs(adapter);
1266 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1267 e1000_phy_disable_receiver(adapter);
1269 /* Set the loopback bit in the PHY control register. */
1270 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1271 phy_reg |= MII_CR_LOOPBACK;
1272 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1274 /* Setup TX_CLK and TX_CRS one more time. */
1275 e1000_phy_reset_clk_and_crs(adapter);
1277 /* Check Phy Configuration */
1278 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1279 if (phy_reg != 0x4100)
1282 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1283 if (phy_reg != 0x0070)
1286 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1287 if (phy_reg != 0x001A)
1294 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1296 uint32_t ctrl_reg = 0;
1297 uint32_t stat_reg = 0;
1299 adapter->hw.autoneg = false;
1301 if (adapter->hw.phy_type == e1000_phy_m88) {
1302 /* Auto-MDI/MDIX Off */
1303 e1000_write_phy_reg(&adapter->hw,
1304 M88E1000_PHY_SPEC_CTRL, 0x0808);
1305 /* reset to update Auto-MDI/MDIX */
1306 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1308 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1309 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
1310 e1000_write_phy_reg(&adapter->hw,
1311 GG82563_PHY_KMRN_MODE_CTRL,
1314 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1316 if (adapter->hw.phy_type == e1000_phy_ife) {
1317 /* force 100, set loopback */
1318 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1320 /* Now set up the MAC to the same speed/duplex as the PHY. */
1321 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1322 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1323 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1324 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1325 E1000_CTRL_FD); /* Force Duplex to FULL */
1327 /* force 1000, set loopback */
1328 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1330 /* Now set up the MAC to the same speed/duplex as the PHY. */
1331 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1332 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1333 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1334 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1335 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1336 E1000_CTRL_FD); /* Force Duplex to FULL */
1339 if (adapter->hw.media_type == e1000_media_type_copper &&
1340 adapter->hw.phy_type == e1000_phy_m88)
1341 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1343 /* Set the ILOS bit on the fiber Nic is half
1344 * duplex link is detected. */
1345 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1346 if ((stat_reg & E1000_STATUS_FD) == 0)
1347 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1350 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1352 /* Disable the receiver on the PHY so when a cable is plugged in, the
1353 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1355 if (adapter->hw.phy_type == e1000_phy_m88)
1356 e1000_phy_disable_receiver(adapter);
1364 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1366 uint16_t phy_reg = 0;
1369 switch (adapter->hw.mac_type) {
1371 if (adapter->hw.media_type == e1000_media_type_copper) {
1372 /* Attempt to setup Loopback mode on Non-integrated PHY.
1373 * Some PHY registers get corrupted at random, so
1374 * attempt this 10 times.
1376 while (e1000_nonintegrated_phy_loopback(adapter) &&
1386 case e1000_82545_rev_3:
1388 case e1000_82546_rev_3:
1390 case e1000_82541_rev_2:
1392 case e1000_82547_rev_2:
1396 case e1000_80003es2lan:
1398 return e1000_integrated_phy_loopback(adapter);
1402 /* Default PHY loopback work is to read the MII
1403 * control register and assert bit 14 (loopback mode).
1405 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1406 phy_reg |= MII_CR_LOOPBACK;
1407 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1416 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1418 struct e1000_hw *hw = &adapter->hw;
1421 if (hw->media_type == e1000_media_type_fiber ||
1422 hw->media_type == e1000_media_type_internal_serdes) {
1423 switch (hw->mac_type) {
1426 case e1000_82545_rev_3:
1427 case e1000_82546_rev_3:
1428 return e1000_set_phy_loopback(adapter);
1432 #define E1000_SERDES_LB_ON 0x410
1433 e1000_set_phy_loopback(adapter);
1434 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1439 rctl = E1000_READ_REG(hw, RCTL);
1440 rctl |= E1000_RCTL_LBM_TCVR;
1441 E1000_WRITE_REG(hw, RCTL, rctl);
1444 } else if (hw->media_type == e1000_media_type_copper)
1445 return e1000_set_phy_loopback(adapter);
1451 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1453 struct e1000_hw *hw = &adapter->hw;
1457 rctl = E1000_READ_REG(hw, RCTL);
1458 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1459 E1000_WRITE_REG(hw, RCTL, rctl);
1461 switch (hw->mac_type) {
1464 if (hw->media_type == e1000_media_type_fiber ||
1465 hw->media_type == e1000_media_type_internal_serdes) {
1466 #define E1000_SERDES_LB_OFF 0x400
1467 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1474 case e1000_82545_rev_3:
1475 case e1000_82546_rev_3:
1478 if (hw->phy_type == e1000_phy_gg82563)
1479 e1000_write_phy_reg(hw,
1480 GG82563_PHY_KMRN_MODE_CTRL,
1482 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1483 if (phy_reg & MII_CR_LOOPBACK) {
1484 phy_reg &= ~MII_CR_LOOPBACK;
1485 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1486 e1000_phy_reset(hw);
1493 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1495 memset(skb->data, 0xFF, frame_size);
1497 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1498 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1499 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1503 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1506 if (*(skb->data + 3) == 0xFF) {
1507 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1508 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1516 e1000_run_loopback_test(struct e1000_adapter *adapter)
1518 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1519 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1520 struct pci_dev *pdev = adapter->pdev;
1521 int i, j, k, l, lc, good_cnt, ret_val=0;
1524 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1526 /* Calculate the loop count based on the largest descriptor ring
1527 * The idea is to wrap the largest ring a number of times using 64
1528 * send/receive pairs during each loop
1531 if (rxdr->count <= txdr->count)
1532 lc = ((txdr->count / 64) * 2) + 1;
1534 lc = ((rxdr->count / 64) * 2) + 1;
1537 for (j = 0; j <= lc; j++) { /* loop count loop */
1538 for (i = 0; i < 64; i++) { /* send the packets */
1539 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1541 pci_dma_sync_single_for_device(pdev,
1542 txdr->buffer_info[k].dma,
1543 txdr->buffer_info[k].length,
1545 if (unlikely(++k == txdr->count)) k = 0;
1547 E1000_WRITE_REG(&adapter->hw, TDT, k);
1549 time = jiffies; /* set the start time for the receive */
1551 do { /* receive the sent packets */
1552 pci_dma_sync_single_for_cpu(pdev,
1553 rxdr->buffer_info[l].dma,
1554 rxdr->buffer_info[l].length,
1555 PCI_DMA_FROMDEVICE);
1557 ret_val = e1000_check_lbtest_frame(
1558 rxdr->buffer_info[l].skb,
1562 if (unlikely(++l == rxdr->count)) l = 0;
1563 /* time + 20 msecs (200 msecs on 2.4) is more than
1564 * enough time to complete the receives, if it's
1565 * exceeded, break and error off
1567 } while (good_cnt < 64 && jiffies < (time + 20));
1568 if (good_cnt != 64) {
1569 ret_val = 13; /* ret_val is the same as mis-compare */
1572 if (jiffies >= (time + 2)) {
1573 ret_val = 14; /* error code for time out error */
1576 } /* end loop count loop */
1581 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1583 /* PHY loopback cannot be performed if SoL/IDER
1584 * sessions are active */
1585 if (e1000_check_phy_reset_block(&adapter->hw)) {
1586 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1587 "when SoL/IDER is active.\n");
1592 if ((*data = e1000_setup_desc_rings(adapter)))
1594 if ((*data = e1000_setup_loopback_test(adapter)))
1596 *data = e1000_run_loopback_test(adapter);
1597 e1000_loopback_cleanup(adapter);
1600 e1000_free_desc_rings(adapter);
1606 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1609 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1611 adapter->hw.serdes_link_down = true;
1613 /* On some blade server designs, link establishment
1614 * could take as long as 2-3 minutes */
1616 e1000_check_for_link(&adapter->hw);
1617 if (!adapter->hw.serdes_link_down)
1620 } while (i++ < 3750);
1624 e1000_check_for_link(&adapter->hw);
1625 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
1628 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1636 e1000_get_sset_count(struct net_device *netdev, int sset)
1640 return E1000_TEST_LEN;
1642 return E1000_STATS_LEN;
1649 e1000_diag_test(struct net_device *netdev,
1650 struct ethtool_test *eth_test, uint64_t *data)
1652 struct e1000_adapter *adapter = netdev_priv(netdev);
1653 bool if_running = netif_running(netdev);
1655 set_bit(__E1000_TESTING, &adapter->flags);
1656 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1659 /* save speed, duplex, autoneg settings */
1660 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1661 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1662 uint8_t autoneg = adapter->hw.autoneg;
1664 DPRINTK(HW, INFO, "offline testing starting\n");
1666 /* Link test performed before hardware reset so autoneg doesn't
1667 * interfere with test result */
1668 if (e1000_link_test(adapter, &data[4]))
1669 eth_test->flags |= ETH_TEST_FL_FAILED;
1672 /* indicate we're in test mode */
1675 e1000_reset(adapter);
1677 if (e1000_reg_test(adapter, &data[0]))
1678 eth_test->flags |= ETH_TEST_FL_FAILED;
1680 e1000_reset(adapter);
1681 if (e1000_eeprom_test(adapter, &data[1]))
1682 eth_test->flags |= ETH_TEST_FL_FAILED;
1684 e1000_reset(adapter);
1685 if (e1000_intr_test(adapter, &data[2]))
1686 eth_test->flags |= ETH_TEST_FL_FAILED;
1688 e1000_reset(adapter);
1689 /* make sure the phy is powered up */
1690 e1000_power_up_phy(adapter);
1691 if (e1000_loopback_test(adapter, &data[3]))
1692 eth_test->flags |= ETH_TEST_FL_FAILED;
1694 /* restore speed, duplex, autoneg settings */
1695 adapter->hw.autoneg_advertised = autoneg_advertised;
1696 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1697 adapter->hw.autoneg = autoneg;
1699 e1000_reset(adapter);
1700 clear_bit(__E1000_TESTING, &adapter->flags);
1704 DPRINTK(HW, INFO, "online testing starting\n");
1706 if (e1000_link_test(adapter, &data[4]))
1707 eth_test->flags |= ETH_TEST_FL_FAILED;
1709 /* Online tests aren't run; pass by default */
1715 clear_bit(__E1000_TESTING, &adapter->flags);
1717 msleep_interruptible(4 * 1000);
1720 static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1722 struct e1000_hw *hw = &adapter->hw;
1723 int retval = 1; /* fail by default */
1725 switch (hw->device_id) {
1726 case E1000_DEV_ID_82542:
1727 case E1000_DEV_ID_82543GC_FIBER:
1728 case E1000_DEV_ID_82543GC_COPPER:
1729 case E1000_DEV_ID_82544EI_FIBER:
1730 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1731 case E1000_DEV_ID_82545EM_FIBER:
1732 case E1000_DEV_ID_82545EM_COPPER:
1733 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1734 case E1000_DEV_ID_82546GB_PCIE:
1735 case E1000_DEV_ID_82571EB_SERDES_QUAD:
1736 /* these don't support WoL at all */
1739 case E1000_DEV_ID_82546EB_FIBER:
1740 case E1000_DEV_ID_82546GB_FIBER:
1741 case E1000_DEV_ID_82571EB_FIBER:
1742 case E1000_DEV_ID_82571EB_SERDES:
1743 case E1000_DEV_ID_82571EB_COPPER:
1744 /* Wake events not supported on port B */
1745 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1749 /* return success for non excluded adapter ports */
1752 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1753 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1754 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1755 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1756 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1757 /* quad port adapters only support WoL on port A */
1758 if (!adapter->quad_port_a) {
1762 /* return success for non excluded adapter ports */
1766 /* dual port cards only support WoL on port A from now on
1767 * unless it was enabled in the eeprom for port B
1768 * so exclude FUNC_1 ports from having WoL enabled */
1769 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1770 !adapter->eeprom_wol) {
1782 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1784 struct e1000_adapter *adapter = netdev_priv(netdev);
1786 wol->supported = WAKE_UCAST | WAKE_MCAST |
1787 WAKE_BCAST | WAKE_MAGIC;
1790 /* this function will set ->supported = 0 and return 1 if wol is not
1791 * supported by this hardware */
1792 if (e1000_wol_exclusion(adapter, wol))
1795 /* apply any specific unsupported masks here */
1796 switch (adapter->hw.device_id) {
1797 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1798 /* KSP3 does not suppport UCAST wake-ups */
1799 wol->supported &= ~WAKE_UCAST;
1801 if (adapter->wol & E1000_WUFC_EX)
1802 DPRINTK(DRV, ERR, "Interface does not support "
1803 "directed (unicast) frame wake-up packets\n");
1809 if (adapter->wol & E1000_WUFC_EX)
1810 wol->wolopts |= WAKE_UCAST;
1811 if (adapter->wol & E1000_WUFC_MC)
1812 wol->wolopts |= WAKE_MCAST;
1813 if (adapter->wol & E1000_WUFC_BC)
1814 wol->wolopts |= WAKE_BCAST;
1815 if (adapter->wol & E1000_WUFC_MAG)
1816 wol->wolopts |= WAKE_MAGIC;
1822 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1824 struct e1000_adapter *adapter = netdev_priv(netdev);
1825 struct e1000_hw *hw = &adapter->hw;
1827 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1830 if (e1000_wol_exclusion(adapter, wol))
1831 return wol->wolopts ? -EOPNOTSUPP : 0;
1833 switch (hw->device_id) {
1834 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1835 if (wol->wolopts & WAKE_UCAST) {
1836 DPRINTK(DRV, ERR, "Interface does not support "
1837 "directed (unicast) frame wake-up packets\n");
1845 /* these settings will always override what we currently have */
1848 if (wol->wolopts & WAKE_UCAST)
1849 adapter->wol |= E1000_WUFC_EX;
1850 if (wol->wolopts & WAKE_MCAST)
1851 adapter->wol |= E1000_WUFC_MC;
1852 if (wol->wolopts & WAKE_BCAST)
1853 adapter->wol |= E1000_WUFC_BC;
1854 if (wol->wolopts & WAKE_MAGIC)
1855 adapter->wol |= E1000_WUFC_MAG;
1860 /* toggle LED 4 times per second = 2 "blinks" per second */
1861 #define E1000_ID_INTERVAL (HZ/4)
1863 /* bit defines for adapter->led_status */
1864 #define E1000_LED_ON 0
1867 e1000_led_blink_callback(unsigned long data)
1869 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1871 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1872 e1000_led_off(&adapter->hw);
1874 e1000_led_on(&adapter->hw);
1876 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1880 e1000_phys_id(struct net_device *netdev, uint32_t data)
1882 struct e1000_adapter *adapter = netdev_priv(netdev);
1887 if (adapter->hw.mac_type < e1000_82571) {
1888 if (!adapter->blink_timer.function) {
1889 init_timer(&adapter->blink_timer);
1890 adapter->blink_timer.function = e1000_led_blink_callback;
1891 adapter->blink_timer.data = (unsigned long) adapter;
1893 e1000_setup_led(&adapter->hw);
1894 mod_timer(&adapter->blink_timer, jiffies);
1895 msleep_interruptible(data * 1000);
1896 del_timer_sync(&adapter->blink_timer);
1897 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1898 if (!adapter->blink_timer.function) {
1899 init_timer(&adapter->blink_timer);
1900 adapter->blink_timer.function = e1000_led_blink_callback;
1901 adapter->blink_timer.data = (unsigned long) adapter;
1903 mod_timer(&adapter->blink_timer, jiffies);
1904 msleep_interruptible(data * 1000);
1905 del_timer_sync(&adapter->blink_timer);
1906 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
1908 e1000_blink_led_start(&adapter->hw);
1909 msleep_interruptible(data * 1000);
1912 e1000_led_off(&adapter->hw);
1913 clear_bit(E1000_LED_ON, &adapter->led_status);
1914 e1000_cleanup_led(&adapter->hw);
1920 e1000_nway_reset(struct net_device *netdev)
1922 struct e1000_adapter *adapter = netdev_priv(netdev);
1923 if (netif_running(netdev))
1924 e1000_reinit_locked(adapter);
1929 e1000_get_ethtool_stats(struct net_device *netdev,
1930 struct ethtool_stats *stats, uint64_t *data)
1932 struct e1000_adapter *adapter = netdev_priv(netdev);
1935 e1000_update_stats(adapter);
1936 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1937 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1938 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1939 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1941 /* BUG_ON(i != E1000_STATS_LEN); */
1945 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1950 switch (stringset) {
1952 memcpy(data, *e1000_gstrings_test,
1953 sizeof(e1000_gstrings_test));
1956 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1957 memcpy(p, e1000_gstrings_stats[i].stat_string,
1959 p += ETH_GSTRING_LEN;
1961 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1966 static const struct ethtool_ops e1000_ethtool_ops = {
1967 .get_settings = e1000_get_settings,
1968 .set_settings = e1000_set_settings,
1969 .get_drvinfo = e1000_get_drvinfo,
1970 .get_regs_len = e1000_get_regs_len,
1971 .get_regs = e1000_get_regs,
1972 .get_wol = e1000_get_wol,
1973 .set_wol = e1000_set_wol,
1974 .get_msglevel = e1000_get_msglevel,
1975 .set_msglevel = e1000_set_msglevel,
1976 .nway_reset = e1000_nway_reset,
1977 .get_link = ethtool_op_get_link,
1978 .get_eeprom_len = e1000_get_eeprom_len,
1979 .get_eeprom = e1000_get_eeprom,
1980 .set_eeprom = e1000_set_eeprom,
1981 .get_ringparam = e1000_get_ringparam,
1982 .set_ringparam = e1000_set_ringparam,
1983 .get_pauseparam = e1000_get_pauseparam,
1984 .set_pauseparam = e1000_set_pauseparam,
1985 .get_rx_csum = e1000_get_rx_csum,
1986 .set_rx_csum = e1000_set_rx_csum,
1987 .get_tx_csum = e1000_get_tx_csum,
1988 .set_tx_csum = e1000_set_tx_csum,
1989 .set_sg = ethtool_op_set_sg,
1990 .set_tso = e1000_set_tso,
1991 .self_test = e1000_diag_test,
1992 .get_strings = e1000_get_strings,
1993 .phys_id = e1000_phys_id,
1994 .get_ethtool_stats = e1000_get_ethtool_stats,
1995 .get_sset_count = e1000_get_sset_count,
1998 void e1000_set_ethtool_ops(struct net_device *netdev)
2000 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);