2 * tifm_sd.c - TI FlashMedia driver
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include <linux/tifm.h>
14 #include <linux/mmc/protocol.h>
15 #include <linux/mmc/host.h>
16 #include <linux/highmem.h>
19 #define DRIVER_NAME "tifm_sd"
20 #define DRIVER_VERSION "0.6"
22 static int no_dma = 0;
23 static int fixed_timeout = 0;
24 module_param(no_dma, bool, 0644);
25 module_param(fixed_timeout, bool, 0644);
27 /* Constants here are mostly from OMAP5912 datasheet */
28 #define TIFM_MMCSD_RESET 0x0002
29 #define TIFM_MMCSD_CLKMASK 0x03ff
30 #define TIFM_MMCSD_POWER 0x0800
31 #define TIFM_MMCSD_4BBUS 0x8000
32 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
33 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
34 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
35 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
36 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
37 #define TIFM_MMCSD_READ 0x8000
39 #define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
40 #define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
41 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51 #define TIFM_MMCSD_CERR 0x4000 /* card status error */
53 #define TIFM_MMCSD_FIFO_SIZE 0x0020
55 #define TIFM_MMCSD_RSP_R0 0x0000
56 #define TIFM_MMCSD_RSP_R1 0x0100
57 #define TIFM_MMCSD_RSP_R2 0x0200
58 #define TIFM_MMCSD_RSP_R3 0x0300
59 #define TIFM_MMCSD_RSP_R4 0x0400
60 #define TIFM_MMCSD_RSP_R5 0x0500
61 #define TIFM_MMCSD_RSP_R6 0x0600
63 #define TIFM_MMCSD_RSP_BUSY 0x0800
65 #define TIFM_MMCSD_CMD_BC 0x0000
66 #define TIFM_MMCSD_CMD_BCR 0x1000
67 #define TIFM_MMCSD_CMD_AC 0x2000
68 #define TIFM_MMCSD_CMD_ADTC 0x3000
72 CMD, /* main command ended */
73 BRS, /* block transfer finished */
74 SCMD, /* stop command ended */
75 CARD, /* card left busy state */
76 FIFO, /* FIFO operation completed (uncertain) */
81 FIFO_RDY = 0x0001, /* hardware dependent value */
86 OPENDRAIN = 0x0040, /* hardware dependent value */
87 CARD_EVENT = 0x0100, /* hardware dependent value */
88 CARD_RO = 0x0200, /* hardware dependent value */
89 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
96 unsigned int clk_freq;
98 unsigned long timeout_jiffies; // software timeout - 2 sec
100 struct mmc_request *req;
101 struct work_struct cmd_handler;
102 struct delayed_work abort_handler;
103 wait_queue_head_t can_eject;
105 size_t written_blocks;
112 static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
113 unsigned int host_status)
115 struct mmc_command *cmd = host->req->cmd;
116 unsigned int t_val = 0, cnt = 0;
118 if (host_status & TIFM_MMCSD_BRS) {
119 /* in non-dma rx mode BRS fires when fifo is still not empty */
120 if (host->buffer && (cmd->data->flags & MMC_DATA_READ)) {
121 while (host->buffer_size > host->buffer_pos) {
122 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
123 host->buffer[host->buffer_pos++] = t_val & 0xff;
124 host->buffer[host->buffer_pos++] =
129 } else if (host->buffer) {
130 if ((cmd->data->flags & MMC_DATA_READ) &&
131 (host_status & TIFM_MMCSD_AF)) {
132 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
133 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
134 if (host->buffer_size > host->buffer_pos) {
135 host->buffer[host->buffer_pos++] =
137 host->buffer[host->buffer_pos++] =
141 } else if ((cmd->data->flags & MMC_DATA_WRITE)
142 && (host_status & TIFM_MMCSD_AE)) {
143 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
144 if (host->buffer_size > host->buffer_pos) {
145 t_val = host->buffer[host->buffer_pos++] & 0x00ff;
146 t_val |= ((host->buffer[host->buffer_pos++]) << 8)
149 sock->addr + SOCK_MMCSD_DATA);
157 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
161 switch (mmc_resp_type(cmd)) {
163 rc |= TIFM_MMCSD_RSP_R0;
166 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
168 rc |= TIFM_MMCSD_RSP_R1;
171 rc |= TIFM_MMCSD_RSP_R2;
174 rc |= TIFM_MMCSD_RSP_R3;
177 rc |= TIFM_MMCSD_RSP_R6;
183 switch (mmc_cmd_type(cmd)) {
185 rc |= TIFM_MMCSD_CMD_BC;
188 rc |= TIFM_MMCSD_CMD_BCR;
191 rc |= TIFM_MMCSD_CMD_AC;
194 rc |= TIFM_MMCSD_CMD_ADTC;
202 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
204 struct tifm_dev *sock = host->dev;
205 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
206 (host->flags & OPENDRAIN);
208 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
209 cmd_mask |= TIFM_MMCSD_READ;
211 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
212 cmd->opcode, cmd->arg, cmd_mask);
214 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
215 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
216 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
219 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
221 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
222 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
223 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
224 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
225 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
226 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
227 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
228 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
231 static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
232 unsigned int host_status)
234 struct mmc_command *cmd = host->req->cmd;
237 switch (host->state) {
241 if (host_status & TIFM_MMCSD_EOC) {
242 tifm_sd_fetch_resp(cmd, sock);
251 if (tifm_sd_transfer_data(sock, host, host_status)) {
252 if (!host->req->stop) {
253 if (cmd->data->flags & MMC_DATA_WRITE) {
257 host->buffer ? READY : FIFO;
261 tifm_sd_exec(host, host->req->stop);
266 if (host_status & TIFM_MMCSD_EOC) {
267 tifm_sd_fetch_resp(host->req->stop, sock);
270 } else if (cmd->data->flags & MMC_DATA_WRITE) {
273 host->state = host->buffer ? READY : FIFO;
279 if (!(host->flags & CARD_BUSY)
280 && (host->written_blocks == cmd->data->blocks)) {
281 host->state = host->buffer ? READY : FIFO;
286 if (host->flags & FIFO_RDY) {
288 host->flags &= ~FIFO_RDY;
293 queue_work(sock->wq, &host->cmd_handler);
297 queue_delayed_work(sock->wq, &host->abort_handler,
298 host->timeout_jiffies);
301 /* Called from interrupt handler */
302 static unsigned int tifm_sd_signal_irq(struct tifm_dev *sock,
303 unsigned int sock_irq_status)
305 struct tifm_sd *host;
306 unsigned int host_status = 0, fifo_status = 0;
309 spin_lock(&sock->lock);
310 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
311 cancel_delayed_work(&host->abort_handler);
313 if (sock_irq_status & FIFO_EVENT) {
314 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
315 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
317 host->flags |= fifo_status & FIFO_RDY;
320 if (sock_irq_status & CARD_EVENT) {
321 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
322 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
324 if (!(host->flags & HOST_REG))
325 queue_work(sock->wq, &host->cmd_handler);
329 if (host_status & TIFM_MMCSD_ERRMASK) {
330 if (host_status & TIFM_MMCSD_CERR)
331 error_code = MMC_ERR_FAILED;
332 else if (host_status &
333 (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
334 error_code = MMC_ERR_TIMEOUT;
335 else if (host_status &
336 (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
337 error_code = MMC_ERR_BADCRC;
339 writel(TIFM_FIFO_INT_SETALL,
340 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
341 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
343 if (host->req->stop) {
344 if (host->state == SCMD) {
345 host->req->stop->error = error_code;
346 } else if(host->state == BRS) {
347 host->req->cmd->error = error_code;
348 tifm_sd_exec(host, host->req->stop);
349 queue_delayed_work(sock->wq,
350 &host->abort_handler,
351 host->timeout_jiffies);
355 host->req->cmd->error = error_code;
358 host->req->cmd->error = error_code;
363 if (host_status & TIFM_MMCSD_CB)
364 host->flags |= CARD_BUSY;
365 if ((host_status & TIFM_MMCSD_EOFB) &&
366 (host->flags & CARD_BUSY)) {
367 host->written_blocks++;
368 host->flags &= ~CARD_BUSY;
373 tifm_sd_process_cmd(sock, host, host_status);
375 dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
376 host_status, fifo_status);
377 spin_unlock(&sock->lock);
378 return sock_irq_status;
381 static void tifm_sd_prepare_data(struct tifm_sd *card, struct mmc_command *cmd)
383 struct tifm_dev *sock = card->dev;
384 unsigned int dest_cnt;
388 writel(TIFM_FIFO_INT_SETALL,
389 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
390 writel(ilog2(cmd->data->blksz) - 2,
391 sock->addr + SOCK_FIFO_PAGE_SIZE);
392 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
393 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
395 dest_cnt = (cmd->data->blocks) << 8;
397 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
399 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
400 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
402 if (cmd->data->flags & MMC_DATA_WRITE) {
403 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
404 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
405 sock->addr + SOCK_DMA_CONTROL);
407 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
408 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
412 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
413 struct mmc_data *data)
415 struct tifm_dev *sock = host->dev;
416 unsigned int data_timeout = data->timeout_clks;
421 data_timeout += data->timeout_ns /
422 ((1000000000 / host->clk_freq) * host->clk_div);
423 data_timeout *= 10; // call it fudge factor for now
425 if (data_timeout < 0xffff) {
426 writel((~TIFM_MMCSD_DPE) &
427 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
428 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
429 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
431 writel(TIFM_MMCSD_DPE |
432 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
433 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
434 data_timeout = (data_timeout >> 10) + 1;
435 if(data_timeout > 0xffff)
436 data_timeout = 0; /* set to unlimited */
437 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
441 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
443 struct tifm_sd *host = mmc_priv(mmc);
444 struct tifm_dev *sock = host->dev;
447 struct mmc_data *r_data = mrq->cmd->data;
449 spin_lock_irqsave(&sock->lock, flags);
450 if (host->flags & EJECT) {
451 spin_unlock_irqrestore(&sock->lock, flags);
456 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
457 spin_unlock_irqrestore(&sock->lock, flags);
462 tifm_sd_set_data_timeout(host, r_data);
464 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
465 mrq->cmd->flags & MMC_DATA_WRITE
466 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
468 printk(KERN_ERR DRIVER_NAME
469 ": scatterlist map failed\n");
470 spin_unlock_irqrestore(&sock->lock, flags);
474 host->written_blocks = 0;
475 host->flags &= ~CARD_BUSY;
476 tifm_sd_prepare_data(host, mrq->cmd);
481 queue_delayed_work(sock->wq, &host->abort_handler,
482 host->timeout_jiffies);
483 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
484 sock->addr + SOCK_CONTROL);
485 tifm_sd_exec(host, mrq->cmd);
486 spin_unlock_irqrestore(&sock->lock, flags);
491 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
492 (r_data->flags & MMC_DATA_WRITE)
493 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
495 mrq->cmd->error = MMC_ERR_TIMEOUT;
496 mmc_request_done(mmc, mrq);
499 static void tifm_sd_end_cmd(struct work_struct *work)
501 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
502 struct tifm_dev *sock = host->dev;
503 struct mmc_host *mmc = tifm_get_drvdata(sock);
504 struct mmc_request *mrq;
505 struct mmc_data *r_data = NULL;
508 spin_lock_irqsave(&sock->lock, flags);
515 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
516 spin_unlock_irqrestore(&sock->lock, flags);
520 r_data = mrq->cmd->data;
522 if (r_data->flags & MMC_DATA_WRITE) {
523 r_data->bytes_xfered = host->written_blocks *
526 r_data->bytes_xfered = r_data->blocks -
527 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
528 r_data->bytes_xfered *= r_data->blksz;
529 r_data->bytes_xfered += r_data->blksz -
530 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
532 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
533 (r_data->flags & MMC_DATA_WRITE)
534 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
537 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
538 sock->addr + SOCK_CONTROL);
540 spin_unlock_irqrestore(&sock->lock, flags);
541 mmc_request_done(mmc, mrq);
544 static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
546 struct tifm_sd *host = mmc_priv(mmc);
547 struct tifm_dev *sock = host->dev;
549 struct mmc_data *r_data = mrq->cmd->data;
550 char *t_buffer = NULL;
553 t_buffer = kmap(r_data->sg->page);
555 printk(KERN_ERR DRIVER_NAME ": kmap failed\n");
560 spin_lock_irqsave(&sock->lock, flags);
561 if (host->flags & EJECT) {
562 spin_unlock_irqrestore(&sock->lock, flags);
567 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
568 spin_unlock_irqrestore(&sock->lock, flags);
573 tifm_sd_set_data_timeout(host, r_data);
575 host->buffer = t_buffer + r_data->sg->offset;
576 host->buffer_size = mrq->cmd->data->blocks *
577 mrq->cmd->data->blksz;
579 writel(TIFM_MMCSD_BUFINT |
580 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
581 sock->addr + SOCK_MMCSD_INT_ENABLE);
582 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) |
583 (TIFM_MMCSD_FIFO_SIZE - 1),
584 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
586 host->written_blocks = 0;
587 host->flags &= ~CARD_BUSY;
588 host->buffer_pos = 0;
589 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
590 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
595 queue_delayed_work(sock->wq, &host->abort_handler,
596 host->timeout_jiffies);
597 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
598 sock->addr + SOCK_CONTROL);
599 tifm_sd_exec(host, mrq->cmd);
600 spin_unlock_irqrestore(&sock->lock, flags);
605 kunmap(r_data->sg->page);
607 mrq->cmd->error = MMC_ERR_TIMEOUT;
608 mmc_request_done(mmc, mrq);
611 static void tifm_sd_end_cmd_nodma(struct work_struct *work)
613 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
614 struct tifm_dev *sock = host->dev;
615 struct mmc_host *mmc = tifm_get_drvdata(sock);
616 struct mmc_request *mrq;
617 struct mmc_data *r_data = NULL;
620 spin_lock_irqsave(&sock->lock, flags);
627 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
628 spin_unlock_irqrestore(&sock->lock, flags);
632 r_data = mrq->cmd->data;
634 writel((~TIFM_MMCSD_BUFINT) &
635 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
636 sock->addr + SOCK_MMCSD_INT_ENABLE);
638 if (r_data->flags & MMC_DATA_WRITE) {
639 r_data->bytes_xfered = host->written_blocks *
642 r_data->bytes_xfered = r_data->blocks -
643 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
644 r_data->bytes_xfered *= r_data->blksz;
645 r_data->bytes_xfered += r_data->blksz -
646 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
649 host->buffer_pos = 0;
650 host->buffer_size = 0;
653 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
654 sock->addr + SOCK_CONTROL);
656 spin_unlock_irqrestore(&sock->lock, flags);
659 kunmap(r_data->sg->page);
661 mmc_request_done(mmc, mrq);
664 static void tifm_sd_abort(struct work_struct *work)
666 struct tifm_sd *host =
667 container_of(work, struct tifm_sd, abort_handler.work);
669 printk(KERN_ERR DRIVER_NAME
670 ": card failed to respond for a long period of time");
671 tifm_eject(host->dev);
674 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
676 struct tifm_sd *host = mmc_priv(mmc);
677 struct tifm_dev *sock = host->dev;
678 unsigned int clk_div1, clk_div2;
681 spin_lock_irqsave(&sock->lock, flags);
683 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
685 if (ios->bus_width == MMC_BUS_WIDTH_4) {
686 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
687 sock->addr + SOCK_MMCSD_CONFIG);
689 writel((~TIFM_MMCSD_4BBUS) &
690 readl(sock->addr + SOCK_MMCSD_CONFIG),
691 sock->addr + SOCK_MMCSD_CONFIG);
695 clk_div1 = 20000000 / ios->clock;
699 clk_div2 = 24000000 / ios->clock;
703 if ((20000000 / clk_div1) > ios->clock)
705 if ((24000000 / clk_div2) > ios->clock)
707 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
708 host->clk_freq = 20000000;
709 host->clk_div = clk_div1;
710 writel((~TIFM_CTRL_FAST_CLK) &
711 readl(sock->addr + SOCK_CONTROL),
712 sock->addr + SOCK_CONTROL);
714 host->clk_freq = 24000000;
715 host->clk_div = clk_div2;
716 writel(TIFM_CTRL_FAST_CLK |
717 readl(sock->addr + SOCK_CONTROL),
718 sock->addr + SOCK_CONTROL);
723 host->clk_div &= TIFM_MMCSD_CLKMASK;
724 writel(host->clk_div | ((~TIFM_MMCSD_CLKMASK) &
725 readl(sock->addr + SOCK_MMCSD_CONFIG)),
726 sock->addr + SOCK_MMCSD_CONFIG);
728 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
729 host->flags |= OPENDRAIN;
731 host->flags &= ~OPENDRAIN;
733 /* chip_select : maybe later */
735 //power is set before probe / after remove
736 //I believe, power_off when already marked for eject is sufficient to
738 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
739 host->flags |= EJECT_DONE;
740 wake_up_all(&host->can_eject);
743 spin_unlock_irqrestore(&sock->lock, flags);
746 static int tifm_sd_ro(struct mmc_host *mmc)
749 struct tifm_sd *host = mmc_priv(mmc);
750 struct tifm_dev *sock = host->dev;
753 spin_lock_irqsave(&sock->lock, flags);
755 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
756 rc = (host->flags & CARD_RO) ? 1 : 0;
758 spin_unlock_irqrestore(&sock->lock, flags);
762 static struct mmc_host_ops tifm_sd_ops = {
763 .request = tifm_sd_request,
764 .set_ios = tifm_sd_ios,
768 static void tifm_sd_register_host(struct work_struct *work)
770 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
771 struct tifm_dev *sock = host->dev;
772 struct mmc_host *mmc = tifm_get_drvdata(sock);
775 spin_lock_irqsave(&sock->lock, flags);
776 host->flags |= HOST_REG;
777 PREPARE_WORK(&host->cmd_handler,
778 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd);
779 spin_unlock_irqrestore(&sock->lock, flags);
780 dev_dbg(&sock->dev, "adding host\n");
784 static int tifm_sd_probe(struct tifm_dev *sock)
786 struct mmc_host *mmc;
787 struct tifm_sd *host;
790 if (!(TIFM_SOCK_STATE_OCCUPIED &
791 readl(sock->addr + SOCK_PRESENT_STATE))) {
792 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
796 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
800 host = mmc_priv(mmc);
803 init_waitqueue_head(&host->can_eject);
804 INIT_WORK(&host->cmd_handler, tifm_sd_register_host);
805 INIT_DELAYED_WORK(&host->abort_handler, tifm_sd_abort);
807 tifm_set_drvdata(sock, mmc);
808 sock->signal_irq = tifm_sd_signal_irq;
810 host->clk_freq = 20000000;
811 host->timeout_jiffies = msecs_to_jiffies(1000);
813 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
814 mmc->ops = &tifm_sd_ops;
815 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
816 mmc->caps = MMC_CAP_4_BIT_DATA;
817 mmc->f_min = 20000000 / 60;
818 mmc->f_max = 24000000;
819 mmc->max_hw_segs = 1;
820 mmc->max_phys_segs = 1;
821 mmc->max_sectors = 127;
822 mmc->max_seg_size = mmc->max_sectors << 11; //2k maximum hw block length
824 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
825 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
826 writel(host->clk_div | TIFM_MMCSD_POWER,
827 sock->addr + SOCK_MMCSD_CONFIG);
829 for (rc = 0; rc < 50; rc++) {
830 /* Wait for reset ack */
831 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
839 printk(KERN_ERR DRIVER_NAME
840 ": card not ready - probe failed\n");
845 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
846 writel(host->clk_div | TIFM_MMCSD_POWER,
847 sock->addr + SOCK_MMCSD_CONFIG);
848 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
849 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
850 sock->addr + SOCK_MMCSD_INT_ENABLE);
852 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); // command timeout 64 clocks for now
853 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
854 writel(host->clk_div | TIFM_MMCSD_POWER,
855 sock->addr + SOCK_MMCSD_CONFIG);
857 queue_delayed_work(sock->wq, &host->abort_handler,
858 host->timeout_jiffies);
863 static int tifm_sd_host_is_down(struct tifm_dev *sock)
865 struct mmc_host *mmc = tifm_get_drvdata(sock);
866 struct tifm_sd *host = mmc_priv(mmc);
870 spin_lock_irqsave(&sock->lock, flags);
871 rc = (host->flags & EJECT_DONE);
872 spin_unlock_irqrestore(&sock->lock, flags);
876 static void tifm_sd_remove(struct tifm_dev *sock)
878 struct mmc_host *mmc = tifm_get_drvdata(sock);
879 struct tifm_sd *host = mmc_priv(mmc);
882 spin_lock_irqsave(&sock->lock, flags);
883 host->flags |= EJECT;
885 queue_work(sock->wq, &host->cmd_handler);
886 spin_unlock_irqrestore(&sock->lock, flags);
887 wait_event_timeout(host->can_eject, tifm_sd_host_is_down(sock),
888 host->timeout_jiffies);
890 if (host->flags & HOST_REG)
891 mmc_remove_host(mmc);
893 /* The meaning of the bit majority in this constant is unknown. */
894 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
895 sock->addr + SOCK_CONTROL);
896 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
897 writel(TIFM_FIFO_INT_SETALL,
898 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
899 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
901 tifm_set_drvdata(sock, NULL);
905 static tifm_media_id tifm_sd_id_tbl[] = {
909 static struct tifm_driver tifm_sd_driver = {
914 .id_table = tifm_sd_id_tbl,
915 .probe = tifm_sd_probe,
916 .remove = tifm_sd_remove
919 static int __init tifm_sd_init(void)
921 return tifm_register_driver(&tifm_sd_driver);
924 static void __exit tifm_sd_exit(void)
926 tifm_unregister_driver(&tifm_sd_driver);
929 MODULE_AUTHOR("Alex Dubov");
930 MODULE_DESCRIPTION("TI FlashMedia SD driver");
931 MODULE_LICENSE("GPL");
932 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
933 MODULE_VERSION(DRIVER_VERSION);
935 module_init(tifm_sd_init);
936 module_exit(tifm_sd_exit);