2 * linux/arch/m32r/kernel/setup_mappi.c
4 * Setup routines for Renesas MAPPI Board
6 * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
10 #include <linux/config.h>
11 #include <linux/irq.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
15 #include <asm/system.h>
19 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
23 unsigned long icucr; /* ICU Control Register */
25 #endif /* CONFIG_SMP */
27 icu_data_t icu_data[NR_IRQS];
29 static void disable_mappi_irq(unsigned int irq)
31 unsigned long port, data;
34 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
38 static void enable_mappi_irq(unsigned int irq)
40 unsigned long port, data;
43 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
47 static void mask_and_ack_mappi(unsigned int irq)
49 disable_mappi_irq(irq);
52 static void end_mappi_irq(unsigned int irq)
54 enable_mappi_irq(irq);
57 static unsigned int startup_mappi_irq(unsigned int irq)
59 enable_mappi_irq(irq);
63 static void shutdown_mappi_irq(unsigned int irq)
68 outl(M32R_ICUCR_ILEVEL7, port);
71 static struct hw_interrupt_type mappi_irq_type =
73 .typename = "MAPPI-IRQ",
74 .startup = startup_mappi_irq,
75 .shutdown = shutdown_mappi_irq,
76 .enable = enable_mappi_irq,
77 .disable = disable_mappi_irq,
78 .ack = mask_and_ack_mappi,
82 void __init init_IRQ(void)
92 /* INT0 : LAN controller (RTL8019AS) */
93 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
94 irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type;
95 irq_desc[M32R_IRQ_INT0].action = 0;
96 irq_desc[M32R_IRQ_INT0].depth = 1;
97 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
98 disable_mappi_irq(M32R_IRQ_INT0);
99 #endif /* CONFIG_M32R_NE2000 */
101 /* MFT2 : system timer */
102 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
103 irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
104 irq_desc[M32R_IRQ_MFT2].action = 0;
105 irq_desc[M32R_IRQ_MFT2].depth = 1;
106 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
107 disable_mappi_irq(M32R_IRQ_MFT2);
109 #ifdef CONFIG_SERIAL_M32R_SIO
110 /* SIO0_R : uart receive data */
111 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
112 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
113 irq_desc[M32R_IRQ_SIO0_R].action = 0;
114 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
115 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
116 disable_mappi_irq(M32R_IRQ_SIO0_R);
118 /* SIO0_S : uart send data */
119 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
120 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
121 irq_desc[M32R_IRQ_SIO0_S].action = 0;
122 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
123 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
124 disable_mappi_irq(M32R_IRQ_SIO0_S);
126 /* SIO1_R : uart receive data */
127 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
128 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
129 irq_desc[M32R_IRQ_SIO1_R].action = 0;
130 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
131 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
132 disable_mappi_irq(M32R_IRQ_SIO1_R);
134 /* SIO1_S : uart send data */
135 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
136 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
137 irq_desc[M32R_IRQ_SIO1_S].action = 0;
138 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
139 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
140 disable_mappi_irq(M32R_IRQ_SIO1_S);
141 #endif /* CONFIG_SERIAL_M32R_SIO */
143 #if defined(CONFIG_M32R_PCC)
144 /* INT1 : pccard0 interrupt */
145 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
146 irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type;
147 irq_desc[M32R_IRQ_INT1].action = 0;
148 irq_desc[M32R_IRQ_INT1].depth = 1;
149 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
150 disable_mappi_irq(M32R_IRQ_INT1);
152 /* INT2 : pccard1 interrupt */
153 irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
154 irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type;
155 irq_desc[M32R_IRQ_INT2].action = 0;
156 irq_desc[M32R_IRQ_INT2].depth = 1;
157 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
158 disable_mappi_irq(M32R_IRQ_INT2);
159 #endif /* CONFIG_M32RPCC */