2 i2c Support for Apple Keywest I2C Bus Controller
4 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
8 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 2001/12/13 BenH New implementation
27 2001/12/15 BenH Add support for "byte" and "quick"
28 transfers. Add i2c_xfer routine.
29 2003/09/21 BenH Rework state machine with Paulus help
30 2004/01/21 BenH Merge in Greg KH changes, polled mode is back
31 2004/02/05 BenH Merge 64 bits fixes from the g5 ppc64 tree
33 My understanding of the various modes supported by keywest are:
35 - Dumb mode : not implemented, probably direct tweaking of lines
36 - Standard mode : simple i2c transaction of type
37 S Addr R/W A Data A Data ... T
38 - Standard sub mode : combined 8 bit subaddr write with data read
39 S Addr R/W A SubAddr A Data A Data ... T
40 - Combined mode : Subaddress and Data sequences appended with no stop
41 S Addr R/W A SubAddr S Addr R/W A Data A Data ... T
43 Currently, this driver uses only Standard mode for i2c xfer, and
44 smbus byte & quick transfers ; and uses StandardSub mode for
45 other smbus transfers instead of combined as we need that for the
46 sound driver to be happy
49 #include <linux/module.h>
50 #include <linux/kernel.h>
51 #include <linux/ioport.h>
52 #include <linux/pci.h>
53 #include <linux/types.h>
54 #include <linux/delay.h>
55 #include <linux/i2c.h>
56 #include <linux/init.h>
58 #include <linux/timer.h>
59 #include <linux/spinlock.h>
60 #include <linux/completion.h>
61 #include <linux/interrupt.h>
65 #include <asm/machdep.h>
66 #include <asm/pmac_feature.h>
67 #include <asm/pmac_low_i2c.h>
69 #include "i2c-keywest.h"
73 /* Some debug macros */
74 #define WRONG_STATE(name) do {\
75 pr_debug("KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
76 name, __kw_state_names[iface->state], isr); \
80 static const char *__kw_state_names[] = {
92 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
93 MODULE_DESCRIPTION("I2C driver for Apple's Keywest");
94 MODULE_LICENSE("GPL");
95 module_param(probe, bool, 0);
98 /* Don't schedule, the g5 fan controller is too
102 wait_interrupt(struct keywest_iface* iface)
107 for (i = 0; i < 200000; i++) {
108 isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
115 #endif /* POLLED_MODE */
118 do_stop(struct keywest_iface* iface, int result)
120 write_reg(reg_control, KW_I2C_CTL_STOP);
121 iface->state = state_stop;
122 iface->result = result;
125 /* Main state machine for standard & standard sub mode */
127 handle_interrupt(struct keywest_iface *iface, u8 isr)
132 if (iface->state != state_stop) {
133 pr_debug("KW: Timeout !\n");
134 do_stop(iface, -EIO);
136 if (iface->state == state_stop) {
137 ack = read_reg(reg_status);
138 if (!(ack & KW_I2C_STAT_BUSY)) {
139 iface->state = state_idle;
140 write_reg(reg_ier, 0x00);
142 complete(&iface->complete);
143 #endif /* POLLED_MODE */
149 if (isr & KW_I2C_IRQ_ADDR) {
150 ack = read_reg(reg_status);
151 if (iface->state != state_addr) {
152 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
153 WRONG_STATE("KW_I2C_IRQ_ADDR");
154 do_stop(iface, -EIO);
157 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
158 iface->state = state_stop;
159 iface->result = -ENODEV;
160 pr_debug("KW: NAK on address\n");
162 /* Handle rw "quick" mode */
163 if (iface->datalen == 0) {
165 } else if (iface->read_write == I2C_SMBUS_READ) {
166 iface->state = state_read;
167 if (iface->datalen > 1)
168 write_reg(reg_control, KW_I2C_CTL_AAK);
170 iface->state = state_write;
171 write_reg(reg_data, *(iface->data++));
175 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
178 if (isr & KW_I2C_IRQ_DATA) {
179 if (iface->state == state_read) {
180 *(iface->data++) = read_reg(reg_data);
181 write_reg(reg_isr, KW_I2C_IRQ_DATA);
183 if (iface->datalen == 0)
184 iface->state = state_stop;
185 else if (iface->datalen == 1)
186 write_reg(reg_control, 0);
187 } else if (iface->state == state_write) {
188 /* Check ack status */
189 ack = read_reg(reg_status);
190 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
191 pr_debug("KW: nack on data write (%x): %x\n",
192 iface->data[-1], ack);
193 do_stop(iface, -EIO);
194 } else if (iface->datalen) {
195 write_reg(reg_data, *(iface->data++));
198 write_reg(reg_control, KW_I2C_CTL_STOP);
199 iface->state = state_stop;
202 write_reg(reg_isr, KW_I2C_IRQ_DATA);
204 write_reg(reg_isr, KW_I2C_IRQ_DATA);
205 WRONG_STATE("KW_I2C_IRQ_DATA");
206 if (iface->state != state_stop)
207 do_stop(iface, -EIO);
211 if (isr & KW_I2C_IRQ_STOP) {
212 write_reg(reg_isr, KW_I2C_IRQ_STOP);
213 if (iface->state != state_stop) {
214 WRONG_STATE("KW_I2C_IRQ_STOP");
215 iface->result = -EIO;
217 iface->state = state_idle;
218 write_reg(reg_ier, 0x00);
220 complete(&iface->complete);
221 #endif /* POLLED_MODE */
224 if (isr & KW_I2C_IRQ_START)
225 write_reg(reg_isr, KW_I2C_IRQ_START);
230 /* Interrupt handler */
232 keywest_irq(int irq, void *dev_id, struct pt_regs *regs)
234 struct keywest_iface *iface = (struct keywest_iface *)dev_id;
237 spin_lock_irqsave(&iface->lock, flags);
238 del_timer(&iface->timeout_timer);
239 handle_interrupt(iface, read_reg(reg_isr));
240 if (iface->state != state_idle) {
241 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
242 add_timer(&iface->timeout_timer);
244 spin_unlock_irqrestore(&iface->lock, flags);
249 keywest_timeout(unsigned long data)
251 struct keywest_iface *iface = (struct keywest_iface *)data;
254 pr_debug("timeout !\n");
255 spin_lock_irqsave(&iface->lock, flags);
256 handle_interrupt(iface, read_reg(reg_isr));
257 if (iface->state != state_idle) {
258 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
259 add_timer(&iface->timeout_timer);
261 spin_unlock_irqrestore(&iface->lock, flags);
264 #endif /* POLLED_MODE */
267 * SMBUS-type transfer entrypoint
270 keywest_smbus_xfer( struct i2c_adapter* adap,
272 unsigned short flags,
276 union i2c_smbus_data* data)
278 struct keywest_chan* chan = i2c_get_adapdata(adap);
279 struct keywest_iface* iface = chan->iface;
285 if (iface->state == state_dead)
288 /* Prepare datas & select mode */
289 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
291 case I2C_SMBUS_QUICK:
294 iface->cur_mode |= KW_I2C_MODE_STANDARD;
298 buffer = &data->byte;
299 iface->cur_mode |= KW_I2C_MODE_STANDARD;
301 case I2C_SMBUS_BYTE_DATA:
303 buffer = &data->byte;
304 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
306 case I2C_SMBUS_WORD_DATA:
308 cur_word = cpu_to_le16(data->word);
309 buffer = (u8 *)&cur_word;
310 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
312 case I2C_SMBUS_BLOCK_DATA:
313 len = data->block[0];
314 buffer = &data->block[1];
315 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
321 /* Turn a standardsub read into a combined mode access */
322 if (read_write == I2C_SMBUS_READ
323 && (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB) {
324 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
325 iface->cur_mode |= KW_I2C_MODE_COMBINED;
328 /* Original driver had this limitation */
332 if (pmac_low_i2c_lock(iface->node))
335 pr_debug("chan: %d, addr: 0x%x, transfer len: %d, read: %d\n",
336 chan->chan_no, addr, len, read_write == I2C_SMBUS_READ);
338 iface->data = buffer;
339 iface->datalen = len;
340 iface->state = state_addr;
342 iface->read_write = read_write;
344 /* Setup channel & clear pending irqs */
345 write_reg(reg_isr, read_reg(reg_isr));
346 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
347 write_reg(reg_status, 0);
349 /* Set up address and r/w bit */
351 (addr << 1) | ((read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
353 /* Set up the sub address */
354 if ((iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
355 || (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
356 write_reg(reg_subaddr, command);
360 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
361 add_timer(&iface->timeout_timer);
364 /* Start sending address & enable interrupt*/
365 write_reg(reg_control, KW_I2C_CTL_XADDR);
366 write_reg(reg_ier, KW_I2C_IRQ_MASK);
369 pr_debug("using polled mode...\n");
370 /* State machine, to turn into an interrupt handler */
371 while(iface->state != state_idle) {
374 u8 isr = wait_interrupt(iface);
375 spin_lock_irqsave(&iface->lock, flags);
376 handle_interrupt(iface, isr);
377 spin_unlock_irqrestore(&iface->lock, flags);
379 #else /* POLLED_MODE */
380 pr_debug("using interrupt mode...\n");
381 wait_for_completion(&iface->complete);
382 #endif /* POLLED_MODE */
385 pr_debug("transfer done, result: %d\n", rc);
387 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && read_write == I2C_SMBUS_READ)
388 data->word = le16_to_cpu(cur_word);
391 pmac_low_i2c_unlock(iface->node);
397 * Generic i2c master transfer entrypoint
400 keywest_xfer( struct i2c_adapter *adap,
401 struct i2c_msg *msgs,
404 struct keywest_chan* chan = i2c_get_adapdata(adap);
405 struct keywest_iface* iface = chan->iface;
406 struct i2c_msg *pmsg;
410 if (iface->state == state_dead)
413 if (pmac_low_i2c_lock(iface->node))
416 /* Set adapter to standard mode */
417 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
418 iface->cur_mode |= KW_I2C_MODE_STANDARD;
421 for (i = 0; rc >= 0 && i < num;) {
426 if (pmsg->flags & I2C_M_TEN) {
427 printk(KERN_ERR "i2c-keywest: 10 bits addr not supported !\n");
431 pr_debug("xfer: chan: %d, doing %s %d bytes to 0x%02x - %d of %d messages\n",
433 pmsg->flags & I2C_M_RD ? "read" : "write",
434 pmsg->len, addr, i, num);
436 /* Setup channel & clear pending irqs */
437 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
438 write_reg(reg_isr, read_reg(reg_isr));
439 write_reg(reg_status, 0);
441 iface->data = pmsg->buf;
442 iface->datalen = pmsg->len;
443 iface->state = state_addr;
445 if (pmsg->flags & I2C_M_RD)
446 iface->read_write = I2C_SMBUS_READ;
448 iface->read_write = I2C_SMBUS_WRITE;
450 /* Set up address and r/w bit */
451 if (pmsg->flags & I2C_M_REV_DIR_ADDR)
455 ((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
459 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
460 add_timer(&iface->timeout_timer);
463 /* Start sending address & enable interrupt*/
464 write_reg(reg_ier, KW_I2C_IRQ_MASK);
465 write_reg(reg_control, KW_I2C_CTL_XADDR);
468 pr_debug("using polled mode...\n");
469 /* State machine, to turn into an interrupt handler */
470 while(iface->state != state_idle) {
471 u8 isr = wait_interrupt(iface);
472 handle_interrupt(iface, isr);
474 #else /* POLLED_MODE */
475 pr_debug("using interrupt mode...\n");
476 wait_for_completion(&iface->complete);
477 #endif /* POLLED_MODE */
482 pr_debug("transfer done, result: %d\n", rc);
486 pmac_low_i2c_unlock(iface->node);
492 keywest_func(struct i2c_adapter * adapter)
494 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
495 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
496 I2C_FUNC_SMBUS_BLOCK_DATA;
499 /* For now, we only handle combined mode (smbus) */
500 static struct i2c_algorithm keywest_algorithm = {
501 .name = "Keywest i2c",
502 .id = I2C_ALGO_SMBUS,
503 .smbus_xfer = keywest_smbus_xfer,
504 .master_xfer = keywest_xfer,
505 .functionality = keywest_func,
510 create_iface(struct device_node *np, struct device *dev)
513 unsigned bsteps, tsize, i, nchan, addroffset;
514 struct keywest_iface* iface;
518 if (np->n_intrs < 1 || np->n_addrs < 1) {
519 printk(KERN_ERR "%s: Missing interrupt or address !\n",
523 if (pmac_low_i2c_lock(np))
526 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
527 steps = psteps ? (*psteps) : 0x10;
529 /* Hrm... maybe we can be smarter here */
530 for (bsteps = 0; (steps & 0x01) == 0; bsteps++)
533 if (np->parent->name[0] == 'u') {
541 tsize = sizeof(struct keywest_iface) +
542 (sizeof(struct keywest_chan) + 4) * nchan;
543 iface = (struct keywest_iface *) kmalloc(tsize, GFP_KERNEL);
545 printk(KERN_ERR "i2c-keywest: can't allocate inteface !\n");
546 pmac_low_i2c_unlock(np);
549 memset(iface, 0, tsize);
550 spin_lock_init(&iface->lock);
551 init_completion(&iface->complete);
552 iface->node = of_node_get(np);
553 iface->bsteps = bsteps;
554 iface->chan_count = nchan;
555 iface->state = state_idle;
556 iface->irq = np->intrs[0].line;
557 iface->channels = (struct keywest_chan *)
558 (((unsigned long)(iface + 1) + 3UL) & ~3UL);
559 iface->base = ioremap(np->addrs[0].address + addroffset,
562 printk(KERN_ERR "i2c-keywest: can't map inteface !\n");
564 pmac_low_i2c_unlock(np);
569 init_timer(&iface->timeout_timer);
570 iface->timeout_timer.function = keywest_timeout;
571 iface->timeout_timer.data = (unsigned long)iface;
574 /* Select interface rate */
575 iface->cur_mode = KW_I2C_MODE_100KHZ;
576 prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
577 if (prate) switch(*prate) {
579 iface->cur_mode = KW_I2C_MODE_100KHZ;
582 iface->cur_mode = KW_I2C_MODE_50KHZ;
585 iface->cur_mode = KW_I2C_MODE_25KHZ;
588 printk(KERN_WARNING "i2c-keywest: unknown rate %ldKhz, using 100KHz\n",
592 /* Select standard mode by default */
593 iface->cur_mode |= KW_I2C_MODE_STANDARD;
596 write_reg(reg_mode, iface->cur_mode);
598 /* Switch interrupts off & clear them*/
599 write_reg(reg_ier, 0x00);
600 write_reg(reg_isr, KW_I2C_IRQ_MASK);
603 /* Request chip interrupt */
604 rc = request_irq(iface->irq, keywest_irq, SA_INTERRUPT, "keywest i2c", iface);
606 printk(KERN_ERR "i2c-keywest: can't get IRQ %d !\n", iface->irq);
607 iounmap(iface->base);
609 pmac_low_i2c_unlock(np);
612 #endif /* POLLED_MODE */
614 pmac_low_i2c_unlock(np);
615 dev_set_drvdata(dev, iface);
617 for (i=0; i<nchan; i++) {
618 struct keywest_chan* chan = &iface->channels[i];
621 sprintf(chan->adapter.name, "%s %d", np->parent->name, i);
624 chan->adapter.id = I2C_ALGO_SMBUS;
625 chan->adapter.algo = &keywest_algorithm;
626 chan->adapter.algo_data = NULL;
627 chan->adapter.client_register = NULL;
628 chan->adapter.client_unregister = NULL;
629 i2c_set_adapdata(&chan->adapter, chan);
630 chan->adapter.dev.parent = dev;
632 rc = i2c_add_adapter(&chan->adapter);
634 printk("i2c-keywest.c: Adapter %s registration failed\n",
636 i2c_set_adapdata(&chan->adapter, NULL);
640 for (addr = 0x00; addr <= 0x7f; addr++) {
641 if (i2c_smbus_xfer(&chan->adapter,addr,
642 0,0,0,I2C_SMBUS_QUICK,NULL) >= 0)
643 printk("%02x ", addr);
649 printk(KERN_INFO "Found KeyWest i2c on \"%s\", %d channel%s, stepping: %d bits\n",
650 np->parent->name, nchan, nchan > 1 ? "s" : "", bsteps);
656 dispose_iface(struct device *dev)
658 struct keywest_iface *iface = dev_get_drvdata(dev);
661 /* Make sure we stop all activity */
662 if (pmac_low_i2c_lock(iface->node))
666 spin_lock_irq(&iface->lock);
667 while (iface->state != state_idle) {
668 spin_unlock_irq(&iface->lock);
670 spin_lock_irq(&iface->lock);
672 #endif /* POLLED_MODE */
673 iface->state = state_dead;
675 spin_unlock_irq(&iface->lock);
676 free_irq(iface->irq, iface);
677 #endif /* POLLED_MODE */
679 pmac_low_i2c_unlock(iface->node);
681 /* Release all channels */
682 for (i=0; i<iface->chan_count; i++) {
683 struct keywest_chan* chan = &iface->channels[i];
684 if (i2c_get_adapdata(&chan->adapter) == NULL)
686 rc = i2c_del_adapter(&chan->adapter);
687 i2c_set_adapdata(&chan->adapter, NULL);
688 /* We aren't that prepared to deal with this... */
690 printk("i2c-keywest.c: i2c_del_adapter failed, that's bad !\n");
692 iounmap(iface->base);
693 dev_set_drvdata(dev, NULL);
694 of_node_put(iface->node);
701 create_iface_macio(struct macio_dev* dev, const struct of_match *match)
703 return create_iface(dev->ofdev.node, &dev->ofdev.dev);
707 dispose_iface_macio(struct macio_dev* dev)
709 return dispose_iface(&dev->ofdev.dev);
713 create_iface_of_platform(struct of_device* dev, const struct of_match *match)
715 return create_iface(dev->node, &dev->dev);
719 dispose_iface_of_platform(struct of_device* dev)
721 return dispose_iface(&dev->dev);
724 static struct of_match i2c_keywest_match[] =
727 .name = OF_ANY_MATCH,
729 .compatible = "keywest"
734 static struct macio_driver i2c_keywest_macio_driver =
736 .name = "i2c-keywest",
737 .match_table = i2c_keywest_match,
738 .probe = create_iface_macio,
739 .remove = dispose_iface_macio
742 static struct of_platform_driver i2c_keywest_of_platform_driver =
744 .name = "i2c-keywest",
745 .match_table = i2c_keywest_match,
746 .probe = create_iface_of_platform,
747 .remove = dispose_iface_of_platform
751 i2c_keywest_init(void)
753 of_register_driver(&i2c_keywest_of_platform_driver);
754 macio_register_driver(&i2c_keywest_macio_driver);
760 i2c_keywest_cleanup(void)
762 of_unregister_driver(&i2c_keywest_of_platform_driver);
763 macio_unregister_driver(&i2c_keywest_macio_driver);
766 module_init(i2c_keywest_init);
767 module_exit(i2c_keywest_cleanup);