git.oblomov.eu Git - linux-2.6/blob - drivers/video/s3c2410fb.c

   1 /*
   2  * linux/drivers/video/s3c2410fb.c
   3  *      Copyright (c) Arnaud Patard, Ben Dooks
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file COPYING in the main directory of this archive for
   7  * more details.
   8  *
   9  *          S3C2410 LCD Controller Frame Buffer Driver
  10  *          based on skeletonfb.c, sa1100fb.c and others
  11  *
  12  * ChangeLog
  13  * 2005-04-07: Arnaud Patard <arnaud.patard@rtp-net.org>
  14  *      - u32 state -> pm_message_t state
  15  *      - S3C2410_{VA,SZ}_LCD -> S3C24XX
  16  *
  17  * 2005-03-15: Arnaud Patard <arnaud.patard@rtp-net.org>
  18  *      - Removed the ioctl
  19  *      - use readl/writel instead of __raw_writel/__raw_readl
  20  *
  21  * 2004-12-04: Arnaud Patard <arnaud.patard@rtp-net.org>
  22  *      - Added the possibility to set on or off the
  23  *      debugging mesaages
  24  *      - Replaced 0 and 1 by on or off when reading the
  25  *      /sys files
  26  *
  27  * 2005-03-23: Ben Dooks <ben-linux@fluff.org>
  28  *      - added non 16bpp modes
  29  *      - updated platform information for range of x/y/bpp
  30  *      - add code to ensure palette is written correctly
  31  *      - add pixel clock divisor control
  32  *
  33  * 2004-11-11: Arnaud Patard <arnaud.patard@rtp-net.org>
  34  *      - Removed the use of currcon as it no more exist
  35  *      - Added LCD power sysfs interface
  36  *
  37  * 2004-11-03: Ben Dooks <ben-linux@fluff.org>
  38  *      - minor cleanups
  39  *      - add suspend/resume support
  40  *      - s3c2410fb_setcolreg() not valid in >8bpp modes
  41  *      - removed last CONFIG_FB_S3C2410_FIXED
  42  *      - ensure lcd controller stopped before cleanup
  43  *      - added sysfs interface for backlight power
  44  *      - added mask for gpio configuration
  45  *      - ensured IRQs disabled during GPIO configuration
  46  *      - disable TPAL before enabling video
  47  *
  48  * 2004-09-20: Arnaud Patard <arnaud.patard@rtp-net.org>
  49  *      - Suppress command line options
  50  *
  51  * 2004-09-15: Arnaud Patard <arnaud.patard@rtp-net.org>
  52  *      - code cleanup
  53  *
  54  * 2004-09-07: Arnaud Patard <arnaud.patard@rtp-net.org>
  55  *      - Renamed from h1940fb.c to s3c2410fb.c
  56  *      - Add support for different devices
  57  *      - Backlight support
  58  *
  59  * 2004-09-05: Herbert Pötzl <herbert@13thfloor.at>
  60  *      - added clock (de-)allocation code
  61  *      - added fixem fbmem option
  62  *
  63  * 2004-07-27: Arnaud Patard <arnaud.patard@rtp-net.org>
  64  *      - code cleanup
  65  *      - added a forgotten return in h1940fb_init
  66  *
  67  * 2004-07-19: Herbert Pötzl <herbert@13thfloor.at>
  68  *      - code cleanup and extended debugging
  69  *
  70  * 2004-07-15: Arnaud Patard <arnaud.patard@rtp-net.org>
  71  *      - First version
  72  */
  73
  74 #include <linux/module.h>
  75 #include <linux/kernel.h>
  76 #include <linux/errno.h>
  77 #include <linux/string.h>
  78 #include <linux/mm.h>
  79 #include <linux/slab.h>
  80 #include <linux/delay.h>
  81 #include <linux/fb.h>
  82 #include <linux/init.h>
  83 #include <linux/dma-mapping.h>
  84 #include <linux/interrupt.h>
  85 #include <linux/workqueue.h>
  86 #include <linux/wait.h>
  87 #include <linux/platform_device.h>
  88 #include <linux/clk.h>
  89
  90 #include <asm/io.h>
  91 #include <asm/uaccess.h>
  92 #include <asm/div64.h>
  93
  94 #include <asm/mach/map.h>
  95 #include <asm/arch/regs-lcd.h>
  96 #include <asm/arch/regs-gpio.h>
  97 #include <asm/arch/fb.h>
  98
  99 #ifdef CONFIG_PM
 100 #include <linux/pm.h>
 101 #endif
 102
 103 #include "s3c2410fb.h"
 104
 105
 106 static struct s3c2410fb_mach_info *mach_info;
 107
 108 /* Debugging stuff */
 109 #ifdef CONFIG_FB_S3C2410_DEBUG
 110 static int debug           = 1;
 111 #else
 112 static int debug           = 0;
 113 #endif
 114
 115 #define dprintk(msg...) if (debug) { printk(KERN_DEBUG "s3c2410fb: " msg); }
 116
 117 /* useful functions */
 118
 119 /* s3c2410fb_set_lcdaddr
 120  *
 121  * initialise lcd controller address pointers
 122 */
 123
 124 static void s3c2410fb_set_lcdaddr(struct s3c2410fb_info *fbi)
 125 {
 126         struct fb_var_screeninfo *var = &fbi->fb->var;
 127         unsigned long saddr1, saddr2, saddr3;
 128
 129         saddr1  = fbi->fb->fix.smem_start >> 1;
 130         saddr2  = fbi->fb->fix.smem_start;
 131         saddr2 += (var->xres * var->yres * var->bits_per_pixel)/8;
 132         saddr2>>= 1;
 133
 134         saddr3 =  S3C2410_OFFSIZE(0) | S3C2410_PAGEWIDTH((var->xres * var->bits_per_pixel / 16) & 0x3ff);
 135
 136         dprintk("LCDSADDR1 = 0x%08lx\n", saddr1);
 137         dprintk("LCDSADDR2 = 0x%08lx\n", saddr2);
 138         dprintk("LCDSADDR3 = 0x%08lx\n", saddr3);
 139
 140         writel(saddr1, S3C2410_LCDSADDR1);
 141         writel(saddr2, S3C2410_LCDSADDR2);
 142         writel(saddr3, S3C2410_LCDSADDR3);
 143 }
 144
 145 /* s3c2410fb_calc_pixclk()
 146  *
 147  * calculate divisor for clk->pixclk
 148 */
 149
 150 static unsigned int s3c2410fb_calc_pixclk(struct s3c2410fb_info *fbi,
 151                                           unsigned long pixclk)
 152 {
 153         unsigned long clk = clk_get_rate(fbi->clk);
 154         unsigned long long div;
 155
 156         /* pixclk is in picoseoncds, our clock is in Hz
 157          *
 158          * Hz -> picoseconds is / 10^-12
 159          */
 160
 161         div = (unsigned long long)clk * pixclk;
 162         do_div(div,1000000UL);
 163         do_div(div,1000000UL);
 164
 165         dprintk("pixclk %ld, divisor is %ld\n", pixclk, (long)div);
 166         return div;
 167 }
 168
 169 /*
 170  *      s3c2410fb_check_var():
 171  *      Get the video params out of 'var'. If a value doesn't fit, round it up,
 172  *      if it's too big, return -EINVAL.
 173  *
 174  */
 175 static int s3c2410fb_check_var(struct fb_var_screeninfo *var,
 176                                struct fb_info *info)
 177 {
 178         struct s3c2410fb_info *fbi = info->par;
 179
 180         dprintk("check_var(var=%p, info=%p)\n", var, info);
 181
 182         /* validate x/y resolution */
 183
 184         if (var->yres > fbi->mach_info->yres.max)
 185                 var->yres = fbi->mach_info->yres.max;
 186         else if (var->yres < fbi->mach_info->yres.min)
 187                 var->yres = fbi->mach_info->yres.min;
 188
 189         if (var->xres > fbi->mach_info->xres.max)
 190                 var->yres = fbi->mach_info->xres.max;
 191         else if (var->xres < fbi->mach_info->xres.min)
 192                 var->xres = fbi->mach_info->xres.min;
 193
 194         /* validate bpp */
 195
 196         if (var->bits_per_pixel > fbi->mach_info->bpp.max)
 197                 var->bits_per_pixel = fbi->mach_info->bpp.max;
 198         else if (var->bits_per_pixel < fbi->mach_info->bpp.min)
 199                 var->bits_per_pixel = fbi->mach_info->bpp.min;
 200
 201         /* set r/g/b positions */
 202         switch (var->bits_per_pixel) {
 203                 case 1:
 204                 case 2:
 205                 case 4:
 206                         var->red.offset         = 0;
 207                         var->red.length         = var->bits_per_pixel;
 208                         var->green              = var->red;
 209                         var->blue               = var->red;
 210                         var->transp.offset      = 0;
 211                         var->transp.length      = 0;
 212                         break;
 213                 case 8:
 214                         if ( fbi->mach_info->type != S3C2410_LCDCON1_TFT ) {
 215                                 /* 8 bpp 332 */
 216                                 var->red.length         = 3;
 217                                 var->red.offset         = 5;
 218                                 var->green.length       = 3;
 219                                 var->green.offset       = 2;
 220                                 var->blue.length        = 2;
 221                                 var->blue.offset        = 0;
 222                                 var->transp.length      = 0;
 223                         } else {
 224                                 var->red.offset         = 0;
 225                                 var->red.length         = var->bits_per_pixel;
 226                                 var->green              = var->red;
 227                                 var->blue               = var->red;
 228                                 var->transp.offset      = 0;
 229                                 var->transp.length      = 0;
 230                         }
 231                         break;
 232                 case 12:
 233                         /* 12 bpp 444 */
 234                         var->red.length         = 4;
 235                         var->red.offset         = 8;
 236                         var->green.length       = 4;
 237                         var->green.offset       = 4;
 238                         var->blue.length        = 4;
 239                         var->blue.offset        = 0;
 240                         var->transp.length      = 0;
 241                         break;
 242
 243                 default:
 244                 case 16:
 245                         if (fbi->regs.lcdcon5 & S3C2410_LCDCON5_FRM565 ) {
 246                                 /* 16 bpp, 565 format */
 247                                 var->red.offset         = 11;
 248                                 var->green.offset       = 5;
 249                                 var->blue.offset        = 0;
 250                                 var->red.length         = 5;
 251                                 var->green.length       = 6;
 252                                 var->blue.length        = 5;
 253                                 var->transp.length      = 0;
 254                         } else {
 255                                 /* 16 bpp, 5551 format */
 256                                 var->red.offset         = 11;
 257                                 var->green.offset       = 6;
 258                                 var->blue.offset        = 1;
 259                                 var->red.length         = 5;
 260                                 var->green.length       = 5;
 261                                 var->blue.length        = 5;
 262                                 var->transp.length      = 0;
 263                         }
 264                         break;
 265                 case 24:
 266                         /* 24 bpp 888 */
 267                         var->red.length         = 8;
 268                         var->red.offset         = 16;
 269                         var->green.length       = 8;
 270                         var->green.offset       = 8;
 271                         var->blue.length        = 8;
 272                         var->blue.offset        = 0;
 273                         var->transp.length      = 0;
 274                         break;
 275
 276
 277         }
 278         return 0;
 279 }
 280
 281
 282 /* s3c2410fb_activate_var
 283  *
 284  * activate (set) the controller from the given framebuffer
 285  * information
 286 */
 287
 288 static void s3c2410fb_activate_var(struct s3c2410fb_info *fbi,
 289                                    struct fb_var_screeninfo *var)
 290 {
 291         int hs;
 292
 293         fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK;
 294         fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_TFT;
 295
 296         dprintk("%s: var->xres  = %d\n", __FUNCTION__, var->xres);
 297         dprintk("%s: var->yres  = %d\n", __FUNCTION__, var->yres);
 298         dprintk("%s: var->bpp   = %d\n", __FUNCTION__, var->bits_per_pixel);
 299
 300         fbi->regs.lcdcon1 |= fbi->mach_info->type;
 301
 302         if (fbi->mach_info->type == S3C2410_LCDCON1_TFT)
 303                 switch (var->bits_per_pixel) {
 304                 case 1:
 305                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT1BPP;
 306                         break;
 307                 case 2:
 308                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT2BPP;
 309                         break;
 310                 case 4:
 311                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT4BPP;
 312                         break;
 313                 case 8:
 314                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT8BPP;
 315                         break;
 316                 case 16:
 317                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT16BPP;
 318                         break;
 319
 320                 default:
 321                         /* invalid pixel depth */
 322                         dev_err(fbi->dev, "invalid bpp %d\n", var->bits_per_pixel);
 323                 }
 324         else
 325                 switch (var->bits_per_pixel) {
 326                 case 1:
 327                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN1BPP;
 328                         break;
 329                 case 2:
 330                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN2GREY;
 331                         break;
 332                 case 4:
 333                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN4GREY;
 334                         break;
 335                 case 8:
 336                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN8BPP;
 337                         break;
 338                 case 12:
 339                         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN12BPP;
 340                         break;
 341
 342                 default:
 343                         /* invalid pixel depth */
 344                         dev_err(fbi->dev, "invalid bpp %d\n", var->bits_per_pixel);
 345                 }
 346
 347         /* check to see if we need to update sync/borders */
 348
 349         if (!fbi->mach_info->fixed_syncs) {
 350                 dprintk("setting vert: up=%d, low=%d, sync=%d\n",
 351                         var->upper_margin, var->lower_margin,
 352                         var->vsync_len);
 353
 354                 dprintk("setting horz: lft=%d, rt=%d, sync=%d\n",
 355                         var->left_margin, var->right_margin,
 356                         var->hsync_len);
 357
 358                 fbi->regs.lcdcon2 =
 359                         S3C2410_LCDCON2_VBPD(var->upper_margin - 1) |
 360                         S3C2410_LCDCON2_VFPD(var->lower_margin - 1) |
 361                         S3C2410_LCDCON2_VSPW(var->vsync_len - 1);
 362
 363                 fbi->regs.lcdcon3 =
 364                         S3C2410_LCDCON3_HBPD(var->right_margin - 1) |
 365                         S3C2410_LCDCON3_HFPD(var->left_margin - 1);
 366
 367                 fbi->regs.lcdcon4 &= ~S3C2410_LCDCON4_HSPW(0xff);
 368                 fbi->regs.lcdcon4 |=  S3C2410_LCDCON4_HSPW(var->hsync_len - 1);
 369         }
 370
 371         /* update X/Y info */
 372
 373         fbi->regs.lcdcon2 &= ~S3C2410_LCDCON2_LINEVAL(0x3ff);
 374         fbi->regs.lcdcon2 |=  S3C2410_LCDCON2_LINEVAL(var->yres - 1);
 375
 376         switch(fbi->mach_info->type) {
 377                 case S3C2410_LCDCON1_DSCAN4:
 378                 case S3C2410_LCDCON1_STN8:
 379                         hs = var->xres / 8;
 380                         break;
 381                 case S3C2410_LCDCON1_STN4:
 382                         hs = var->xres / 4;
 383                         break;
 384                 default:
 385                 case S3C2410_LCDCON1_TFT:
 386                         hs = var->xres;
 387                         break;
 388
 389         }
 390
 391         /* Special cases : STN color displays */
 392         if ( ((fbi->regs.lcdcon1 & S3C2410_LCDCON1_MODEMASK) == S3C2410_LCDCON1_STN8BPP) \
 393           || ((fbi->regs.lcdcon1 & S3C2410_LCDCON1_MODEMASK) == S3C2410_LCDCON1_STN12BPP) ) {
 394                 hs = hs * 3;
 395         }
 396
 397
 398         fbi->regs.lcdcon3 &= ~S3C2410_LCDCON3_HOZVAL(0x7ff);
 399         fbi->regs.lcdcon3 |=  S3C2410_LCDCON3_HOZVAL(hs - 1);
 400
 401         if (var->pixclock > 0) {
 402                 int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock);
 403
 404                 if (fbi->mach_info->type == S3C2410_LCDCON1_TFT) {
 405                         clkdiv = (clkdiv / 2) -1;
 406                         if (clkdiv < 0)
 407                                 clkdiv = 0;
 408                 }
 409                 else {
 410                         clkdiv = (clkdiv / 2);
 411                         if (clkdiv < 2)
 412                                 clkdiv = 2;
 413                 }
 414
 415                 fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_CLKVAL(0x3ff);
 416                 fbi->regs.lcdcon1 |=  S3C2410_LCDCON1_CLKVAL(clkdiv);
 417         }
 418
 419         /* write new registers */
 420
 421         dprintk("new register set:\n");
 422         dprintk("lcdcon[1] = 0x%08lx\n", fbi->regs.lcdcon1);
 423         dprintk("lcdcon[2] = 0x%08lx\n", fbi->regs.lcdcon2);
 424         dprintk("lcdcon[3] = 0x%08lx\n", fbi->regs.lcdcon3);
 425         dprintk("lcdcon[4] = 0x%08lx\n", fbi->regs.lcdcon4);
 426         dprintk("lcdcon[5] = 0x%08lx\n", fbi->regs.lcdcon5);
 427
 428         writel(fbi->regs.lcdcon1 & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1);
 429         writel(fbi->regs.lcdcon2, S3C2410_LCDCON2);
 430         writel(fbi->regs.lcdcon3, S3C2410_LCDCON3);
 431         writel(fbi->regs.lcdcon4, S3C2410_LCDCON4);
 432         writel(fbi->regs.lcdcon5, S3C2410_LCDCON5);
 433
 434         /* set lcd address pointers */
 435         s3c2410fb_set_lcdaddr(fbi);
 436
 437         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
 438 }
 439
 440
 441 /*
 442  *      s3c2410fb_set_par - Optional function. Alters the hardware state.
 443  *      @info: frame buffer structure that represents a single frame buffer
 444  *
 445  */
 446 static int s3c2410fb_set_par(struct fb_info *info)
 447 {
 448         struct s3c2410fb_info *fbi = info->par;
 449         struct fb_var_screeninfo *var = &info->var;
 450
 451         switch (var->bits_per_pixel)
 452         {
 453                 case 16:
 454                         fbi->fb->fix.visual = FB_VISUAL_TRUECOLOR;
 455                         break;
 456                 case 1:
 457                          fbi->fb->fix.visual = FB_VISUAL_MONO01;
 458                          break;
 459                 default:
 460                          fbi->fb->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 461                          break;
 462         }
 463
 464         fbi->fb->fix.line_length     = (var->width*var->bits_per_pixel)/8;
 465
 466         /* activate this new configuration */
 467
 468         s3c2410fb_activate_var(fbi, var);
 469         return 0;
 470 }
 471
 472 static void schedule_palette_update(struct s3c2410fb_info *fbi,
 473                                     unsigned int regno, unsigned int val)
 474 {
 475         unsigned long flags;
 476         unsigned long irqen;
 477
 478         local_irq_save(flags);
 479
 480         fbi->palette_buffer[regno] = val;
 481
 482         if (!fbi->palette_ready) {
 483                 fbi->palette_ready = 1;
 484
 485                 /* enable IRQ */
 486                 irqen = readl(S3C2410_LCDINTMSK);
 487                 irqen &= ~S3C2410_LCDINT_FRSYNC;
 488                 writel(irqen, S3C2410_LCDINTMSK);
 489         }
 490
 491         local_irq_restore(flags);
 492 }
 493
 494 /* from pxafb.c */
 495 static inline unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf)
 496 {
 497         chan &= 0xffff;
 498         chan >>= 16 - bf->length;
 499         return chan << bf->offset;
 500 }
 501
 502 static int s3c2410fb_setcolreg(unsigned regno,
 503                                unsigned red, unsigned green, unsigned blue,
 504                                unsigned transp, struct fb_info *info)
 505 {
 506         struct s3c2410fb_info *fbi = info->par;
 507         unsigned int val;
 508
 509         /* dprintk("setcol: regno=%d, rgb=%d,%d,%d\n", regno, red, green, blue); */
 510
 511         switch (fbi->fb->fix.visual) {
 512         case FB_VISUAL_TRUECOLOR:
 513                 /* true-colour, use pseuo-palette */
 514
 515                 if (regno < 16) {
 516                         u32 *pal = fbi->fb->pseudo_palette;
 517
 518                         val  = chan_to_field(red,   &fbi->fb->var.red);
 519                         val |= chan_to_field(green, &fbi->fb->var.green);
 520                         val |= chan_to_field(blue,  &fbi->fb->var.blue);
 521
 522                         pal[regno] = val;
 523                 }
 524                 break;
 525
 526         case FB_VISUAL_PSEUDOCOLOR:
 527                 if (regno < 256) {
 528                         /* currently assume RGB 5-6-5 mode */
 529
 530                         val  = ((red   >>  0) & 0xf800);
 531                         val |= ((green >>  5) & 0x07e0);
 532                         val |= ((blue  >> 11) & 0x001f);
 533
 534                         writel(val, S3C2410_TFTPAL(regno));
 535                         schedule_palette_update(fbi, regno, val);
 536                 }
 537
 538                 break;
 539
 540         default:
 541                 return 1;   /* unknown type */
 542         }
 543
 544         return 0;
 545 }
 546
 547
 548 /**
 549  *      s3c2410fb_blank
 550  *      @blank_mode: the blank mode we want.
 551  *      @info: frame buffer structure that represents a single frame buffer
 552  *
 553  *      Blank the screen if blank_mode != 0, else unblank. Return 0 if
 554  *      blanking succeeded, != 0 if un-/blanking failed due to e.g. a
 555  *      video mode which doesn't support it. Implements VESA suspend
 556  *      and powerdown modes on hardware that supports disabling hsync/vsync:
 557  *      blank_mode == 2: suspend vsync
 558  *      blank_mode == 3: suspend hsync
 559  *      blank_mode == 4: powerdown
 560  *
 561  *      Returns negative errno on error, or zero on success.
 562  *
 563  */
 564 static int s3c2410fb_blank(int blank_mode, struct fb_info *info)
 565 {
 566         dprintk("blank(mode=%d, info=%p)\n", blank_mode, info);
 567
 568         if (mach_info == NULL)
 569                 return -EINVAL;
 570
 571         if (blank_mode == FB_BLANK_UNBLANK)
 572                 writel(0x0, S3C2410_TPAL);
 573         else {
 574                 dprintk("setting TPAL to output 0x000000\n");
 575                 writel(S3C2410_TPAL_EN, S3C2410_TPAL);
 576         }
 577
 578         return 0;
 579 }
 580
 581 static int s3c2410fb_debug_show(struct device *dev, struct device_attribute *attr, char *buf)
 582 {
 583         return snprintf(buf, PAGE_SIZE, "%s\n", debug ? "on" : "off");
 584 }
 585 static int s3c2410fb_debug_store(struct device *dev, struct device_attribute *attr,
 586                                            const char *buf, size_t len)
 587 {
 588         if (mach_info == NULL)
 589                 return -EINVAL;
 590
 591         if (len < 1)
 592                 return -EINVAL;
 593
 594         if (strnicmp(buf, "on", 2) == 0 ||
 595             strnicmp(buf, "1", 1) == 0) {
 596                 debug = 1;
 597                 printk(KERN_DEBUG "s3c2410fb: Debug On");
 598         } else if (strnicmp(buf, "off", 3) == 0 ||
 599                    strnicmp(buf, "0", 1) == 0) {
 600                 debug = 0;
 601                 printk(KERN_DEBUG "s3c2410fb: Debug Off");
 602         } else {
 603                 return -EINVAL;
 604         }
 605
 606         return len;
 607 }
 608
 609
 610 static DEVICE_ATTR(debug, 0666,
 611                    s3c2410fb_debug_show,
 612                    s3c2410fb_debug_store);
 613
 614 static struct fb_ops s3c2410fb_ops = {
 615         .owner          = THIS_MODULE,
 616         .fb_check_var   = s3c2410fb_check_var,
 617         .fb_set_par     = s3c2410fb_set_par,
 618         .fb_blank       = s3c2410fb_blank,
 619         .fb_setcolreg   = s3c2410fb_setcolreg,
 620         .fb_fillrect    = cfb_fillrect,
 621         .fb_copyarea    = cfb_copyarea,
 622         .fb_imageblit   = cfb_imageblit,
 623 };
 624
 625
 626 /*
 627  * s3c2410fb_map_video_memory():
 628  *      Allocates the DRAM memory for the frame buffer.  This buffer is
 629  *      remapped into a non-cached, non-buffered, memory region to
 630  *      allow palette and pixel writes to occur without flushing the
 631  *      cache.  Once this area is remapped, all virtual memory
 632  *      access to the video memory should occur at the new region.
 633  */
 634 static int __init s3c2410fb_map_video_memory(struct s3c2410fb_info *fbi)
 635 {
 636         dprintk("map_video_memory(fbi=%p)\n", fbi);
 637
 638         fbi->map_size = PAGE_ALIGN(fbi->fb->fix.smem_len + PAGE_SIZE);
 639         fbi->map_cpu  = dma_alloc_writecombine(fbi->dev, fbi->map_size,
 640                                                &fbi->map_dma, GFP_KERNEL);
 641
 642         fbi->map_size = fbi->fb->fix.smem_len;
 643
 644         if (fbi->map_cpu) {
 645                 /* prevent initial garbage on screen */
 646                 dprintk("map_video_memory: clear %p:%08x\n",
 647                         fbi->map_cpu, fbi->map_size);
 648                 memset(fbi->map_cpu, 0xf0, fbi->map_size);
 649
 650                 fbi->screen_dma         = fbi->map_dma;
 651                 fbi->fb->screen_base    = fbi->map_cpu;
 652                 fbi->fb->fix.smem_start  = fbi->screen_dma;
 653
 654                 dprintk("map_video_memory: dma=%08x cpu=%p size=%08x\n",
 655                         fbi->map_dma, fbi->map_cpu, fbi->fb->fix.smem_len);
 656         }
 657
 658         return fbi->map_cpu ? 0 : -ENOMEM;
 659 }
 660
 661 static inline void s3c2410fb_unmap_video_memory(struct s3c2410fb_info *fbi)
 662 {
 663         dma_free_writecombine(fbi->dev,fbi->map_size,fbi->map_cpu, fbi->map_dma);
 664 }
 665
 666 static inline void modify_gpio(void __iomem *reg,
 667                                unsigned long set, unsigned long mask)
 668 {
 669         unsigned long tmp;
 670
 671         tmp = readl(reg) & ~mask;
 672         writel(tmp | set, reg);
 673 }
 674
 675
 676 /*
 677  * s3c2410fb_init_registers - Initialise all LCD-related registers
 678  */
 679
 680 static int s3c2410fb_init_registers(struct s3c2410fb_info *fbi)
 681 {
 682         unsigned long flags;
 683
 684         /* Initialise LCD with values from haret */
 685
 686         local_irq_save(flags);
 687
 688         /* modify the gpio(s) with interrupts set (bjd) */
 689
 690         modify_gpio(S3C2410_GPCUP,  mach_info->gpcup,  mach_info->gpcup_mask);
 691         modify_gpio(S3C2410_GPCCON, mach_info->gpccon, mach_info->gpccon_mask);
 692         modify_gpio(S3C2410_GPDUP,  mach_info->gpdup,  mach_info->gpdup_mask);
 693         modify_gpio(S3C2410_GPDCON, mach_info->gpdcon, mach_info->gpdcon_mask);
 694
 695         local_irq_restore(flags);
 696
 697         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
 698         writel(fbi->regs.lcdcon2, S3C2410_LCDCON2);
 699         writel(fbi->regs.lcdcon3, S3C2410_LCDCON3);
 700         writel(fbi->regs.lcdcon4, S3C2410_LCDCON4);
 701         writel(fbi->regs.lcdcon5, S3C2410_LCDCON5);
 702
 703         s3c2410fb_set_lcdaddr(fbi);
 704
 705         dprintk("LPCSEL    = 0x%08lx\n", mach_info->lpcsel);
 706         writel(mach_info->lpcsel, S3C2410_LPCSEL);
 707
 708         dprintk("replacing TPAL %08x\n", readl(S3C2410_TPAL));
 709
 710         /* ensure temporary palette disabled */
 711         writel(0x00, S3C2410_TPAL);
 712
 713         /* Enable video by setting the ENVID bit to 1 */
 714         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID;
 715         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
 716         return 0;
 717 }
 718
 719 static void s3c2410fb_write_palette(struct s3c2410fb_info *fbi)
 720 {
 721         unsigned int i;
 722         unsigned long ent;
 723
 724         fbi->palette_ready = 0;
 725
 726         for (i = 0; i < 256; i++) {
 727                 if ((ent = fbi->palette_buffer[i]) == PALETTE_BUFF_CLEAR)
 728                         continue;
 729
 730                 writel(ent, S3C2410_TFTPAL(i));
 731
 732                 /* it seems the only way to know exactly
 733                  * if the palette wrote ok, is to check
 734                  * to see if the value verifies ok
 735                  */
 736
 737                 if (readw(S3C2410_TFTPAL(i)) == ent)
 738                         fbi->palette_buffer[i] = PALETTE_BUFF_CLEAR;
 739                 else
 740                         fbi->palette_ready = 1;   /* retry */
 741         }
 742 }
 743
 744 static irqreturn_t s3c2410fb_irq(int irq, void *dev_id)
 745 {
 746         struct s3c2410fb_info *fbi = dev_id;
 747         unsigned long lcdirq = readl(S3C2410_LCDINTPND);
 748
 749         if (lcdirq & S3C2410_LCDINT_FRSYNC) {
 750                 if (fbi->palette_ready)
 751                         s3c2410fb_write_palette(fbi);
 752
 753                 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDINTPND);
 754                 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDSRCPND);
 755         }
 756
 757         return IRQ_HANDLED;
 758 }
 759
 760 static char driver_name[]="s3c2410fb";
 761
 762 static int __init s3c2410fb_probe(struct platform_device *pdev)
 763 {
 764         struct s3c2410fb_info *info;
 765         struct fb_info     *fbinfo;
 766         struct s3c2410fb_hw *mregs;
 767         int ret;
 768         int irq;
 769         int i;
 770         u32 lcdcon1;
 771
 772         mach_info = pdev->dev.platform_data;
 773         if (mach_info == NULL) {
 774                 dev_err(&pdev->dev,"no platform data for lcd, cannot attach\n");
 775                 return -EINVAL;
 776         }
 777
 778         mregs = &mach_info->regs;
 779
 780         irq = platform_get_irq(pdev, 0);
 781         if (irq < 0) {
 782                 dev_err(&pdev->dev, "no irq for device\n");
 783                 return -ENOENT;
 784         }
 785
 786         fbinfo = framebuffer_alloc(sizeof(struct s3c2410fb_info), &pdev->dev);
 787         if (!fbinfo) {
 788                 return -ENOMEM;
 789         }
 790
 791
 792         info = fbinfo->par;
 793         info->fb = fbinfo;
 794         info->dev = &pdev->dev;
 795
 796         platform_set_drvdata(pdev, fbinfo);
 797
 798         dprintk("devinit\n");
 799
 800         strcpy(fbinfo->fix.id, driver_name);
 801
 802         memcpy(&info->regs, &mach_info->regs, sizeof(info->regs));
 803
 804         /* Stop the video and unset ENVID if set */
 805         info->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;
 806         lcdcon1 = readl(S3C2410_LCDCON1);
 807         writel(lcdcon1 & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1);
 808
 809         info->mach_info             = pdev->dev.platform_data;
 810
 811         fbinfo->fix.type            = FB_TYPE_PACKED_PIXELS;
 812         fbinfo->fix.type_aux        = 0;
 813         fbinfo->fix.xpanstep        = 0;
 814         fbinfo->fix.ypanstep        = 0;
 815         fbinfo->fix.ywrapstep       = 0;
 816         fbinfo->fix.accel           = FB_ACCEL_NONE;
 817
 818         fbinfo->var.nonstd          = 0;
 819         fbinfo->var.activate        = FB_ACTIVATE_NOW;
 820         fbinfo->var.height          = mach_info->height;
 821         fbinfo->var.width           = mach_info->width;
 822         fbinfo->var.accel_flags     = 0;
 823         fbinfo->var.vmode           = FB_VMODE_NONINTERLACED;
 824
 825         fbinfo->fbops               = &s3c2410fb_ops;
 826         fbinfo->flags               = FBINFO_FLAG_DEFAULT;
 827         fbinfo->pseudo_palette      = &info->pseudo_pal;
 828
 829         fbinfo->var.xres            = mach_info->xres.defval;
 830         fbinfo->var.xres_virtual    = mach_info->xres.defval;
 831         fbinfo->var.yres            = mach_info->yres.defval;
 832         fbinfo->var.yres_virtual    = mach_info->yres.defval;
 833         fbinfo->var.bits_per_pixel  = mach_info->bpp.defval;
 834
 835         fbinfo->var.upper_margin    = S3C2410_LCDCON2_GET_VBPD(mregs->lcdcon2) + 1;
 836         fbinfo->var.lower_margin    = S3C2410_LCDCON2_GET_VFPD(mregs->lcdcon2) + 1;
 837         fbinfo->var.vsync_len       = S3C2410_LCDCON2_GET_VSPW(mregs->lcdcon2) + 1;
 838
 839         fbinfo->var.left_margin     = S3C2410_LCDCON3_GET_HFPD(mregs->lcdcon3) + 1;
 840         fbinfo->var.right_margin    = S3C2410_LCDCON3_GET_HBPD(mregs->lcdcon3) + 1;
 841         fbinfo->var.hsync_len       = S3C2410_LCDCON4_GET_HSPW(mregs->lcdcon4) + 1;
 842
 843         fbinfo->var.red.offset      = 11;
 844         fbinfo->var.green.offset    = 5;
 845         fbinfo->var.blue.offset     = 0;
 846         fbinfo->var.transp.offset   = 0;
 847         fbinfo->var.red.length      = 5;
 848         fbinfo->var.green.length    = 6;
 849         fbinfo->var.blue.length     = 5;
 850         fbinfo->var.transp.length   = 0;
 851         fbinfo->fix.smem_len        =   mach_info->xres.max *
 852                                         mach_info->yres.max *
 853                                         mach_info->bpp.max / 8;
 854
 855         for (i = 0; i < 256; i++)
 856                 info->palette_buffer[i] = PALETTE_BUFF_CLEAR;
 857
 858         if (!request_mem_region((unsigned long)S3C24XX_VA_LCD, SZ_1M, "s3c2410-lcd")) {
 859                 ret = -EBUSY;
 860                 goto dealloc_fb;
 861         }
 862
 863
 864         dprintk("got LCD region\n");
 865
 866         ret = request_irq(irq, s3c2410fb_irq, IRQF_DISABLED, pdev->name, info);
 867         if (ret) {
 868                 dev_err(&pdev->dev, "cannot get irq %d - err %d\n", irq, ret);
 869                 ret = -EBUSY;
 870                 goto release_mem;
 871         }
 872
 873         info->clk = clk_get(NULL, "lcd");
 874         if (!info->clk || IS_ERR(info->clk)) {
 875                 printk(KERN_ERR "failed to get lcd clock source\n");
 876                 ret = -ENOENT;
 877                 goto release_irq;
 878         }
 879
 880         clk_enable(info->clk);
 881         dprintk("got and enabled clock\n");
 882
 883         msleep(1);
 884
 885         /* Initialize video memory */
 886         ret = s3c2410fb_map_video_memory(info);
 887         if (ret) {
 888                 printk( KERN_ERR "Failed to allocate video RAM: %d\n", ret);
 889                 ret = -ENOMEM;
 890                 goto release_clock;
 891         }
 892         dprintk("got video memory\n");
 893
 894         ret = s3c2410fb_init_registers(info);
 895
 896         ret = s3c2410fb_check_var(&fbinfo->var, fbinfo);
 897
 898         ret = register_framebuffer(fbinfo);
 899         if (ret < 0) {
 900                 printk(KERN_ERR "Failed to register framebuffer device: %d\n", ret);
 901                 goto free_video_memory;
 902         }
 903
 904         /* create device files */
 905         device_create_file(&pdev->dev, &dev_attr_debug);
 906
 907         printk(KERN_INFO "fb%d: %s frame buffer device\n",
 908                 fbinfo->node, fbinfo->fix.id);
 909
 910         return 0;
 911
 912 free_video_memory:
 913         s3c2410fb_unmap_video_memory(info);
 914 release_clock:
 915         clk_disable(info->clk);
 916         clk_put(info->clk);
 917 release_irq:
 918         free_irq(irq,info);
 919 release_mem:
 920         release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
 921 dealloc_fb:
 922         framebuffer_release(fbinfo);
 923         return ret;
 924 }
 925
 926 /* s3c2410fb_stop_lcd
 927  *
 928  * shutdown the lcd controller
 929 */
 930
 931 static void s3c2410fb_stop_lcd(struct s3c2410fb_info *fbi)
 932 {
 933         unsigned long flags;
 934
 935         local_irq_save(flags);
 936
 937         fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;
 938         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
 939
 940         local_irq_restore(flags);
 941 }
 942
 943 /*
 944  *  Cleanup
 945  */
 946 static int s3c2410fb_remove(struct platform_device *pdev)
 947 {
 948         struct fb_info     *fbinfo = platform_get_drvdata(pdev);
 949         struct s3c2410fb_info *info = fbinfo->par;
 950         int irq;
 951
 952         s3c2410fb_stop_lcd(info);
 953         msleep(1);
 954
 955         s3c2410fb_unmap_video_memory(info);
 956
 957         if (info->clk) {
 958                 clk_disable(info->clk);
 959                 clk_put(info->clk);
 960                 info->clk = NULL;
 961         }
 962
 963         irq = platform_get_irq(pdev, 0);
 964         free_irq(irq,info);
 965         release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
 966         unregister_framebuffer(fbinfo);
 967
 968         return 0;
 969 }
 970
 971 #ifdef CONFIG_PM
 972
 973 /* suspend and resume support for the lcd controller */
 974
 975 static int s3c2410fb_suspend(struct platform_device *dev, pm_message_t state)
 976 {
 977         struct fb_info     *fbinfo = platform_get_drvdata(dev);
 978         struct s3c2410fb_info *info = fbinfo->par;
 979
 980         s3c2410fb_stop_lcd(info);
 981
 982         /* sleep before disabling the clock, we need to ensure
 983          * the LCD DMA engine is not going to get back on the bus
 984          * before the clock goes off again (bjd) */
 985
 986         msleep(1);
 987         clk_disable(info->clk);
 988
 989         return 0;
 990 }
 991
 992 static int s3c2410fb_resume(struct platform_device *dev)
 993 {
 994         struct fb_info     *fbinfo = platform_get_drvdata(dev);
 995         struct s3c2410fb_info *info = fbinfo->par;
 996
 997         clk_enable(info->clk);
 998         msleep(1);
 999
1000         s3c2410fb_init_registers(info);
1001
1002         return 0;
1003 }
1004
1005 #else
1006 #define s3c2410fb_suspend NULL
1007 #define s3c2410fb_resume  NULL
1008 #endif
1009
1010 static struct platform_driver s3c2410fb_driver = {
1011         .probe          = s3c2410fb_probe,
1012         .remove         = s3c2410fb_remove,
1013         .suspend        = s3c2410fb_suspend,
1014         .resume         = s3c2410fb_resume,
1015         .driver         = {
1016                 .name   = "s3c2410-lcd",
1017                 .owner  = THIS_MODULE,
1018         },
1019 };
1020
1021 int __devinit s3c2410fb_init(void)
1022 {
1023         return platform_driver_register(&s3c2410fb_driver);
1024 }
1025
1026 static void __exit s3c2410fb_cleanup(void)
1027 {
1028         platform_driver_unregister(&s3c2410fb_driver);
1029 }
1030
1031
1032 module_init(s3c2410fb_init);
1033 module_exit(s3c2410fb_cleanup);
1034
1035 MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>, Ben Dooks <ben-linux@fluff.org>");
1036 MODULE_DESCRIPTION("Framebuffer driver for the s3c2410");
1037 MODULE_LICENSE("GPL");