Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
[linux-2.6] / arch / powerpc / platforms / cell / spu_priv1.c
1 /*
2  * access to SPU privileged registers
3  */
4 #include <linux/module.h>
5
6 #include <asm/io.h>
7 #include <asm/spu.h>
8
9 void spu_int_mask_and(struct spu *spu, int class, u64 mask)
10 {
11         u64 old_mask;
12
13         old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
14         out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
15 }
16 EXPORT_SYMBOL_GPL(spu_int_mask_and);
17
18 void spu_int_mask_or(struct spu *spu, int class, u64 mask)
19 {
20         u64 old_mask;
21
22         old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
23         out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
24 }
25 EXPORT_SYMBOL_GPL(spu_int_mask_or);
26
27 void spu_int_mask_set(struct spu *spu, int class, u64 mask)
28 {
29         out_be64(&spu->priv1->int_mask_RW[class], mask);
30 }
31 EXPORT_SYMBOL_GPL(spu_int_mask_set);
32
33 u64 spu_int_mask_get(struct spu *spu, int class)
34 {
35         return in_be64(&spu->priv1->int_mask_RW[class]);
36 }
37 EXPORT_SYMBOL_GPL(spu_int_mask_get);
38
39 void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
40 {
41         out_be64(&spu->priv1->int_stat_RW[class], stat);
42 }
43 EXPORT_SYMBOL_GPL(spu_int_stat_clear);
44
45 u64 spu_int_stat_get(struct spu *spu, int class)
46 {
47         return in_be64(&spu->priv1->int_stat_RW[class]);
48 }
49 EXPORT_SYMBOL_GPL(spu_int_stat_get);
50
51 void spu_int_route_set(struct spu *spu, u64 route)
52 {
53         out_be64(&spu->priv1->int_route_RW, route);
54 }
55 EXPORT_SYMBOL_GPL(spu_int_route_set);
56
57 u64 spu_mfc_dar_get(struct spu *spu)
58 {
59         return in_be64(&spu->priv1->mfc_dar_RW);
60 }
61 EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
62
63 u64 spu_mfc_dsisr_get(struct spu *spu)
64 {
65         return in_be64(&spu->priv1->mfc_dsisr_RW);
66 }
67 EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
68
69 void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
70 {
71         out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
72 }
73 EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
74
75 void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
76 {
77         out_be64(&spu->priv1->mfc_sdr_RW, sdr);
78 }
79 EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
80
81 void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
82 {
83         out_be64(&spu->priv1->mfc_sr1_RW, sr1);
84 }
85 EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
86
87 u64 spu_mfc_sr1_get(struct spu *spu)
88 {
89         return in_be64(&spu->priv1->mfc_sr1_RW);
90 }
91 EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
92
93 void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
94 {
95         out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
96 }
97 EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
98
99 u64 spu_mfc_tclass_id_get(struct spu *spu)
100 {
101         return in_be64(&spu->priv1->mfc_tclass_id_RW);
102 }
103 EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
104
105 void spu_tlb_invalidate(struct spu *spu)
106 {
107         out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
108 }
109 EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
110
111 void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
112 {
113         out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
114 }
115 EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
116
117 u64 spu_resource_allocation_groupID_get(struct spu *spu)
118 {
119         return in_be64(&spu->priv1->resource_allocation_groupID_RW);
120 }
121 EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
122
123 void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
124 {
125         out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
126 }
127 EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
128
129 u64 spu_resource_allocation_enable_get(struct spu *spu)
130 {
131         return in_be64(&spu->priv1->resource_allocation_enable_RW);
132 }
133 EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);