2 * linux/drivers/serial/pxa.c
4 * Based on drivers/serial/8250.c by Russell King.
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
27 #include <linux/config.h>
29 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/serial_reg.h>
39 #include <linux/circ_buf.h>
40 #include <linux/delay.h>
41 #include <linux/interrupt.h>
42 #include <linux/platform_device.h>
43 #include <linux/tty.h>
44 #include <linux/tty_flip.h>
45 #include <linux/serial_core.h>
48 #include <asm/hardware.h>
50 #include <asm/arch/pxa-regs.h>
53 struct uart_pxa_port {
54 struct uart_port port;
58 unsigned int lsr_break_flag;
63 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
66 return readl(up->port.membase + offset);
69 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
72 writel(value, up->port.membase + offset);
75 static void serial_pxa_enable_ms(struct uart_port *port)
77 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
79 up->ier |= UART_IER_MSI;
80 serial_out(up, UART_IER, up->ier);
83 static void serial_pxa_stop_tx(struct uart_port *port)
85 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
87 if (up->ier & UART_IER_THRI) {
88 up->ier &= ~UART_IER_THRI;
89 serial_out(up, UART_IER, up->ier);
93 static void serial_pxa_stop_rx(struct uart_port *port)
95 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
97 up->ier &= ~UART_IER_RLSI;
98 up->port.read_status_mask &= ~UART_LSR_DR;
99 serial_out(up, UART_IER, up->ier);
103 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
105 struct tty_struct *tty = up->port.info->tty;
106 unsigned int ch, flag;
110 ch = serial_in(up, UART_RX);
112 up->port.icount.rx++;
114 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
115 UART_LSR_FE | UART_LSR_OE))) {
117 * For statistics only
119 if (*status & UART_LSR_BI) {
120 *status &= ~(UART_LSR_FE | UART_LSR_PE);
121 up->port.icount.brk++;
123 * We do the SysRQ and SAK checking
124 * here because otherwise the break
125 * may get masked by ignore_status_mask
126 * or read_status_mask.
128 if (uart_handle_break(&up->port))
130 } else if (*status & UART_LSR_PE)
131 up->port.icount.parity++;
132 else if (*status & UART_LSR_FE)
133 up->port.icount.frame++;
134 if (*status & UART_LSR_OE)
135 up->port.icount.overrun++;
138 * Mask off conditions which should be ignored.
140 *status &= up->port.read_status_mask;
142 #ifdef CONFIG_SERIAL_PXA_CONSOLE
143 if (up->port.line == up->port.cons->index) {
144 /* Recover the break flag from console xmit */
145 *status |= up->lsr_break_flag;
146 up->lsr_break_flag = 0;
149 if (*status & UART_LSR_BI) {
151 } else if (*status & UART_LSR_PE)
153 else if (*status & UART_LSR_FE)
157 if (uart_handle_sysrq_char(&up->port, ch, regs))
160 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
163 *status = serial_in(up, UART_LSR);
164 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
165 tty_flip_buffer_push(tty);
168 static void transmit_chars(struct uart_pxa_port *up)
170 struct circ_buf *xmit = &up->port.info->xmit;
173 if (up->port.x_char) {
174 serial_out(up, UART_TX, up->port.x_char);
175 up->port.icount.tx++;
179 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
180 serial_pxa_stop_tx(&up->port);
184 count = up->port.fifosize / 2;
186 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
187 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
188 up->port.icount.tx++;
189 if (uart_circ_empty(xmit))
191 } while (--count > 0);
193 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
194 uart_write_wakeup(&up->port);
197 if (uart_circ_empty(xmit))
198 serial_pxa_stop_tx(&up->port);
201 static void serial_pxa_start_tx(struct uart_port *port)
203 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
205 if (!(up->ier & UART_IER_THRI)) {
206 up->ier |= UART_IER_THRI;
207 serial_out(up, UART_IER, up->ier);
211 static inline void check_modem_status(struct uart_pxa_port *up)
215 status = serial_in(up, UART_MSR);
217 if ((status & UART_MSR_ANY_DELTA) == 0)
220 if (status & UART_MSR_TERI)
221 up->port.icount.rng++;
222 if (status & UART_MSR_DDSR)
223 up->port.icount.dsr++;
224 if (status & UART_MSR_DDCD)
225 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
226 if (status & UART_MSR_DCTS)
227 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
229 wake_up_interruptible(&up->port.info->delta_msr_wait);
233 * This handles the interrupt from one port.
235 static inline irqreturn_t
236 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
238 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
239 unsigned int iir, lsr;
241 iir = serial_in(up, UART_IIR);
242 if (iir & UART_IIR_NO_INT)
244 lsr = serial_in(up, UART_LSR);
245 if (lsr & UART_LSR_DR)
246 receive_chars(up, &lsr, regs);
247 check_modem_status(up);
248 if (lsr & UART_LSR_THRE)
253 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
255 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
259 spin_lock_irqsave(&up->port.lock, flags);
260 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
261 spin_unlock_irqrestore(&up->port.lock, flags);
266 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
268 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
269 unsigned char status;
272 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
273 status = serial_in(up, UART_MSR);
276 if (status & UART_MSR_DCD)
278 if (status & UART_MSR_RI)
280 if (status & UART_MSR_DSR)
282 if (status & UART_MSR_CTS)
287 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
289 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
290 unsigned char mcr = 0;
292 if (mctrl & TIOCM_RTS)
294 if (mctrl & TIOCM_DTR)
296 if (mctrl & TIOCM_OUT1)
297 mcr |= UART_MCR_OUT1;
298 if (mctrl & TIOCM_OUT2)
299 mcr |= UART_MCR_OUT2;
300 if (mctrl & TIOCM_LOOP)
301 mcr |= UART_MCR_LOOP;
305 serial_out(up, UART_MCR, mcr);
308 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
310 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
313 spin_lock_irqsave(&up->port.lock, flags);
314 if (break_state == -1)
315 up->lcr |= UART_LCR_SBC;
317 up->lcr &= ~UART_LCR_SBC;
318 serial_out(up, UART_LCR, up->lcr);
319 spin_unlock_irqrestore(&up->port.lock, flags);
323 static void serial_pxa_dma_init(struct pxa_uart *up)
326 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
330 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
333 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
339 pxa_free_dma(up->txdma);
341 pxa_free_dma(up->rxdma);
347 static int serial_pxa_startup(struct uart_port *port)
349 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
353 if (port->line == 3) /* HWUART */
354 up->mcr |= UART_MCR_AFE;
361 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
366 * Clear the FIFO buffers and disable them.
367 * (they will be reenabled in set_termios())
369 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
370 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
371 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
372 serial_out(up, UART_FCR, 0);
375 * Clear the interrupt registers.
377 (void) serial_in(up, UART_LSR);
378 (void) serial_in(up, UART_RX);
379 (void) serial_in(up, UART_IIR);
380 (void) serial_in(up, UART_MSR);
383 * Now, initialize the UART
385 serial_out(up, UART_LCR, UART_LCR_WLEN8);
387 spin_lock_irqsave(&up->port.lock, flags);
388 up->port.mctrl |= TIOCM_OUT2;
389 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
390 spin_unlock_irqrestore(&up->port.lock, flags);
393 * Finally, enable interrupts. Note: Modem status interrupts
394 * are set via set_termios(), which will be occuring imminently
395 * anyway, so we don't enable them here.
397 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
398 serial_out(up, UART_IER, up->ier);
401 * And clear the interrupt registers again for luck.
403 (void) serial_in(up, UART_LSR);
404 (void) serial_in(up, UART_RX);
405 (void) serial_in(up, UART_IIR);
406 (void) serial_in(up, UART_MSR);
411 static void serial_pxa_shutdown(struct uart_port *port)
413 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
416 free_irq(up->port.irq, up);
419 * Disable interrupts from this port
422 serial_out(up, UART_IER, 0);
424 spin_lock_irqsave(&up->port.lock, flags);
425 up->port.mctrl &= ~TIOCM_OUT2;
426 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
427 spin_unlock_irqrestore(&up->port.lock, flags);
430 * Disable break condition and FIFOs
432 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
433 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
434 UART_FCR_CLEAR_RCVR |
435 UART_FCR_CLEAR_XMIT);
436 serial_out(up, UART_FCR, 0);
440 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
443 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
444 unsigned char cval, fcr = 0;
446 unsigned int baud, quot;
448 switch (termios->c_cflag & CSIZE) {
450 cval = UART_LCR_WLEN5;
453 cval = UART_LCR_WLEN6;
456 cval = UART_LCR_WLEN7;
460 cval = UART_LCR_WLEN8;
464 if (termios->c_cflag & CSTOPB)
465 cval |= UART_LCR_STOP;
466 if (termios->c_cflag & PARENB)
467 cval |= UART_LCR_PARITY;
468 if (!(termios->c_cflag & PARODD))
469 cval |= UART_LCR_EPAR;
472 * Ask the core to calculate the divisor for us.
474 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
475 quot = uart_get_divisor(port, baud);
477 if ((up->port.uartclk / quot) < (2400 * 16))
478 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
479 else if ((up->port.uartclk / quot) < (230400 * 16))
480 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
482 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
485 * Ok, we're now changing the port state. Do it with
486 * interrupts disabled.
488 spin_lock_irqsave(&up->port.lock, flags);
491 * Ensure the port will be enabled.
492 * This is required especially for serial console.
497 * Update the per-port timeout.
499 uart_update_timeout(port, termios->c_cflag, baud);
501 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
502 if (termios->c_iflag & INPCK)
503 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
504 if (termios->c_iflag & (BRKINT | PARMRK))
505 up->port.read_status_mask |= UART_LSR_BI;
508 * Characters to ignore
510 up->port.ignore_status_mask = 0;
511 if (termios->c_iflag & IGNPAR)
512 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
513 if (termios->c_iflag & IGNBRK) {
514 up->port.ignore_status_mask |= UART_LSR_BI;
516 * If we're ignoring parity and break indicators,
517 * ignore overruns too (for real raw support).
519 if (termios->c_iflag & IGNPAR)
520 up->port.ignore_status_mask |= UART_LSR_OE;
524 * ignore all characters if CREAD is not set
526 if ((termios->c_cflag & CREAD) == 0)
527 up->port.ignore_status_mask |= UART_LSR_DR;
530 * CTS flow control flag and modem status interrupts
532 up->ier &= ~UART_IER_MSI;
533 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
534 up->ier |= UART_IER_MSI;
536 serial_out(up, UART_IER, up->ier);
538 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
539 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
540 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
541 serial_out(up, UART_LCR, cval); /* reset DLAB */
542 up->lcr = cval; /* Save LCR */
543 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
544 serial_out(up, UART_FCR, fcr);
545 spin_unlock_irqrestore(&up->port.lock, flags);
549 serial_pxa_pm(struct uart_port *port, unsigned int state,
550 unsigned int oldstate)
552 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
553 pxa_set_cken(up->cken, !state);
558 static void serial_pxa_release_port(struct uart_port *port)
562 static int serial_pxa_request_port(struct uart_port *port)
567 static void serial_pxa_config_port(struct uart_port *port, int flags)
569 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
570 up->port.type = PORT_PXA;
574 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
576 /* we don't want the core code to modify any port params */
581 serial_pxa_type(struct uart_port *port)
583 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
587 #ifdef CONFIG_SERIAL_PXA_CONSOLE
589 static struct uart_pxa_port serial_pxa_ports[];
590 static struct uart_driver serial_pxa_reg;
592 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
595 * Wait for transmitter & holding register to empty
597 static inline void wait_for_xmitr(struct uart_pxa_port *up)
599 unsigned int status, tmout = 10000;
601 /* Wait up to 10ms for the character(s) to be sent. */
603 status = serial_in(up, UART_LSR);
605 if (status & UART_LSR_BI)
606 up->lsr_break_flag = UART_LSR_BI;
611 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
613 /* Wait up to 1s for flow control if necessary */
614 if (up->port.flags & UPF_CONS_FLOW) {
617 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
623 * Print a string to the serial port trying not to disturb
624 * any possible real use of the port...
626 * The console_lock must be held when we get here.
629 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
631 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
636 * First save the IER then disable the interrupts
638 ier = serial_in(up, UART_IER);
639 serial_out(up, UART_IER, UART_IER_UUE);
642 * Now, do each character
644 for (i = 0; i < count; i++, s++) {
648 * Send the character out.
649 * If a LF, also do CR...
651 serial_out(up, UART_TX, *s);
654 serial_out(up, UART_TX, 13);
659 * Finally, wait for transmitter to become empty
660 * and restore the IER
663 serial_out(up, UART_IER, ier);
667 serial_pxa_console_setup(struct console *co, char *options)
669 struct uart_pxa_port *up;
675 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
677 up = &serial_pxa_ports[co->index];
680 uart_parse_options(options, &baud, &parity, &bits, &flow);
682 return uart_set_options(&up->port, co, baud, parity, bits, flow);
685 static struct console serial_pxa_console = {
687 .write = serial_pxa_console_write,
688 .device = uart_console_device,
689 .setup = serial_pxa_console_setup,
690 .flags = CON_PRINTBUFFER,
692 .data = &serial_pxa_reg,
696 serial_pxa_console_init(void)
698 register_console(&serial_pxa_console);
702 console_initcall(serial_pxa_console_init);
704 #define PXA_CONSOLE &serial_pxa_console
706 #define PXA_CONSOLE NULL
709 struct uart_ops serial_pxa_pops = {
710 .tx_empty = serial_pxa_tx_empty,
711 .set_mctrl = serial_pxa_set_mctrl,
712 .get_mctrl = serial_pxa_get_mctrl,
713 .stop_tx = serial_pxa_stop_tx,
714 .start_tx = serial_pxa_start_tx,
715 .stop_rx = serial_pxa_stop_rx,
716 .enable_ms = serial_pxa_enable_ms,
717 .break_ctl = serial_pxa_break_ctl,
718 .startup = serial_pxa_startup,
719 .shutdown = serial_pxa_shutdown,
720 .set_termios = serial_pxa_set_termios,
722 .type = serial_pxa_type,
723 .release_port = serial_pxa_release_port,
724 .request_port = serial_pxa_request_port,
725 .config_port = serial_pxa_config_port,
726 .verify_port = serial_pxa_verify_port,
729 static struct uart_pxa_port serial_pxa_ports[] = {
732 .cken = CKEN6_FFUART,
736 .membase = (void *)&FFUART,
737 .mapbase = __PREG(FFUART),
739 .uartclk = 921600 * 16,
741 .ops = &serial_pxa_pops,
746 .cken = CKEN7_BTUART,
750 .membase = (void *)&BTUART,
751 .mapbase = __PREG(BTUART),
753 .uartclk = 921600 * 16,
755 .ops = &serial_pxa_pops,
760 .cken = CKEN5_STUART,
764 .membase = (void *)&STUART,
765 .mapbase = __PREG(STUART),
767 .uartclk = 921600 * 16,
769 .ops = &serial_pxa_pops,
774 .cken = CKEN4_HWUART,
778 .membase = (void *)&HWUART,
779 .mapbase = __PREG(HWUART),
781 .uartclk = 921600 * 16,
783 .ops = &serial_pxa_pops,
789 static struct uart_driver serial_pxa_reg = {
790 .owner = THIS_MODULE,
791 .driver_name = "PXA serial",
792 .devfs_name = "tts/",
796 .nr = ARRAY_SIZE(serial_pxa_ports),
800 static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
802 struct uart_pxa_port *sport = platform_get_drvdata(dev);
805 uart_suspend_port(&serial_pxa_reg, &sport->port);
810 static int serial_pxa_resume(struct platform_device *dev)
812 struct uart_pxa_port *sport = platform_get_drvdata(dev);
815 uart_resume_port(&serial_pxa_reg, &sport->port);
820 static int serial_pxa_probe(struct platform_device *dev)
822 serial_pxa_ports[dev->id].port.dev = &dev->dev;
823 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
824 platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
828 static int serial_pxa_remove(struct platform_device *dev)
830 struct uart_pxa_port *sport = platform_get_drvdata(dev);
832 platform_set_drvdata(dev, NULL);
835 uart_remove_one_port(&serial_pxa_reg, &sport->port);
840 static struct platform_driver serial_pxa_driver = {
841 .probe = serial_pxa_probe,
842 .remove = serial_pxa_remove,
844 .suspend = serial_pxa_suspend,
845 .resume = serial_pxa_resume,
847 .name = "pxa2xx-uart",
851 int __init serial_pxa_init(void)
855 ret = uart_register_driver(&serial_pxa_reg);
859 ret = platform_driver_register(&serial_pxa_driver);
861 uart_unregister_driver(&serial_pxa_reg);
866 void __exit serial_pxa_exit(void)
868 platform_driver_unregister(&serial_pxa_driver);
869 uart_unregister_driver(&serial_pxa_reg);
872 module_init(serial_pxa_init);
873 module_exit(serial_pxa_exit);
875 MODULE_LICENSE("GPL");