Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
[linux-2.6] / drivers / infiniband / hw / ehca / ehca_qp.c
1 /*
2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
3  *
4  *  QP functions
5  *
6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
8  *           Waleri Fomin <fomin@de.ibm.com>
9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
10  *           Reinhard Ernst <rernst@de.ibm.com>
11  *           Heiko J Schick <schickhj@de.ibm.com>
12  *
13  *  Copyright (c) 2005 IBM Corporation
14  *
15  *  All rights reserved.
16  *
17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
18  *  BSD.
19  *
20  * OpenIB BSD License
21  *
22  * Redistribution and use in source and binary forms, with or without
23  * modification, are permitted provided that the following conditions are met:
24  *
25  * Redistributions of source code must retain the above copyright notice, this
26  * list of conditions and the following disclaimer.
27  *
28  * Redistributions in binary form must reproduce the above copyright notice,
29  * this list of conditions and the following disclaimer in the documentation
30  * and/or other materials
31  * provided with the distribution.
32  *
33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43  * POSSIBILITY OF SUCH DAMAGE.
44  */
45
46 #include "ehca_classes.h"
47 #include "ehca_tools.h"
48 #include "ehca_qes.h"
49 #include "ehca_iverbs.h"
50 #include "hcp_if.h"
51 #include "hipz_fns.h"
52
53 static struct kmem_cache *qp_cache;
54
55 /*
56  * attributes not supported by query qp
57  */
58 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
59                                      IB_QP_MAX_QP_RD_ATOMIC   | \
60                                      IB_QP_ACCESS_FLAGS       | \
61                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
62
63 /*
64  * ehca (internal) qp state values
65  */
66 enum ehca_qp_state {
67         EHCA_QPS_RESET = 1,
68         EHCA_QPS_INIT = 2,
69         EHCA_QPS_RTR = 3,
70         EHCA_QPS_RTS = 5,
71         EHCA_QPS_SQD = 6,
72         EHCA_QPS_SQE = 8,
73         EHCA_QPS_ERR = 128
74 };
75
76 /*
77  * qp state transitions as defined by IB Arch Rel 1.1 page 431
78  */
79 enum ib_qp_statetrans {
80         IB_QPST_ANY2RESET,
81         IB_QPST_ANY2ERR,
82         IB_QPST_RESET2INIT,
83         IB_QPST_INIT2RTR,
84         IB_QPST_INIT2INIT,
85         IB_QPST_RTR2RTS,
86         IB_QPST_RTS2SQD,
87         IB_QPST_RTS2RTS,
88         IB_QPST_SQD2RTS,
89         IB_QPST_SQE2RTS,
90         IB_QPST_SQD2SQD,
91         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
92 };
93
94 /*
95  * ib2ehca_qp_state maps IB to ehca qp_state
96  * returns ehca qp state corresponding to given ib qp state
97  */
98 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
99 {
100         switch (ib_qp_state) {
101         case IB_QPS_RESET:
102                 return EHCA_QPS_RESET;
103         case IB_QPS_INIT:
104                 return EHCA_QPS_INIT;
105         case IB_QPS_RTR:
106                 return EHCA_QPS_RTR;
107         case IB_QPS_RTS:
108                 return EHCA_QPS_RTS;
109         case IB_QPS_SQD:
110                 return EHCA_QPS_SQD;
111         case IB_QPS_SQE:
112                 return EHCA_QPS_SQE;
113         case IB_QPS_ERR:
114                 return EHCA_QPS_ERR;
115         default:
116                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
117                 return -EINVAL;
118         }
119 }
120
121 /*
122  * ehca2ib_qp_state maps ehca to IB qp_state
123  * returns ib qp state corresponding to given ehca qp state
124  */
125 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
126                                                 ehca_qp_state)
127 {
128         switch (ehca_qp_state) {
129         case EHCA_QPS_RESET:
130                 return IB_QPS_RESET;
131         case EHCA_QPS_INIT:
132                 return IB_QPS_INIT;
133         case EHCA_QPS_RTR:
134                 return IB_QPS_RTR;
135         case EHCA_QPS_RTS:
136                 return IB_QPS_RTS;
137         case EHCA_QPS_SQD:
138                 return IB_QPS_SQD;
139         case EHCA_QPS_SQE:
140                 return IB_QPS_SQE;
141         case EHCA_QPS_ERR:
142                 return IB_QPS_ERR;
143         default:
144                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
145                 return -EINVAL;
146         }
147 }
148
149 /*
150  * ehca_qp_type used as index for req_attr and opt_attr of
151  * struct ehca_modqp_statetrans
152  */
153 enum ehca_qp_type {
154         QPT_RC = 0,
155         QPT_UC = 1,
156         QPT_UD = 2,
157         QPT_SQP = 3,
158         QPT_MAX
159 };
160
161 /*
162  * ib2ehcaqptype maps Ib to ehca qp_type
163  * returns ehca qp type corresponding to ib qp type
164  */
165 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
166 {
167         switch (ibqptype) {
168         case IB_QPT_SMI:
169         case IB_QPT_GSI:
170                 return QPT_SQP;
171         case IB_QPT_RC:
172                 return QPT_RC;
173         case IB_QPT_UC:
174                 return QPT_UC;
175         case IB_QPT_UD:
176                 return QPT_UD;
177         default:
178                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
179                 return -EINVAL;
180         }
181 }
182
183 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
184                                                          int ib_tostate)
185 {
186         int index = -EINVAL;
187         switch (ib_tostate) {
188         case IB_QPS_RESET:
189                 index = IB_QPST_ANY2RESET;
190                 break;
191         case IB_QPS_INIT:
192                 switch (ib_fromstate) {
193                 case IB_QPS_RESET:
194                         index = IB_QPST_RESET2INIT;
195                         break;
196                 case IB_QPS_INIT:
197                         index = IB_QPST_INIT2INIT;
198                         break;
199                 }
200                 break;
201         case IB_QPS_RTR:
202                 if (ib_fromstate == IB_QPS_INIT)
203                         index = IB_QPST_INIT2RTR;
204                 break;
205         case IB_QPS_RTS:
206                 switch (ib_fromstate) {
207                 case IB_QPS_RTR:
208                         index = IB_QPST_RTR2RTS;
209                         break;
210                 case IB_QPS_RTS:
211                         index = IB_QPST_RTS2RTS;
212                         break;
213                 case IB_QPS_SQD:
214                         index = IB_QPST_SQD2RTS;
215                         break;
216                 case IB_QPS_SQE:
217                         index = IB_QPST_SQE2RTS;
218                         break;
219                 }
220                 break;
221         case IB_QPS_SQD:
222                 if (ib_fromstate == IB_QPS_RTS)
223                         index = IB_QPST_RTS2SQD;
224                 break;
225         case IB_QPS_SQE:
226                 break;
227         case IB_QPS_ERR:
228                 index = IB_QPST_ANY2ERR;
229                 break;
230         default:
231                 break;
232         }
233         return index;
234 }
235
236 /*
237  * ibqptype2servicetype returns hcp service type corresponding to given
238  * ib qp type used by create_qp()
239  */
240 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
241 {
242         switch (ibqptype) {
243         case IB_QPT_SMI:
244         case IB_QPT_GSI:
245                 return ST_UD;
246         case IB_QPT_RC:
247                 return ST_RC;
248         case IB_QPT_UC:
249                 return ST_UC;
250         case IB_QPT_UD:
251                 return ST_UD;
252         case IB_QPT_RAW_IPV6:
253                 return -EINVAL;
254         case IB_QPT_RAW_ETY:
255                 return -EINVAL;
256         default:
257                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
258                 return -EINVAL;
259         }
260 }
261
262 /*
263  * init userspace queue info from ipz_queue data
264  */
265 static inline void queue2resp(struct ipzu_queue_resp *resp,
266                               struct ipz_queue *queue)
267 {
268         resp->qe_size = queue->qe_size;
269         resp->act_nr_of_sg = queue->act_nr_of_sg;
270         resp->queue_length = queue->queue_length;
271         resp->pagesize = queue->pagesize;
272         resp->toggle_state = queue->toggle_state;
273         resp->offset = queue->offset;
274 }
275
276 /*
277  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
278  */
279 static inline int init_qp_queue(struct ehca_shca *shca,
280                                 struct ehca_pd *pd,
281                                 struct ehca_qp *my_qp,
282                                 struct ipz_queue *queue,
283                                 int q_type,
284                                 u64 expected_hret,
285                                 struct ehca_alloc_queue_parms *parms,
286                                 int wqe_size)
287 {
288         int ret, cnt, ipz_rc, nr_q_pages;
289         void *vpage;
290         u64 rpage, h_ret;
291         struct ib_device *ib_dev = &shca->ib_device;
292         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
293
294         if (!parms->queue_size)
295                 return 0;
296
297         if (parms->is_small) {
298                 nr_q_pages = 1;
299                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
300                                         128 << parms->page_size,
301                                         wqe_size, parms->act_nr_sges, 1);
302         } else {
303                 nr_q_pages = parms->queue_size;
304                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
305                                         EHCA_PAGESIZE, wqe_size,
306                                         parms->act_nr_sges, 0);
307         }
308
309         if (!ipz_rc) {
310                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%i",
311                          ipz_rc);
312                 return -EBUSY;
313         }
314
315         /* register queue pages */
316         for (cnt = 0; cnt < nr_q_pages; cnt++) {
317                 vpage = ipz_qpageit_get_inc(queue);
318                 if (!vpage) {
319                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
320                                  "failed p_vpage= %p", vpage);
321                         ret = -EINVAL;
322                         goto init_qp_queue1;
323                 }
324                 rpage = virt_to_abs(vpage);
325
326                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
327                                                  my_qp->ipz_qp_handle,
328                                                  NULL, 0, q_type,
329                                                  rpage, parms->is_small ? 0 : 1,
330                                                  my_qp->galpas.kernel);
331                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
332                         if (h_ret != expected_hret) {
333                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
334                                          "h_ret=%li", h_ret);
335                                 ret = ehca2ib_return_code(h_ret);
336                                 goto init_qp_queue1;
337                         }
338                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
339                         if (vpage) {
340                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
341                                          "should not succeed vpage=%p", vpage);
342                                 ret = -EINVAL;
343                                 goto init_qp_queue1;
344                         }
345                 } else {
346                         if (h_ret != H_PAGE_REGISTERED) {
347                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
348                                          "h_ret=%li", h_ret);
349                                 ret = ehca2ib_return_code(h_ret);
350                                 goto init_qp_queue1;
351                         }
352                 }
353         }
354
355         ipz_qeit_reset(queue);
356
357         return 0;
358
359 init_qp_queue1:
360         ipz_queue_dtor(pd, queue);
361         return ret;
362 }
363
364 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
365 {
366         if (is_llqp)
367                 return 128 << act_nr_sge;
368         else
369                 return offsetof(struct ehca_wqe,
370                                 u.nud.sg_list[act_nr_sge]);
371 }
372
373 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
374                                        int req_nr_sge, int is_llqp)
375 {
376         u32 wqe_size, q_size;
377         int act_nr_sge = req_nr_sge;
378
379         if (!is_llqp)
380                 /* round up #SGEs so WQE size is a power of 2 */
381                 for (act_nr_sge = 4; act_nr_sge <= 252;
382                      act_nr_sge = 4 + 2 * act_nr_sge)
383                         if (act_nr_sge >= req_nr_sge)
384                                 break;
385
386         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
387         q_size = wqe_size * (queue->max_wr + 1);
388
389         if (q_size <= 512)
390                 queue->page_size = 2;
391         else if (q_size <= 1024)
392                 queue->page_size = 3;
393         else
394                 queue->page_size = 0;
395
396         queue->is_small = (queue->page_size != 0);
397 }
398
399 /*
400  * Create an ib_qp struct that is either a QP or an SRQ, depending on
401  * the value of the is_srq parameter. If init_attr and srq_init_attr share
402  * fields, the field out of init_attr is used.
403  */
404 static struct ehca_qp *internal_create_qp(
405         struct ib_pd *pd,
406         struct ib_qp_init_attr *init_attr,
407         struct ib_srq_init_attr *srq_init_attr,
408         struct ib_udata *udata, int is_srq)
409 {
410         struct ehca_qp *my_qp;
411         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
412         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
413                                               ib_device);
414         struct ib_ucontext *context = NULL;
415         u64 h_ret;
416         int is_llqp = 0, has_srq = 0;
417         int qp_type, max_send_sge, max_recv_sge, ret;
418
419         /* h_call's out parameters */
420         struct ehca_alloc_qp_parms parms;
421         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
422         unsigned long flags;
423
424         if (init_attr->create_flags)
425                 return ERR_PTR(-EINVAL);
426
427         memset(&parms, 0, sizeof(parms));
428         qp_type = init_attr->qp_type;
429
430         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
431                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
432                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
433                          init_attr->sq_sig_type);
434                 return ERR_PTR(-EINVAL);
435         }
436
437         /* save LLQP info */
438         if (qp_type & 0x80) {
439                 is_llqp = 1;
440                 parms.ext_type = EQPT_LLQP;
441                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
442         }
443         qp_type &= 0x1F;
444         init_attr->qp_type &= 0x1F;
445
446         /* handle SRQ base QPs */
447         if (init_attr->srq) {
448                 struct ehca_qp *my_srq =
449                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
450
451                 has_srq = 1;
452                 parms.ext_type = EQPT_SRQBASE;
453                 parms.srq_qpn = my_srq->real_qp_num;
454         }
455
456         if (is_llqp && has_srq) {
457                 ehca_err(pd->device, "LLQPs can't have an SRQ");
458                 return ERR_PTR(-EINVAL);
459         }
460
461         /* handle SRQs */
462         if (is_srq) {
463                 parms.ext_type = EQPT_SRQ;
464                 parms.srq_limit = srq_init_attr->attr.srq_limit;
465                 if (init_attr->cap.max_recv_sge > 3) {
466                         ehca_err(pd->device, "no more than three SGEs "
467                                  "supported for SRQ  pd=%p  max_sge=%x",
468                                  pd, init_attr->cap.max_recv_sge);
469                         return ERR_PTR(-EINVAL);
470                 }
471         }
472
473         /* check QP type */
474         if (qp_type != IB_QPT_UD &&
475             qp_type != IB_QPT_UC &&
476             qp_type != IB_QPT_RC &&
477             qp_type != IB_QPT_SMI &&
478             qp_type != IB_QPT_GSI) {
479                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
480                 return ERR_PTR(-EINVAL);
481         }
482
483         if (is_llqp) {
484                 switch (qp_type) {
485                 case IB_QPT_RC:
486                         if ((init_attr->cap.max_send_wr > 255) ||
487                             (init_attr->cap.max_recv_wr > 255)) {
488                                 ehca_err(pd->device,
489                                          "Invalid Number of max_sq_wr=%x "
490                                          "or max_rq_wr=%x for RC LLQP",
491                                          init_attr->cap.max_send_wr,
492                                          init_attr->cap.max_recv_wr);
493                                 return ERR_PTR(-EINVAL);
494                         }
495                         break;
496                 case IB_QPT_UD:
497                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
498                                 ehca_err(pd->device, "UD LLQP not supported "
499                                          "by this adapter");
500                                 return ERR_PTR(-ENOSYS);
501                         }
502                         if (!(init_attr->cap.max_send_sge <= 5
503                             && init_attr->cap.max_send_sge >= 1
504                             && init_attr->cap.max_recv_sge <= 5
505                             && init_attr->cap.max_recv_sge >= 1)) {
506                                 ehca_err(pd->device,
507                                          "Invalid Number of max_send_sge=%x "
508                                          "or max_recv_sge=%x for UD LLQP",
509                                          init_attr->cap.max_send_sge,
510                                          init_attr->cap.max_recv_sge);
511                                 return ERR_PTR(-EINVAL);
512                         } else if (init_attr->cap.max_send_wr > 255) {
513                                 ehca_err(pd->device,
514                                          "Invalid Number of "
515                                          "max_send_wr=%x for UD QP_TYPE=%x",
516                                          init_attr->cap.max_send_wr, qp_type);
517                                 return ERR_PTR(-EINVAL);
518                         }
519                         break;
520                 default:
521                         ehca_err(pd->device, "unsupported LL QP Type=%x",
522                                  qp_type);
523                         return ERR_PTR(-EINVAL);
524                         break;
525                 }
526         } else {
527                 int max_sge = (qp_type == IB_QPT_UD || qp_type == IB_QPT_SMI
528                                || qp_type == IB_QPT_GSI) ? 250 : 252;
529
530                 if (init_attr->cap.max_send_sge > max_sge
531                     || init_attr->cap.max_recv_sge > max_sge) {
532                         ehca_err(pd->device, "Invalid number of SGEs requested "
533                                  "send_sge=%x recv_sge=%x max_sge=%x",
534                                  init_attr->cap.max_send_sge,
535                                  init_attr->cap.max_recv_sge, max_sge);
536                         return ERR_PTR(-EINVAL);
537                 }
538         }
539
540         if (pd->uobject && udata)
541                 context = pd->uobject->context;
542
543         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
544         if (!my_qp) {
545                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
546                 return ERR_PTR(-ENOMEM);
547         }
548
549         spin_lock_init(&my_qp->spinlock_s);
550         spin_lock_init(&my_qp->spinlock_r);
551         my_qp->qp_type = qp_type;
552         my_qp->ext_type = parms.ext_type;
553         my_qp->state = IB_QPS_RESET;
554
555         if (init_attr->recv_cq)
556                 my_qp->recv_cq =
557                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
558         if (init_attr->send_cq)
559                 my_qp->send_cq =
560                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
561
562         do {
563                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
564                         ret = -ENOMEM;
565                         ehca_err(pd->device, "Can't reserve idr resources.");
566                         goto create_qp_exit0;
567                 }
568
569                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
570                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
571                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
572         } while (ret == -EAGAIN);
573
574         if (ret) {
575                 ret = -ENOMEM;
576                 ehca_err(pd->device, "Can't allocate new idr entry.");
577                 goto create_qp_exit0;
578         }
579
580         if (my_qp->token > 0x1FFFFFF) {
581                 ret = -EINVAL;
582                 ehca_err(pd->device, "Invalid number of qp");
583                 goto create_qp_exit1;
584         }
585
586         if (has_srq)
587                 parms.srq_token = my_qp->token;
588
589         parms.servicetype = ibqptype2servicetype(qp_type);
590         if (parms.servicetype < 0) {
591                 ret = -EINVAL;
592                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
593                 goto create_qp_exit1;
594         }
595
596         /* Always signal by WQE so we can hide circ. WQEs */
597         parms.sigtype = HCALL_SIGT_BY_WQE;
598
599         /* UD_AV CIRCUMVENTION */
600         max_send_sge = init_attr->cap.max_send_sge;
601         max_recv_sge = init_attr->cap.max_recv_sge;
602         if (parms.servicetype == ST_UD && !is_llqp) {
603                 max_send_sge += 2;
604                 max_recv_sge += 2;
605         }
606
607         parms.token = my_qp->token;
608         parms.eq_handle = shca->eq.ipz_eq_handle;
609         parms.pd = my_pd->fw_pd;
610         if (my_qp->send_cq)
611                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
612         if (my_qp->recv_cq)
613                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
614
615         parms.squeue.max_wr = init_attr->cap.max_send_wr;
616         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
617         parms.squeue.max_sge = max_send_sge;
618         parms.rqueue.max_sge = max_recv_sge;
619
620         /* RC QPs need one more SWQE for unsolicited ack circumvention */
621         if (qp_type == IB_QPT_RC)
622                 parms.squeue.max_wr++;
623
624         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)) {
625                 if (HAS_SQ(my_qp))
626                         ehca_determine_small_queue(
627                                 &parms.squeue, max_send_sge, is_llqp);
628                 if (HAS_RQ(my_qp))
629                         ehca_determine_small_queue(
630                                 &parms.rqueue, max_recv_sge, is_llqp);
631                 parms.qp_storage =
632                         (parms.squeue.is_small || parms.rqueue.is_small);
633         }
634
635         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
636         if (h_ret != H_SUCCESS) {
637                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%li",
638                          h_ret);
639                 ret = ehca2ib_return_code(h_ret);
640                 goto create_qp_exit1;
641         }
642
643         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
644         my_qp->ipz_qp_handle = parms.qp_handle;
645         my_qp->galpas = parms.galpas;
646
647         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
648         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
649
650         switch (qp_type) {
651         case IB_QPT_RC:
652                 if (is_llqp) {
653                         parms.squeue.act_nr_sges = 1;
654                         parms.rqueue.act_nr_sges = 1;
655                 }
656                 /* hide the extra WQE */
657                 parms.squeue.act_nr_wqes--;
658                 break;
659         case IB_QPT_UD:
660         case IB_QPT_GSI:
661         case IB_QPT_SMI:
662                 /* UD circumvention */
663                 if (is_llqp) {
664                         parms.squeue.act_nr_sges = 1;
665                         parms.rqueue.act_nr_sges = 1;
666                 } else {
667                         parms.squeue.act_nr_sges -= 2;
668                         parms.rqueue.act_nr_sges -= 2;
669                 }
670
671                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
672                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
673                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
674                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
675                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
676                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
677                 }
678
679                 break;
680
681         default:
682                 break;
683         }
684
685         /* initialize r/squeue and register queue pages */
686         if (HAS_SQ(my_qp)) {
687                 ret = init_qp_queue(
688                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
689                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
690                         &parms.squeue, swqe_size);
691                 if (ret) {
692                         ehca_err(pd->device, "Couldn't initialize squeue "
693                                  "and pages ret=%i", ret);
694                         goto create_qp_exit2;
695                 }
696         }
697
698         if (HAS_RQ(my_qp)) {
699                 ret = init_qp_queue(
700                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
701                         H_SUCCESS, &parms.rqueue, rwqe_size);
702                 if (ret) {
703                         ehca_err(pd->device, "Couldn't initialize rqueue "
704                                  "and pages ret=%i", ret);
705                         goto create_qp_exit3;
706                 }
707         }
708
709         if (is_srq) {
710                 my_qp->ib_srq.pd = &my_pd->ib_pd;
711                 my_qp->ib_srq.device = my_pd->ib_pd.device;
712
713                 my_qp->ib_srq.srq_context = init_attr->qp_context;
714                 my_qp->ib_srq.event_handler = init_attr->event_handler;
715         } else {
716                 my_qp->ib_qp.qp_num = ib_qp_num;
717                 my_qp->ib_qp.pd = &my_pd->ib_pd;
718                 my_qp->ib_qp.device = my_pd->ib_pd.device;
719
720                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
721                 my_qp->ib_qp.send_cq = init_attr->send_cq;
722
723                 my_qp->ib_qp.qp_type = qp_type;
724                 my_qp->ib_qp.srq = init_attr->srq;
725
726                 my_qp->ib_qp.qp_context = init_attr->qp_context;
727                 my_qp->ib_qp.event_handler = init_attr->event_handler;
728         }
729
730         init_attr->cap.max_inline_data = 0; /* not supported yet */
731         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
732         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
733         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
734         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
735         my_qp->init_attr = *init_attr;
736
737         if (qp_type == IB_QPT_SMI || qp_type == IB_QPT_GSI) {
738                 shca->sport[init_attr->port_num - 1].ibqp_sqp[qp_type] =
739                         &my_qp->ib_qp;
740                 if (ehca_nr_ports < 0) {
741                         /* alloc array to cache subsequent modify qp parms
742                          * for autodetect mode
743                          */
744                         my_qp->mod_qp_parm =
745                                 kzalloc(EHCA_MOD_QP_PARM_MAX *
746                                         sizeof(*my_qp->mod_qp_parm),
747                                         GFP_KERNEL);
748                         if (!my_qp->mod_qp_parm) {
749                                 ehca_err(pd->device,
750                                          "Could not alloc mod_qp_parm");
751                                 goto create_qp_exit4;
752                         }
753                 }
754         }
755
756         /* NOTE: define_apq0() not supported yet */
757         if (qp_type == IB_QPT_GSI) {
758                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
759                 if (h_ret != H_SUCCESS) {
760                         ret = ehca2ib_return_code(h_ret);
761                         goto create_qp_exit5;
762                 }
763         }
764
765         if (my_qp->send_cq) {
766                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
767                 if (ret) {
768                         ehca_err(pd->device,
769                                  "Couldn't assign qp to send_cq ret=%i", ret);
770                         goto create_qp_exit5;
771                 }
772         }
773
774         /* copy queues, galpa data to user space */
775         if (context && udata) {
776                 struct ehca_create_qp_resp resp;
777                 memset(&resp, 0, sizeof(resp));
778
779                 resp.qp_num = my_qp->real_qp_num;
780                 resp.token = my_qp->token;
781                 resp.qp_type = my_qp->qp_type;
782                 resp.ext_type = my_qp->ext_type;
783                 resp.qkey = my_qp->qkey;
784                 resp.real_qp_num = my_qp->real_qp_num;
785
786                 if (HAS_SQ(my_qp))
787                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
788                 if (HAS_RQ(my_qp))
789                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
790                 resp.fw_handle_ofs = (u32)
791                         (my_qp->galpas.user.fw_handle & (PAGE_SIZE - 1));
792
793                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
794                         ehca_err(pd->device, "Copy to udata failed");
795                         ret = -EINVAL;
796                         goto create_qp_exit6;
797                 }
798         }
799
800         return my_qp;
801
802 create_qp_exit6:
803         ehca_cq_unassign_qp(my_qp->send_cq, my_qp->real_qp_num);
804
805 create_qp_exit5:
806         kfree(my_qp->mod_qp_parm);
807
808 create_qp_exit4:
809         if (HAS_RQ(my_qp))
810                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
811
812 create_qp_exit3:
813         if (HAS_SQ(my_qp))
814                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
815
816 create_qp_exit2:
817         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
818
819 create_qp_exit1:
820         write_lock_irqsave(&ehca_qp_idr_lock, flags);
821         idr_remove(&ehca_qp_idr, my_qp->token);
822         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
823
824 create_qp_exit0:
825         kmem_cache_free(qp_cache, my_qp);
826         return ERR_PTR(ret);
827 }
828
829 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
830                              struct ib_qp_init_attr *qp_init_attr,
831                              struct ib_udata *udata)
832 {
833         struct ehca_qp *ret;
834
835         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
836         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
837 }
838
839 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
840                                struct ib_uobject *uobject);
841
842 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
843                                struct ib_srq_init_attr *srq_init_attr,
844                                struct ib_udata *udata)
845 {
846         struct ib_qp_init_attr qp_init_attr;
847         struct ehca_qp *my_qp;
848         struct ib_srq *ret;
849         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
850                                               ib_device);
851         struct hcp_modify_qp_control_block *mqpcb;
852         u64 hret, update_mask;
853
854         /* For common attributes, internal_create_qp() takes its info
855          * out of qp_init_attr, so copy all common attrs there.
856          */
857         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
858         qp_init_attr.event_handler = srq_init_attr->event_handler;
859         qp_init_attr.qp_context = srq_init_attr->srq_context;
860         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
861         qp_init_attr.qp_type = IB_QPT_RC;
862         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
863         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
864
865         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
866         if (IS_ERR(my_qp))
867                 return (struct ib_srq *)my_qp;
868
869         /* copy back return values */
870         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
871         srq_init_attr->attr.max_sge = 3;
872
873         /* drive SRQ into RTR state */
874         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
875         if (!mqpcb) {
876                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
877                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
878                 ret = ERR_PTR(-ENOMEM);
879                 goto create_srq1;
880         }
881
882         mqpcb->qp_state = EHCA_QPS_INIT;
883         mqpcb->prim_phys_port = 1;
884         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
885         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
886                                 my_qp->ipz_qp_handle,
887                                 &my_qp->pf,
888                                 update_mask,
889                                 mqpcb, my_qp->galpas.kernel);
890         if (hret != H_SUCCESS) {
891                 ehca_err(pd->device, "Could not modify SRQ to INIT "
892                          "ehca_qp=%p qp_num=%x h_ret=%li",
893                          my_qp, my_qp->real_qp_num, hret);
894                 goto create_srq2;
895         }
896
897         mqpcb->qp_enable = 1;
898         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
899         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
900                                 my_qp->ipz_qp_handle,
901                                 &my_qp->pf,
902                                 update_mask,
903                                 mqpcb, my_qp->galpas.kernel);
904         if (hret != H_SUCCESS) {
905                 ehca_err(pd->device, "Could not enable SRQ "
906                          "ehca_qp=%p qp_num=%x h_ret=%li",
907                          my_qp, my_qp->real_qp_num, hret);
908                 goto create_srq2;
909         }
910
911         mqpcb->qp_state  = EHCA_QPS_RTR;
912         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
913         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
914                                 my_qp->ipz_qp_handle,
915                                 &my_qp->pf,
916                                 update_mask,
917                                 mqpcb, my_qp->galpas.kernel);
918         if (hret != H_SUCCESS) {
919                 ehca_err(pd->device, "Could not modify SRQ to RTR "
920                          "ehca_qp=%p qp_num=%x h_ret=%li",
921                          my_qp, my_qp->real_qp_num, hret);
922                 goto create_srq2;
923         }
924
925         ehca_free_fw_ctrlblock(mqpcb);
926
927         return &my_qp->ib_srq;
928
929 create_srq2:
930         ret = ERR_PTR(ehca2ib_return_code(hret));
931         ehca_free_fw_ctrlblock(mqpcb);
932
933 create_srq1:
934         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
935
936         return ret;
937 }
938
939 /*
940  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
941  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
942  * returns total number of bad wqes in bad_wqe_cnt
943  */
944 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
945                            int *bad_wqe_cnt)
946 {
947         u64 h_ret;
948         struct ipz_queue *squeue;
949         void *bad_send_wqe_p, *bad_send_wqe_v;
950         u64 q_ofs;
951         struct ehca_wqe *wqe;
952         int qp_num = my_qp->ib_qp.qp_num;
953
954         /* get send wqe pointer */
955         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
956                                            my_qp->ipz_qp_handle, &my_qp->pf,
957                                            &bad_send_wqe_p, NULL, 2);
958         if (h_ret != H_SUCCESS) {
959                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
960                          " ehca_qp=%p qp_num=%x h_ret=%li",
961                          my_qp, qp_num, h_ret);
962                 return ehca2ib_return_code(h_ret);
963         }
964         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
965         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
966                  qp_num, bad_send_wqe_p);
967         /* convert wqe pointer to vadr */
968         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
969         if (ehca_debug_level >= 2)
970                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
971         squeue = &my_qp->ipz_squeue;
972         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
973                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
974                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
975                 return -EFAULT;
976         }
977
978         /* loop sets wqe's purge bit */
979         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
980         *bad_wqe_cnt = 0;
981         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
982                 if (ehca_debug_level >= 2)
983                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
984                 wqe->nr_of_data_seg = 0; /* suppress data access */
985                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
986                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
987                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
988                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
989         }
990         /*
991          * bad wqe will be reprocessed and ignored when pol_cq() is called,
992          *  i.e. nr of wqes with flush error status is one less
993          */
994         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
995                  qp_num, (*bad_wqe_cnt)-1);
996         wqe->wqef = 0;
997
998         return 0;
999 }
1000
1001 /*
1002  * internal_modify_qp with circumvention to handle aqp0 properly
1003  * smi_reset2init indicates if this is an internal reset-to-init-call for
1004  * smi. This flag must always be zero if called from ehca_modify_qp()!
1005  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
1006  */
1007 static int internal_modify_qp(struct ib_qp *ibqp,
1008                               struct ib_qp_attr *attr,
1009                               int attr_mask, int smi_reset2init)
1010 {
1011         enum ib_qp_state qp_cur_state, qp_new_state;
1012         int cnt, qp_attr_idx, ret = 0;
1013         enum ib_qp_statetrans statetrans;
1014         struct hcp_modify_qp_control_block *mqpcb;
1015         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1016         struct ehca_shca *shca =
1017                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
1018         u64 update_mask;
1019         u64 h_ret;
1020         int bad_wqe_cnt = 0;
1021         int squeue_locked = 0;
1022         unsigned long flags = 0;
1023
1024         /* do query_qp to obtain current attr values */
1025         mqpcb = ehca_alloc_fw_ctrlblock(GFP_ATOMIC);
1026         if (!mqpcb) {
1027                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
1028                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
1029                 return -ENOMEM;
1030         }
1031
1032         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
1033                                 my_qp->ipz_qp_handle,
1034                                 &my_qp->pf,
1035                                 mqpcb, my_qp->galpas.kernel);
1036         if (h_ret != H_SUCCESS) {
1037                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
1038                          "ehca_qp=%p qp_num=%x h_ret=%li",
1039                          my_qp, ibqp->qp_num, h_ret);
1040                 ret = ehca2ib_return_code(h_ret);
1041                 goto modify_qp_exit1;
1042         }
1043
1044         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
1045
1046         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
1047                 ret = -EINVAL;
1048                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
1049                          "ehca_qp=%p qp_num=%x",
1050                          mqpcb->qp_state, my_qp, ibqp->qp_num);
1051                 goto modify_qp_exit1;
1052         }
1053         /*
1054          * circumvention to set aqp0 initial state to init
1055          * as expected by IB spec
1056          */
1057         if (smi_reset2init == 0 &&
1058             ibqp->qp_type == IB_QPT_SMI &&
1059             qp_cur_state == IB_QPS_RESET &&
1060             (attr_mask & IB_QP_STATE) &&
1061             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1062                 struct ib_qp_attr smiqp_attr = {
1063                         .qp_state = IB_QPS_INIT,
1064                         .port_num = my_qp->init_attr.port_num,
1065                         .pkey_index = 0,
1066                         .qkey = 0
1067                 };
1068                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1069                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1070                 int smirc = internal_modify_qp(
1071                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1072                 if (smirc) {
1073                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1074                                  "ehca_modify_qp() rc=%i", smirc);
1075                         ret = H_PARAMETER;
1076                         goto modify_qp_exit1;
1077                 }
1078                 qp_cur_state = IB_QPS_INIT;
1079                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1080         }
1081         /* is transmitted current state  equal to "real" current state */
1082         if ((attr_mask & IB_QP_CUR_STATE) &&
1083             qp_cur_state != attr->cur_qp_state) {
1084                 ret = -EINVAL;
1085                 ehca_err(ibqp->device,
1086                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1087                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1088                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1089                 goto modify_qp_exit1;
1090         }
1091
1092         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1093                  "new qp_state=%x attribute_mask=%x",
1094                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1095
1096         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1097         if (!smi_reset2init &&
1098             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1099                                 attr_mask)) {
1100                 ret = -EINVAL;
1101                 ehca_err(ibqp->device,
1102                          "Invalid qp transition new_state=%x cur_state=%x "
1103                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1104                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1105                 goto modify_qp_exit1;
1106         }
1107
1108         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1109         if (mqpcb->qp_state)
1110                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1111         else {
1112                 ret = -EINVAL;
1113                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1114                          "ehca_qp=%p qp_num=%x",
1115                          qp_new_state, my_qp, ibqp->qp_num);
1116                 goto modify_qp_exit1;
1117         }
1118
1119         /* retrieve state transition struct to get req and opt attrs */
1120         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1121         if (statetrans < 0) {
1122                 ret = -EINVAL;
1123                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1124                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1125                          "qp_num=%x", qp_cur_state, qp_new_state,
1126                          statetrans, my_qp, ibqp->qp_num);
1127                 goto modify_qp_exit1;
1128         }
1129
1130         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1131
1132         if (qp_attr_idx < 0) {
1133                 ret = qp_attr_idx;
1134                 ehca_err(ibqp->device,
1135                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1136                          ibqp->qp_type, my_qp, ibqp->qp_num);
1137                 goto modify_qp_exit1;
1138         }
1139
1140         ehca_dbg(ibqp->device,
1141                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1142                  my_qp, ibqp->qp_num, statetrans);
1143
1144         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1145          * in non-LL UD QPs.
1146          */
1147         if ((my_qp->qp_type == IB_QPT_UD) &&
1148             (my_qp->ext_type != EQPT_LLQP) &&
1149             (statetrans == IB_QPST_INIT2RTR) &&
1150             (shca->hw_level >= 0x22)) {
1151                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1152                 mqpcb->send_grh_flag = 1;
1153         }
1154
1155         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1156         if ((my_qp->qp_type == IB_QPT_UD ||
1157              my_qp->qp_type == IB_QPT_GSI ||
1158              my_qp->qp_type == IB_QPT_SMI) &&
1159             statetrans == IB_QPST_SQE2RTS) {
1160                 /* mark next free wqe if kernel */
1161                 if (!ibqp->uobject) {
1162                         struct ehca_wqe *wqe;
1163                         /* lock send queue */
1164                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1165                         squeue_locked = 1;
1166                         /* mark next free wqe */
1167                         wqe = (struct ehca_wqe *)
1168                                 ipz_qeit_get(&my_qp->ipz_squeue);
1169                         wqe->optype = wqe->wqef = 0xff;
1170                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1171                                  ibqp->qp_num, wqe);
1172                 }
1173                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1174                 if (ret) {
1175                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1176                                  "ehca_qp=%p qp_num=%x ret=%i",
1177                                  my_qp, ibqp->qp_num, ret);
1178                         goto modify_qp_exit2;
1179                 }
1180         }
1181
1182         /*
1183          * enable RDMA_Atomic_Control if reset->init und reliable con
1184          * this is necessary since gen2 does not provide that flag,
1185          * but pHyp requires it
1186          */
1187         if (statetrans == IB_QPST_RESET2INIT &&
1188             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1189                 mqpcb->rdma_atomic_ctrl = 3;
1190                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1191         }
1192         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1193         if (statetrans == IB_QPST_INIT2RTR &&
1194             (ibqp->qp_type == IB_QPT_UC) &&
1195             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1196                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1197                 update_mask |=
1198                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1199         }
1200
1201         if (attr_mask & IB_QP_PKEY_INDEX) {
1202                 if (attr->pkey_index >= 16) {
1203                         ret = -EINVAL;
1204                         ehca_err(ibqp->device, "Invalid pkey_index=%x. "
1205                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1206                                  attr->pkey_index, my_qp, ibqp->qp_num);
1207                         goto modify_qp_exit2;
1208                 }
1209                 mqpcb->prim_p_key_idx = attr->pkey_index;
1210                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1211         }
1212         if (attr_mask & IB_QP_PORT) {
1213                 struct ehca_sport *sport;
1214                 struct ehca_qp *aqp1;
1215                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1216                         ret = -EINVAL;
1217                         ehca_err(ibqp->device, "Invalid port=%x. "
1218                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1219                                  attr->port_num, my_qp, ibqp->qp_num,
1220                                  shca->num_ports);
1221                         goto modify_qp_exit2;
1222                 }
1223                 sport = &shca->sport[attr->port_num - 1];
1224                 if (!sport->ibqp_sqp[IB_QPT_GSI]) {
1225                         /* should not occur */
1226                         ret = -EFAULT;
1227                         ehca_err(ibqp->device, "AQP1 was not created for "
1228                                  "port=%x", attr->port_num);
1229                         goto modify_qp_exit2;
1230                 }
1231                 aqp1 = container_of(sport->ibqp_sqp[IB_QPT_GSI],
1232                                     struct ehca_qp, ib_qp);
1233                 if (ibqp->qp_type != IB_QPT_GSI &&
1234                     ibqp->qp_type != IB_QPT_SMI &&
1235                     aqp1->mod_qp_parm) {
1236                         /*
1237                          * firmware will reject this modify_qp() because
1238                          * port is not activated/initialized fully
1239                          */
1240                         ret = -EFAULT;
1241                         ehca_warn(ibqp->device, "Couldn't modify qp port=%x: "
1242                                   "either port is being activated (try again) "
1243                                   "or cabling issue", attr->port_num);
1244                         goto modify_qp_exit2;
1245                 }
1246                 mqpcb->prim_phys_port = attr->port_num;
1247                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1248         }
1249         if (attr_mask & IB_QP_QKEY) {
1250                 mqpcb->qkey = attr->qkey;
1251                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1252         }
1253         if (attr_mask & IB_QP_AV) {
1254                 mqpcb->dlid = attr->ah_attr.dlid;
1255                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1256                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1257                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1258                 mqpcb->service_level = attr->ah_attr.sl;
1259                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1260
1261                 if (ehca_calc_ipd(shca, mqpcb->prim_phys_port,
1262                                   attr->ah_attr.static_rate,
1263                                   &mqpcb->max_static_rate)) {
1264                         ret = -EINVAL;
1265                         goto modify_qp_exit2;
1266                 }
1267                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1268
1269                 /*
1270                  * Always supply the GRH flag, even if it's zero, to give the
1271                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1272                  */
1273                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1274
1275                 /*
1276                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1277                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1278                  */
1279                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1280                         mqpcb->send_grh_flag = 1;
1281
1282                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1283                         update_mask |=
1284                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1285
1286                         for (cnt = 0; cnt < 16; cnt++)
1287                                 mqpcb->dest_gid.byte[cnt] =
1288                                         attr->ah_attr.grh.dgid.raw[cnt];
1289
1290                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1291                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1292                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1293                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1294                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1295                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1296                         update_mask |=
1297                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1298                 }
1299         }
1300
1301         if (attr_mask & IB_QP_PATH_MTU) {
1302                 /* store ld(MTU) */
1303                 my_qp->mtu_shift = attr->path_mtu + 7;
1304                 mqpcb->path_mtu = attr->path_mtu;
1305                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1306         }
1307         if (attr_mask & IB_QP_TIMEOUT) {
1308                 mqpcb->timeout = attr->timeout;
1309                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1310         }
1311         if (attr_mask & IB_QP_RETRY_CNT) {
1312                 mqpcb->retry_count = attr->retry_cnt;
1313                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1314         }
1315         if (attr_mask & IB_QP_RNR_RETRY) {
1316                 mqpcb->rnr_retry_count = attr->rnr_retry;
1317                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1318         }
1319         if (attr_mask & IB_QP_RQ_PSN) {
1320                 mqpcb->receive_psn = attr->rq_psn;
1321                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1322         }
1323         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1324                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1325                         attr->max_dest_rd_atomic : 2;
1326                 update_mask |=
1327                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1328         }
1329         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1330                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1331                         attr->max_rd_atomic : 2;
1332                 update_mask |=
1333                         EHCA_BMASK_SET
1334                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1335         }
1336         if (attr_mask & IB_QP_ALT_PATH) {
1337                 if (attr->alt_port_num < 1
1338                     || attr->alt_port_num > shca->num_ports) {
1339                         ret = -EINVAL;
1340                         ehca_err(ibqp->device, "Invalid alt_port=%x. "
1341                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1342                                  attr->alt_port_num, my_qp, ibqp->qp_num,
1343                                  shca->num_ports);
1344                         goto modify_qp_exit2;
1345                 }
1346                 mqpcb->alt_phys_port = attr->alt_port_num;
1347
1348                 if (attr->alt_pkey_index >= 16) {
1349                         ret = -EINVAL;
1350                         ehca_err(ibqp->device, "Invalid alt_pkey_index=%x. "
1351                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1352                                  attr->pkey_index, my_qp, ibqp->qp_num);
1353                         goto modify_qp_exit2;
1354                 }
1355                 mqpcb->alt_p_key_idx = attr->alt_pkey_index;
1356
1357                 mqpcb->timeout_al = attr->alt_timeout;
1358                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1359                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1360                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1361
1362                 if (ehca_calc_ipd(shca, mqpcb->alt_phys_port,
1363                                   attr->alt_ah_attr.static_rate,
1364                                   &mqpcb->max_static_rate_al)) {
1365                         ret = -EINVAL;
1366                         goto modify_qp_exit2;
1367                 }
1368
1369                 /* OpenIB doesn't support alternate retry counts - copy them */
1370                 mqpcb->retry_count_al = mqpcb->retry_count;
1371                 mqpcb->rnr_retry_count_al = mqpcb->rnr_retry_count;
1372
1373                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_ALT_PHYS_PORT, 1)
1374                         | EHCA_BMASK_SET(MQPCB_MASK_ALT_P_KEY_IDX, 1)
1375                         | EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT_AL, 1)
1376                         | EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1)
1377                         | EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1)
1378                         | EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1)
1379                         | EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1)
1380                         | EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT_AL, 1)
1381                         | EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT_AL, 1);
1382
1383                 /*
1384                  * Always supply the GRH flag, even if it's zero, to give the
1385                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1386                  */
1387                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1388
1389                 /*
1390                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1391                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1392                  */
1393                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1394                         mqpcb->send_grh_flag_al = 1;
1395
1396                         for (cnt = 0; cnt < 16; cnt++)
1397                                 mqpcb->dest_gid_al.byte[cnt] =
1398                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1399                         mqpcb->source_gid_idx_al =
1400                                 attr->alt_ah_attr.grh.sgid_index;
1401                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1402                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1403                         mqpcb->traffic_class_al =
1404                                 attr->alt_ah_attr.grh.traffic_class;
1405
1406                         update_mask |=
1407                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1)
1408                                 | EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1)
1409                                 | EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1)
1410                                 | EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1) |
1411                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1412                 }
1413         }
1414
1415         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1416                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1417                 update_mask |=
1418                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1419         }
1420
1421         if (attr_mask & IB_QP_SQ_PSN) {
1422                 mqpcb->send_psn = attr->sq_psn;
1423                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1424         }
1425
1426         if (attr_mask & IB_QP_DEST_QPN) {
1427                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1428                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1429         }
1430
1431         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1432                 if (attr->path_mig_state != IB_MIG_REARM
1433                     && attr->path_mig_state != IB_MIG_MIGRATED) {
1434                         ret = -EINVAL;
1435                         ehca_err(ibqp->device, "Invalid mig_state=%x",
1436                                  attr->path_mig_state);
1437                         goto modify_qp_exit2;
1438                 }
1439                 mqpcb->path_migration_state = attr->path_mig_state + 1;
1440                 update_mask |=
1441                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1442         }
1443
1444         if (attr_mask & IB_QP_CAP) {
1445                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1446                 update_mask |=
1447                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1448                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1449                 update_mask |=
1450                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1451                 /* no support for max_send/recv_sge yet */
1452         }
1453
1454         if (ehca_debug_level >= 2)
1455                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1456
1457         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1458                                  my_qp->ipz_qp_handle,
1459                                  &my_qp->pf,
1460                                  update_mask,
1461                                  mqpcb, my_qp->galpas.kernel);
1462
1463         if (h_ret != H_SUCCESS) {
1464                 ret = ehca2ib_return_code(h_ret);
1465                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed h_ret=%li "
1466                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1467                 goto modify_qp_exit2;
1468         }
1469
1470         if ((my_qp->qp_type == IB_QPT_UD ||
1471              my_qp->qp_type == IB_QPT_GSI ||
1472              my_qp->qp_type == IB_QPT_SMI) &&
1473             statetrans == IB_QPST_SQE2RTS) {
1474                 /* doorbell to reprocessing wqes */
1475                 iosync(); /* serialize GAL register access */
1476                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1477                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1478         }
1479
1480         if (statetrans == IB_QPST_RESET2INIT ||
1481             statetrans == IB_QPST_INIT2INIT) {
1482                 mqpcb->qp_enable = 1;
1483                 mqpcb->qp_state = EHCA_QPS_INIT;
1484                 update_mask = 0;
1485                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1486
1487                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1488                                          my_qp->ipz_qp_handle,
1489                                          &my_qp->pf,
1490                                          update_mask,
1491                                          mqpcb,
1492                                          my_qp->galpas.kernel);
1493
1494                 if (h_ret != H_SUCCESS) {
1495                         ret = ehca2ib_return_code(h_ret);
1496                         ehca_err(ibqp->device, "ENABLE in context of "
1497                                  "RESET_2_INIT failed! Maybe you didn't get "
1498                                  "a LID h_ret=%li ehca_qp=%p qp_num=%x",
1499                                  h_ret, my_qp, ibqp->qp_num);
1500                         goto modify_qp_exit2;
1501                 }
1502         }
1503
1504         if (statetrans == IB_QPST_ANY2RESET) {
1505                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1506                 ipz_qeit_reset(&my_qp->ipz_squeue);
1507         }
1508
1509         if (attr_mask & IB_QP_QKEY)
1510                 my_qp->qkey = attr->qkey;
1511
1512         my_qp->state = qp_new_state;
1513
1514 modify_qp_exit2:
1515         if (squeue_locked) { /* this means: sqe -> rts */
1516                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1517                 my_qp->sqerr_purgeflag = 1;
1518         }
1519
1520 modify_qp_exit1:
1521         ehca_free_fw_ctrlblock(mqpcb);
1522
1523         return ret;
1524 }
1525
1526 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1527                    struct ib_udata *udata)
1528 {
1529         struct ehca_shca *shca = container_of(ibqp->device, struct ehca_shca,
1530                                               ib_device);
1531         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1532
1533         /* The if-block below caches qp_attr to be modified for GSI and SMI
1534          * qps during the initialization by ib_mad. When the respective port
1535          * is activated, ie we got an event PORT_ACTIVE, we'll replay the
1536          * cached modify calls sequence, see ehca_recover_sqs() below.
1537          * Why that is required:
1538          * 1) If one port is connected, older code requires that port one
1539          *    to be connected and module option nr_ports=1 to be given by
1540          *    user, which is very inconvenient for end user.
1541          * 2) Firmware accepts modify_qp() only if respective port has become
1542          *    active. Older code had a wait loop of 30sec create_qp()/
1543          *    define_aqp1(), which is not appropriate in practice. This
1544          *    code now removes that wait loop, see define_aqp1(), and always
1545          *    reports all ports to ib_mad resp. users. Only activated ports
1546          *    will then usable for the users.
1547          */
1548         if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_SMI) {
1549                 int port = my_qp->init_attr.port_num;
1550                 struct ehca_sport *sport = &shca->sport[port - 1];
1551                 unsigned long flags;
1552                 spin_lock_irqsave(&sport->mod_sqp_lock, flags);
1553                 /* cache qp_attr only during init */
1554                 if (my_qp->mod_qp_parm) {
1555                         struct ehca_mod_qp_parm *p;
1556                         if (my_qp->mod_qp_parm_idx >= EHCA_MOD_QP_PARM_MAX) {
1557                                 ehca_err(&shca->ib_device,
1558                                          "mod_qp_parm overflow state=%x port=%x"
1559                                          " type=%x", attr->qp_state,
1560                                          my_qp->init_attr.port_num,
1561                                          ibqp->qp_type);
1562                                 spin_unlock_irqrestore(&sport->mod_sqp_lock,
1563                                                        flags);
1564                                 return -EINVAL;
1565                         }
1566                         p = &my_qp->mod_qp_parm[my_qp->mod_qp_parm_idx];
1567                         p->mask = attr_mask;
1568                         p->attr = *attr;
1569                         my_qp->mod_qp_parm_idx++;
1570                         ehca_dbg(&shca->ib_device,
1571                                  "Saved qp_attr for state=%x port=%x type=%x",
1572                                  attr->qp_state, my_qp->init_attr.port_num,
1573                                  ibqp->qp_type);
1574                         spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1575                         return 0;
1576                 }
1577                 spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1578         }
1579
1580         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1581 }
1582
1583 void ehca_recover_sqp(struct ib_qp *sqp)
1584 {
1585         struct ehca_qp *my_sqp = container_of(sqp, struct ehca_qp, ib_qp);
1586         int port = my_sqp->init_attr.port_num;
1587         struct ib_qp_attr attr;
1588         struct ehca_mod_qp_parm *qp_parm;
1589         int i, qp_parm_idx, ret;
1590         unsigned long flags, wr_cnt;
1591
1592         if (!my_sqp->mod_qp_parm)
1593                 return;
1594         ehca_dbg(sqp->device, "SQP port=%x qp_num=%x", port, sqp->qp_num);
1595
1596         qp_parm = my_sqp->mod_qp_parm;
1597         qp_parm_idx = my_sqp->mod_qp_parm_idx;
1598         for (i = 0; i < qp_parm_idx; i++) {
1599                 attr = qp_parm[i].attr;
1600                 ret = internal_modify_qp(sqp, &attr, qp_parm[i].mask, 0);
1601                 if (ret) {
1602                         ehca_err(sqp->device, "Could not modify SQP port=%x "
1603                                  "qp_num=%x ret=%x", port, sqp->qp_num, ret);
1604                         goto free_qp_parm;
1605                 }
1606                 ehca_dbg(sqp->device, "SQP port=%x qp_num=%x in state=%x",
1607                          port, sqp->qp_num, attr.qp_state);
1608         }
1609
1610         /* re-trigger posted recv wrs */
1611         wr_cnt =  my_sqp->ipz_rqueue.current_q_offset /
1612                 my_sqp->ipz_rqueue.qe_size;
1613         if (wr_cnt) {
1614                 spin_lock_irqsave(&my_sqp->spinlock_r, flags);
1615                 hipz_update_rqa(my_sqp, wr_cnt);
1616                 spin_unlock_irqrestore(&my_sqp->spinlock_r, flags);
1617                 ehca_dbg(sqp->device, "doorbell port=%x qp_num=%x wr_cnt=%lx",
1618                          port, sqp->qp_num, wr_cnt);
1619         }
1620
1621 free_qp_parm:
1622         kfree(qp_parm);
1623         /* this prevents subsequent calls to modify_qp() to cache qp_attr */
1624         my_sqp->mod_qp_parm = NULL;
1625 }
1626
1627 int ehca_query_qp(struct ib_qp *qp,
1628                   struct ib_qp_attr *qp_attr,
1629                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1630 {
1631         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1632         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1633                                               ib_device);
1634         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1635         struct hcp_modify_qp_control_block *qpcb;
1636         int cnt, ret = 0;
1637         u64 h_ret;
1638
1639         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1640                 ehca_err(qp->device, "Invalid attribute mask "
1641                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1642                          my_qp, qp->qp_num, qp_attr_mask);
1643                 return -EINVAL;
1644         }
1645
1646         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1647         if (!qpcb) {
1648                 ehca_err(qp->device, "Out of memory for qpcb "
1649                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1650                 return -ENOMEM;
1651         }
1652
1653         h_ret = hipz_h_query_qp(adapter_handle,
1654                                 my_qp->ipz_qp_handle,
1655                                 &my_qp->pf,
1656                                 qpcb, my_qp->galpas.kernel);
1657
1658         if (h_ret != H_SUCCESS) {
1659                 ret = ehca2ib_return_code(h_ret);
1660                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1661                          "ehca_qp=%p qp_num=%x h_ret=%li",
1662                          my_qp, qp->qp_num, h_ret);
1663                 goto query_qp_exit1;
1664         }
1665
1666         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1667         qp_attr->qp_state = qp_attr->cur_qp_state;
1668
1669         if (qp_attr->cur_qp_state == -EINVAL) {
1670                 ret = -EINVAL;
1671                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1672                          "ehca_qp=%p qp_num=%x",
1673                          qpcb->qp_state, my_qp, qp->qp_num);
1674                 goto query_qp_exit1;
1675         }
1676
1677         if (qp_attr->qp_state == IB_QPS_SQD)
1678                 qp_attr->sq_draining = 1;
1679
1680         qp_attr->qkey = qpcb->qkey;
1681         qp_attr->path_mtu = qpcb->path_mtu;
1682         qp_attr->path_mig_state = qpcb->path_migration_state - 1;
1683         qp_attr->rq_psn = qpcb->receive_psn;
1684         qp_attr->sq_psn = qpcb->send_psn;
1685         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1686         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1687         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1688         /* UD_AV CIRCUMVENTION */
1689         if (my_qp->qp_type == IB_QPT_UD) {
1690                 qp_attr->cap.max_send_sge =
1691                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1692                 qp_attr->cap.max_recv_sge =
1693                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1694         } else {
1695                 qp_attr->cap.max_send_sge =
1696                         qpcb->actual_nr_sges_in_sq_wqe;
1697                 qp_attr->cap.max_recv_sge =
1698                         qpcb->actual_nr_sges_in_rq_wqe;
1699         }
1700
1701         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1702         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1703
1704         qp_attr->pkey_index =
1705                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1706
1707         qp_attr->port_num =
1708                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1709
1710         qp_attr->timeout = qpcb->timeout;
1711         qp_attr->retry_cnt = qpcb->retry_count;
1712         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1713
1714         qp_attr->alt_pkey_index =
1715                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1716
1717         qp_attr->alt_port_num = qpcb->alt_phys_port;
1718         qp_attr->alt_timeout = qpcb->timeout_al;
1719
1720         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1721         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1722
1723         /* primary av */
1724         qp_attr->ah_attr.sl = qpcb->service_level;
1725
1726         if (qpcb->send_grh_flag) {
1727                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1728         }
1729
1730         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1731         qp_attr->ah_attr.dlid = qpcb->dlid;
1732         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1733         qp_attr->ah_attr.port_num = qp_attr->port_num;
1734
1735         /* primary GRH */
1736         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1737         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1738         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1739         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1740
1741         for (cnt = 0; cnt < 16; cnt++)
1742                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1743                         qpcb->dest_gid.byte[cnt];
1744
1745         /* alternate AV */
1746         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1747         if (qpcb->send_grh_flag_al) {
1748                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1749         }
1750
1751         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1752         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1753         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1754
1755         /* alternate GRH */
1756         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1757         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1758         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1759         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1760
1761         for (cnt = 0; cnt < 16; cnt++)
1762                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1763                         qpcb->dest_gid_al.byte[cnt];
1764
1765         /* return init attributes given in ehca_create_qp */
1766         if (qp_init_attr)
1767                 *qp_init_attr = my_qp->init_attr;
1768
1769         if (ehca_debug_level >= 2)
1770                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1771
1772 query_qp_exit1:
1773         ehca_free_fw_ctrlblock(qpcb);
1774
1775         return ret;
1776 }
1777
1778 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1779                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1780 {
1781         struct ehca_qp *my_qp =
1782                 container_of(ibsrq, struct ehca_qp, ib_srq);
1783         struct ehca_shca *shca =
1784                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1785         struct hcp_modify_qp_control_block *mqpcb;
1786         u64 update_mask;
1787         u64 h_ret;
1788         int ret = 0;
1789
1790         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1791         if (!mqpcb) {
1792                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1793                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1794                 return -ENOMEM;
1795         }
1796
1797         update_mask = 0;
1798         if (attr_mask & IB_SRQ_LIMIT) {
1799                 attr_mask &= ~IB_SRQ_LIMIT;
1800                 update_mask |=
1801                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1802                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1803                 mqpcb->curr_srq_limit =
1804                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1805                 mqpcb->qp_aff_asyn_ev_log_reg =
1806                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1807         }
1808
1809         /* by now, all bits in attr_mask should have been cleared */
1810         if (attr_mask) {
1811                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1812                          "attr_mask=%x", attr_mask);
1813                 ret = -EINVAL;
1814                 goto modify_srq_exit0;
1815         }
1816
1817         if (ehca_debug_level >= 2)
1818                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1819
1820         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1821                                  NULL, update_mask, mqpcb,
1822                                  my_qp->galpas.kernel);
1823
1824         if (h_ret != H_SUCCESS) {
1825                 ret = ehca2ib_return_code(h_ret);
1826                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed h_ret=%li "
1827                          "ehca_qp=%p qp_num=%x",
1828                          h_ret, my_qp, my_qp->real_qp_num);
1829         }
1830
1831 modify_srq_exit0:
1832         ehca_free_fw_ctrlblock(mqpcb);
1833
1834         return ret;
1835 }
1836
1837 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1838 {
1839         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1840         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1841                                               ib_device);
1842         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1843         struct hcp_modify_qp_control_block *qpcb;
1844         int ret = 0;
1845         u64 h_ret;
1846
1847         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1848         if (!qpcb) {
1849                 ehca_err(srq->device, "Out of memory for qpcb "
1850                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1851                 return -ENOMEM;
1852         }
1853
1854         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1855                                 NULL, qpcb, my_qp->galpas.kernel);
1856
1857         if (h_ret != H_SUCCESS) {
1858                 ret = ehca2ib_return_code(h_ret);
1859                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1860                          "ehca_qp=%p qp_num=%x h_ret=%li",
1861                          my_qp, my_qp->real_qp_num, h_ret);
1862                 goto query_srq_exit1;
1863         }
1864
1865         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1866         srq_attr->max_sge = 3;
1867         srq_attr->srq_limit = EHCA_BMASK_GET(
1868                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1869
1870         if (ehca_debug_level >= 2)
1871                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1872
1873 query_srq_exit1:
1874         ehca_free_fw_ctrlblock(qpcb);
1875
1876         return ret;
1877 }
1878
1879 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1880                                struct ib_uobject *uobject)
1881 {
1882         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1883         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1884                                              ib_pd);
1885         struct ehca_sport *sport = &shca->sport[my_qp->init_attr.port_num - 1];
1886         u32 qp_num = my_qp->real_qp_num;
1887         int ret;
1888         u64 h_ret;
1889         u8 port_num;
1890         enum ib_qp_type qp_type;
1891         unsigned long flags;
1892
1893         if (uobject) {
1894                 if (my_qp->mm_count_galpa ||
1895                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1896                         ehca_err(dev, "Resources still referenced in "
1897                                  "user space qp_num=%x", qp_num);
1898                         return -EINVAL;
1899                 }
1900         }
1901
1902         if (my_qp->send_cq) {
1903                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1904                 if (ret) {
1905                         ehca_err(dev, "Couldn't unassign qp from "
1906                                  "send_cq ret=%i qp_num=%x cq_num=%x", ret,
1907                                  qp_num, my_qp->send_cq->cq_number);
1908                         return ret;
1909                 }
1910         }
1911
1912         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1913         idr_remove(&ehca_qp_idr, my_qp->token);
1914         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1915
1916         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1917         if (h_ret != H_SUCCESS) {
1918                 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li "
1919                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1920                 return ehca2ib_return_code(h_ret);
1921         }
1922
1923         port_num = my_qp->init_attr.port_num;
1924         qp_type  = my_qp->init_attr.qp_type;
1925
1926         if (qp_type == IB_QPT_SMI || qp_type == IB_QPT_GSI) {
1927                 spin_lock_irqsave(&sport->mod_sqp_lock, flags);
1928                 kfree(my_qp->mod_qp_parm);
1929                 my_qp->mod_qp_parm = NULL;
1930                 shca->sport[port_num - 1].ibqp_sqp[qp_type] = NULL;
1931                 spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1932         }
1933
1934         /* no support for IB_QPT_SMI yet */
1935         if (qp_type == IB_QPT_GSI) {
1936                 struct ib_event event;
1937                 ehca_info(dev, "device %s: port %x is inactive.",
1938                           shca->ib_device.name, port_num);
1939                 event.device = &shca->ib_device;
1940                 event.event = IB_EVENT_PORT_ERR;
1941                 event.element.port_num = port_num;
1942                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1943                 ib_dispatch_event(&event);
1944         }
1945
1946         if (HAS_RQ(my_qp))
1947                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1948         if (HAS_SQ(my_qp))
1949                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1950         kmem_cache_free(qp_cache, my_qp);
1951         return 0;
1952 }
1953
1954 int ehca_destroy_qp(struct ib_qp *qp)
1955 {
1956         return internal_destroy_qp(qp->device,
1957                                    container_of(qp, struct ehca_qp, ib_qp),
1958                                    qp->uobject);
1959 }
1960
1961 int ehca_destroy_srq(struct ib_srq *srq)
1962 {
1963         return internal_destroy_qp(srq->device,
1964                                    container_of(srq, struct ehca_qp, ib_srq),
1965                                    srq->uobject);
1966 }
1967
1968 int ehca_init_qp_cache(void)
1969 {
1970         qp_cache = kmem_cache_create("ehca_cache_qp",
1971                                      sizeof(struct ehca_qp), 0,
1972                                      SLAB_HWCACHE_ALIGN,
1973                                      NULL);
1974         if (!qp_cache)
1975                 return -ENOMEM;
1976         return 0;
1977 }
1978
1979 void ehca_cleanup_qp_cache(void)
1980 {
1981         if (qp_cache)
1982                 kmem_cache_destroy(qp_cache);
1983 }