1 /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
2 * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
4 * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
28 * Gareth Hughes <gareth@valinux.com>
29 * Kevin E. Martin <martin@valinux.com>
32 #ifndef __R128_DRM_H__
33 #define __R128_DRM_H__
35 /* WARNING: If you change any of these defines, make sure to change the
36 * defines in the X server file (r128_sarea.h)
38 #ifndef __R128_SAREA_DEFINES__
39 #define __R128_SAREA_DEFINES__
41 /* What needs to be changed for the current vertex buffer?
43 #define R128_UPLOAD_CONTEXT 0x001
44 #define R128_UPLOAD_SETUP 0x002
45 #define R128_UPLOAD_TEX0 0x004
46 #define R128_UPLOAD_TEX1 0x008
47 #define R128_UPLOAD_TEX0IMAGES 0x010
48 #define R128_UPLOAD_TEX1IMAGES 0x020
49 #define R128_UPLOAD_CORE 0x040
50 #define R128_UPLOAD_MASKS 0x080
51 #define R128_UPLOAD_WINDOW 0x100
52 #define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
53 #define R128_REQUIRE_QUIESCENCE 0x400
54 #define R128_UPLOAD_ALL 0x7ff
56 #define R128_FRONT 0x1
58 #define R128_DEPTH 0x4
62 #define R128_POINTS 0x1
63 #define R128_LINES 0x2
64 #define R128_LINE_STRIP 0x3
65 #define R128_TRIANGLES 0x4
66 #define R128_TRIANGLE_FAN 0x5
67 #define R128_TRIANGLE_STRIP 0x6
69 /* Vertex/indirect buffer size
71 #define R128_BUFFER_SIZE 16384
73 /* Byte offsets for indirect buffer data
75 #define R128_INDEX_PRIM_OFFSET 20
76 #define R128_HOSTDATA_BLIT_OFFSET 32
78 /* Keep these small for testing.
80 #define R128_NR_SAREA_CLIPRECTS 12
82 /* There are 2 heaps (local/AGP). Each region within a heap is a
83 * minimum of 64k, and there are at most 64 of them per heap.
85 #define R128_LOCAL_TEX_HEAP 0
86 #define R128_AGP_TEX_HEAP 1
87 #define R128_NR_TEX_HEAPS 2
88 #define R128_NR_TEX_REGIONS 64
89 #define R128_LOG_TEX_GRANULARITY 16
91 #define R128_NR_CONTEXT_REGS 12
93 #define R128_MAX_TEXTURE_LEVELS 11
94 #define R128_MAX_TEXTURE_UNITS 2
96 #endif /* __R128_SAREA_DEFINES__ */
99 /* Context state - can be written in one large chunk */
100 unsigned int dst_pitch_offset_c;
101 unsigned int dp_gui_master_cntl_c;
102 unsigned int sc_top_left_c;
103 unsigned int sc_bottom_right_c;
104 unsigned int z_offset_c;
105 unsigned int z_pitch_c;
106 unsigned int z_sten_cntl_c;
107 unsigned int tex_cntl_c;
108 unsigned int misc_3d_state_cntl_reg;
109 unsigned int texture_clr_cmp_clr_c;
110 unsigned int texture_clr_cmp_msk_c;
111 unsigned int fog_color_c;
114 unsigned int tex_size_pitch_c;
115 unsigned int constant_color_c;
118 unsigned int pm4_vc_fpu_setup;
119 unsigned int setup_cntl;
122 unsigned int dp_write_mask;
123 unsigned int sten_ref_mask_c;
124 unsigned int plane_3d_mask_c;
127 unsigned int window_xy_offset;
130 unsigned int scale_3d_cntl;
131 } drm_r128_context_regs_t;
133 /* Setup registers for each texture unit
136 unsigned int tex_cntl;
137 unsigned int tex_combine_cntl;
138 unsigned int tex_size_pitch;
139 unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
140 unsigned int tex_border_color;
141 } drm_r128_texture_regs_t;
144 typedef struct drm_r128_sarea {
145 /* The channel for communication of state information to the kernel
146 * on firing a vertex buffer.
148 drm_r128_context_regs_t context_state;
149 drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
151 unsigned int vertsize;
152 unsigned int vc_format;
154 /* The current cliprects, or a subset thereof.
156 drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS];
159 /* Counters for client-side throttling of rendering clients.
161 unsigned int last_frame;
162 unsigned int last_dispatch;
164 drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
165 unsigned int tex_age[R128_NR_TEX_HEAPS];
167 int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
168 int pfCurrentPage; /* which buffer is being displayed? */
172 /* WARNING: If you change any of these defines, make sure to change the
173 * defines in the Xserver file (xf86drmR128.h)
176 /* Rage 128 specific ioctls
177 * The device specific ioctl range is 0x40 to 0x79.
179 #define DRM_R128_INIT 0x00
180 #define DRM_R128_CCE_START 0x01
181 #define DRM_R128_CCE_STOP 0x02
182 #define DRM_R128_CCE_RESET 0x03
183 #define DRM_R128_CCE_IDLE 0x04
185 #define DRM_R128_RESET 0x06
186 #define DRM_R128_SWAP 0x07
187 #define DRM_R128_CLEAR 0x08
188 #define DRM_R128_VERTEX 0x09
189 #define DRM_R128_INDICES 0x0a
190 #define DRM_R128_BLIT 0x0b
191 #define DRM_R128_DEPTH 0x0c
192 #define DRM_R128_STIPPLE 0x0d
194 #define DRM_R128_INDIRECT 0x0f
195 #define DRM_R128_FULLSCREEN 0x10
196 #define DRM_R128_CLEAR2 0x11
197 #define DRM_R128_GETPARAM 0x12
198 #define DRM_R128_FLIP 0x13
200 #define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
201 #define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
202 #define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
203 #define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
204 #define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
206 #define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
207 #define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
208 #define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
209 #define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
210 #define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
211 #define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
212 #define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
213 #define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
215 #define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
216 #define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
217 #define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
218 #define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
219 #define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
221 typedef struct drm_r128_init {
223 R128_INIT_CCE = 0x01,
224 R128_CLEANUP_CCE = 0x02
226 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
227 int sarea_priv_offset;
229 unsigned long sarea_priv_offset;
238 unsigned int front_offset, front_pitch;
239 unsigned int back_offset, back_pitch;
240 unsigned int depth_bpp;
241 unsigned int depth_offset, depth_pitch;
242 unsigned int span_offset;
244 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
245 unsigned int fb_offset;
246 unsigned int mmio_offset;
247 unsigned int ring_offset;
248 unsigned int ring_rptr_offset;
249 unsigned int buffers_offset;
250 unsigned int agp_textures_offset;
252 unsigned long fb_offset;
253 unsigned long mmio_offset;
254 unsigned long ring_offset;
255 unsigned long ring_rptr_offset;
256 unsigned long buffers_offset;
257 unsigned long agp_textures_offset;
261 typedef struct drm_r128_cce_stop {
264 } drm_r128_cce_stop_t;
266 typedef struct drm_r128_clear {
268 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
271 unsigned int clear_color;
272 unsigned int clear_depth;
273 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
274 unsigned int color_mask;
275 unsigned int depth_mask;
279 typedef struct drm_r128_vertex {
281 int idx; /* Index of vertex buffer */
282 int count; /* Number of vertices in buffer */
283 int discard; /* Client finished with buffer? */
286 typedef struct drm_r128_indices {
291 int discard; /* Client finished with buffer? */
292 } drm_r128_indices_t;
294 typedef struct drm_r128_blit {
300 unsigned short width, height;
303 typedef struct drm_r128_depth {
305 R128_WRITE_SPAN = 0x01,
306 R128_WRITE_PIXELS = 0x02,
307 R128_READ_SPAN = 0x03,
308 R128_READ_PIXELS = 0x04
313 unsigned int __user *buffer;
314 unsigned char __user *mask;
317 typedef struct drm_r128_stipple {
318 unsigned int __user *mask;
319 } drm_r128_stipple_t;
321 typedef struct drm_r128_indirect {
326 } drm_r128_indirect_t;
328 typedef struct drm_r128_fullscreen {
330 R128_INIT_FULLSCREEN = 0x01,
331 R128_CLEANUP_FULLSCREEN = 0x02
333 } drm_r128_fullscreen_t;
335 /* 2.3: An ioctl to get parameters that aren't available to the 3d
336 * client any other way.
338 #define R128_PARAM_IRQ_NR 1
340 typedef struct drm_r128_getparam {
343 } drm_r128_getparam_t;