2 * MPC8360E RDK Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * Copyright 2007-2008 MontaVista Software, Inc.
7 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
20 compatible = "fsl,mpc8360rdk";
41 d-cache-line-size = <32>;
42 i-cache-line-size = <32>;
43 d-cache-size = <32768>;
44 i-cache-size = <32768>;
45 /* filled by u-boot */
46 timebase-frequency = <0>;
48 clock-frequency = <0>;
53 device_type = "memory";
54 /* filled by u-boot */
62 compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc",
64 ranges = <0 0xe0000000 0x200000>;
65 reg = <0xe0000000 0x200>;
66 /* filled by u-boot */
70 compatible = "mpc83xx_wdt";
78 compatible = "fsl-i2c";
81 interrupt-parent = <&ipic>;
89 compatible = "fsl-i2c";
92 interrupt-parent = <&ipic>;
96 serial0: serial@4500 {
97 device_type = "serial";
98 compatible = "ns16550";
101 interrupt-parent = <&ipic>;
102 /* filled by u-boot */
103 clock-frequency = <0>;
106 serial1: serial@4600 {
107 device_type = "serial";
108 compatible = "ns16550";
109 reg = <0x4600 0x100>;
111 interrupt-parent = <&ipic>;
112 /* filled by u-boot */
113 clock-frequency = <0>;
117 #address-cells = <1>;
119 compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
121 ranges = <0 0x8100 0x1a8>;
122 interrupt-parent = <&ipic>;
126 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
129 interrupt-parent = <&ipic>;
133 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
136 interrupt-parent = <&ipic>;
140 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
143 interrupt-parent = <&ipic>;
147 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
150 interrupt-parent = <&ipic>;
156 compatible = "fsl,sec2.0";
157 reg = <0x30000 0x10000>;
158 interrupts = <11 0x8>;
159 interrupt-parent = <&ipic>;
160 fsl,num-channels = <4>;
161 fsl,channel-fifo-len = <24>;
162 fsl,exec-units-mask = <0x7e>;
163 fsl,descriptor-types-mask = <0x01010ebf>;
166 ipic: interrupt-controller@700 {
167 #address-cells = <0>;
168 #interrupt-cells = <2>;
169 compatible = "fsl,pq2pro-pic", "fsl,ipic";
170 interrupt-controller;
174 qe_pio_b: gpio-controller@1418 {
176 compatible = "fsl,mpc8360-qe-pario-bank",
177 "fsl,mpc8323-qe-pario-bank";
182 qe_pio_e: gpio-controller@1460 {
184 compatible = "fsl,mpc8360-qe-pario-bank",
185 "fsl,mpc8323-qe-pario-bank";
191 #address-cells = <1>;
194 compatible = "fsl,qe", "simple-bus";
195 ranges = <0 0x100000 0x100000>;
196 reg = <0x100000 0x480>;
197 /* filled by u-boot */
198 clock-frequency = <0>;
203 #address-cells = <1>;
205 compatible = "fsl,qe-muram", "fsl,cpm-muram";
206 ranges = <0 0x10000 0xc000>;
209 compatible = "fsl,qe-muram-data",
210 "fsl,cpm-muram-data";
216 compatible = "fsl,mpc8360-qe-gtm",
217 "fsl,qe-gtm", "fsl,gtm";
219 interrupts = <12 13 14 15>;
220 interrupt-parent = <&qeic>;
221 clock-frequency = <166666666>;
225 compatible = "fsl,mpc8360-qe-usb",
226 "fsl,mpc8323-qe-usb";
227 reg = <0x6c0 0x40 0x8b00 0x100>;
229 interrupt-parent = <&qeic>;
230 fsl,fullspeed-clock = "clk21";
231 gpios = <&qe_pio_b 2 0 /* USBOE */
232 &qe_pio_b 3 0 /* USBTP */
233 &qe_pio_b 8 0 /* USBTN */
234 &qe_pio_b 9 0 /* USBRP */
235 &qe_pio_b 11 0 /* USBRN */
236 &qe_pio_e 20 0 /* SPEED */
237 &qe_pio_e 21 1 /* POWER */>;
242 compatible = "fsl,spi";
245 interrupt-parent = <&qeic>;
251 compatible = "fsl,spi";
254 interrupt-parent = <&qeic>;
259 device_type = "network";
260 compatible = "ucc_geth";
262 reg = <0x2000 0x200>;
264 interrupt-parent = <&qeic>;
265 rx-clock-name = "none";
266 tx-clock-name = "clk9";
267 phy-handle = <&phy2>;
268 phy-connection-type = "rgmii-rxid";
269 /* filled by u-boot */
270 local-mac-address = [ 00 00 00 00 00 00 ];
274 device_type = "network";
275 compatible = "ucc_geth";
277 reg = <0x3000 0x200>;
279 interrupt-parent = <&qeic>;
280 rx-clock-name = "none";
281 tx-clock-name = "clk4";
282 phy-handle = <&phy4>;
283 phy-connection-type = "rgmii-rxid";
284 /* filled by u-boot */
285 local-mac-address = [ 00 00 00 00 00 00 ];
289 device_type = "network";
290 compatible = "ucc_geth";
292 reg = <0x2600 0x200>;
294 interrupt-parent = <&qeic>;
295 rx-clock-name = "clk20";
296 tx-clock-name = "clk19";
297 phy-handle = <&phy1>;
298 phy-connection-type = "mii";
299 /* filled by u-boot */
300 local-mac-address = [ 00 00 00 00 00 00 ];
304 device_type = "network";
305 compatible = "ucc_geth";
307 reg = <0x3200 0x200>;
309 interrupt-parent = <&qeic>;
310 rx-clock-name = "clk8";
311 tx-clock-name = "clk7";
312 phy-handle = <&phy3>;
313 phy-connection-type = "mii";
314 /* filled by u-boot */
315 local-mac-address = [ 00 00 00 00 00 00 ];
319 #address-cells = <1>;
321 compatible = "fsl,ucc-mdio";
324 phy1: ethernet-phy@1 {
325 device_type = "ethernet-phy";
326 compatible = "national,DP83848VV";
330 phy2: ethernet-phy@2 {
331 device_type = "ethernet-phy";
332 compatible = "broadcom,BCM5481UA2KMLG";
336 phy3: ethernet-phy@3 {
337 device_type = "ethernet-phy";
338 compatible = "national,DP83848VV";
342 phy4: ethernet-phy@4 {
343 device_type = "ethernet-phy";
344 compatible = "broadcom,BCM5481UA2KMLG";
350 device_type = "serial";
351 compatible = "ucc_uart";
352 reg = <0x2400 0x200>;
355 rx-clock-name = "brg7";
356 tx-clock-name = "brg8";
358 interrupt-parent = <&qeic>;
363 device_type = "serial";
364 compatible = "ucc_uart";
365 reg = <0x3400 0x200>;
368 rx-clock-name = "brg13";
369 tx-clock-name = "brg14";
371 interrupt-parent = <&qeic>;
375 qeic: interrupt-controller@80 {
376 #address-cells = <0>;
377 #interrupt-cells = <1>;
378 compatible = "fsl,qe-ic";
379 interrupt-controller;
382 interrupts = <32 8 33 8>;
383 interrupt-parent = <&ipic>;
389 #address-cells = <2>;
391 compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
393 reg = <0xe0005000 0xd8>;
394 ranges = <0 0 0xff800000 0x0800000
395 1 0 0x60000000 0x0001000
396 2 0 0x70000000 0x4000000>;
399 compatible = "intel,PC28F640P30T85", "cfi-flash";
400 reg = <0 0 0x800000>;
406 compatible = "fsl,upm-nand";
408 fsl,upm-addr-offset = <16>;
409 fsl,upm-cmd-offset = <8>;
410 gpios = <&qe_pio_e 18 0>;
413 compatible = "stm,nand512-a";
418 device_type = "display";
419 compatible = "fujitsu,MB86277", "fujitsu,mint";
420 reg = <2 0 0x4000000>;
423 /* filled by u-boot */
429 /* linux,opened; - added by uboot */
434 #address-cells = <3>;
436 #interrupt-cells = <1>;
438 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
439 reg = <0xe0008500 0x100 /* internal registers */
440 0xe0008300 0x8>; /* config space access registers */
441 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
442 0x42000000 0 0x80000000 0x80000000 0 0x10000000
443 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
445 interrupt-parent = <&ipic>;
446 interrupt-map-mask = <0xf800 0 0 7>;
447 interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */
448 0xa000 0 0 1 &ipic 18 8
449 0xa000 0 0 2 &ipic 19 8
451 /* PCI1 IDSEL 0x15 AD21 */
452 0xa800 0 0 1 &ipic 19 8
453 0xa800 0 0 2 &ipic 20 8
454 0xa800 0 0 3 &ipic 21 8
455 0xa800 0 0 4 &ipic 18 8>;
456 /* filled by u-boot */
458 clock-frequency = <0>;